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1. 发明授权

US08488025B2 Sub-frame tapered reset 有权
标题翻译：子框架锥形复位
公开(公告)号：US08488025B2
公开(公告)日：2013-07-16
申请号：US12582316
申请日：2009-10-20
申请人： Ying Huang , Giuseppe Rossi , Lester Joseph Kozlowski , Laurent Blanquart , Qianjiang Mao , Gregory Chow
发明人： Ying Huang , Giuseppe Rossi , Lester Joseph Kozlowski , Laurent Blanquart , Qianjiang Mao , Gregory Chow
IPC分类号： H04N5/217 , H04N5/335
CPC分类号： H04N5/363 , H04N5/343 , H04N5/3532 , H04N5/374 , H04N5/3765
摘要： Systems and methods are provided that facilitate employing a plurality of independent reset buses for a column of pixels in a pixel array of a CMOS sensor imager. Utilization of the plurality of independent reset buses for the column of pixels can enable independent reset to be effectuated when employing sub-frame integration. For example, rows to be read and reset during a given readout time interval can be selected based upon one or more criteria. Further, each of the rows selected during the given readout time interval can be associated with a respective distinct reset bus. By leveraging the plurality of independent reset buses, uniformity in pixel operation can be maintained whether operating in full frame integration mode or sub-frame integration mode. Thus, noise resultant from changing between integration modes can be mitigated by using the plurality of independent reset buses.
摘要翻译：提供了系统和方法，其便于对CMOS传感器成像器的像素阵列中的像素列采用多个独立的复位总线。对于像素列，多个独立复位总线的利用可以使得在采用子帧集成时能够实现独立的复位。例如，可以基于一个或多个标准来选择在给定的读出时间间隔期间要读取和复位的行。此外，在给定读出时间间隔期间选择的每行都可以与相应的不同的复位总线相关联。通过利用多个独立的复位总线，无论是在全帧集成模式还是子帧集成模式下操作，都可以保持像素操作的均匀性。因此，可以通过使用多个独立复位总线来减轻由积分模式之间变化引起的噪声。

2. 发明申请

US20110090374A1 SUB-FRAME TAPERED RESET 有权
标题翻译：子框复位
公开(公告)号：US20110090374A1
公开(公告)日：2011-04-21
申请号：US12582316
申请日：2009-10-20
申请人： Ying Huang , Giuseppe Rossi , Lester Joseph Kozlowski , Laurent Blanquart , Qianjiang Mao , Gregory Chow
发明人： Ying Huang , Giuseppe Rossi , Lester Joseph Kozlowski , Laurent Blanquart , Qianjiang Mao , Gregory Chow
IPC分类号： H04N5/217 , H04N5/335
CPC分类号： H04N5/363 , H04N5/343 , H04N5/3532 , H04N5/374 , H04N5/3765
摘要： Systems and methods are provided that facilitate employing a plurality of independent reset buses for a column of pixels in a pixel array of a CMOS sensor imager. Utilization of the plurality of independent reset buses for the column of pixels can enable independent reset to be effectuated when employing sub-frame integration. For example, rows to be read and reset during a given readout time interval can be selected based upon one or more criteria. Further, each of the rows selected during the given readout time interval can be associated with a respective distinct reset bus. By leveraging the plurality of independent reset buses, uniformity in pixel operation can be maintained whether operating in full frame integration mode or sub-frame integration mode. Thus, noise resultant from changing between integration modes can be mitigated by using the plurality of independent reset buses.
摘要翻译：提供了系统和方法，其便于对CMOS传感器成像器的像素阵列中的像素列采用多个独立的复位总线。对于像素列，多个独立复位总线的利用可以使得在采用子帧集成时能够实现独立的复位。例如，可以基于一个或多个标准来选择在给定的读出时间间隔期间要读取和复位的行。此外，在给定读出时间间隔期间选择的每行都可以与相应的不同的复位总线相关联。通过利用多个独立的复位总线，无论是在全帧集成模式还是子帧集成模式下操作，都可以保持像素操作的均匀性。因此，可以通过使用多个独立复位总线来减轻由积分模式之间变化引起的噪声。

3. 发明申请

US20090141156A1 REFERENCE VOLTAGE GENERATION IN IMAGING SENSORS 失效
标题翻译：成像传感器参考电压产生
公开(公告)号：US20090141156A1
公开(公告)日：2009-06-04
申请号：US11949542
申请日：2007-12-03
申请人： Giuseppe Rossi , Laurent Blanquart , Ying Huang
发明人： Giuseppe Rossi , Laurent Blanquart , Ying Huang
IPC分类号： H04N5/335 , G05F3/02
CPC分类号： H03M1/662 , H03M1/76 , H04N5/335 , H04N5/3698
摘要： The claimed subject matter provides systems and/or methods that facilitate generating and/or maintaining low noise reference voltages for CMOS imaging System-on-Chip (iSoC) sensors. A primary reference voltage can be generated utilizing a low noise bandgap. Further, the primary reference voltage can be filtered via a low pass filter. The filtered, primary reference voltage can thereafter be distributed to a plurality of isolated domains. Each of the isolated domains can generate an independent set of reference voltages based upon the filtered, primary reference voltage. Moreover, subsets of these reference voltages can be employed by programmable digital to analog converters (DACs). Each of the reference voltages can be isolated from switching noise and/or clock glitches generated within each domain. Further, each DAC output can be buffered to have adequately low impedance with appropriate drive capability and requisite signal swing.
摘要翻译：所要求保护的主题提供了有助于为CMOS成像片上系统（iSoC）传感器产生和/或维持低噪声参考电压的系统和/或方法。可以利用低噪声带隙产生主参考电压。此外，可以通过低通滤波器对初级参考电压进行滤波。滤波后的主参考电压此后可以分配到多个隔离域。每个隔离域可以基于滤波的主要参考电压产生独立的一组参考电压。此外，这些参考电压的子集可由可编程数模转换器（DAC）采用。每个参考电压可以与每个域内产生的开关噪声和/或时钟毛刺隔离。此外，每个DAC输出可以被缓冲以具有适当的低阻抗，具有适当的驱动能力和必要的信号摆幅。

4. 发明授权

US07760258B2 Apparatus and method for stabilizing image sensor black level 有权
标题翻译：用于稳定图像传感器黑色电平的装置和方法
公开(公告)号：US07760258B2
公开(公告)日：2010-07-20
申请号：US11715808
申请日：2007-03-07
申请人： Ying Huang , Giuseppe Rossi , Roberto Marchesini , Qianjiang (Bob) Mao , John Wallner , John Richardson , Laurent Blanquart , Joey Shah
发明人： Ying Huang , Giuseppe Rossi , Roberto Marchesini , Qianjiang (Bob) Mao , John Wallner , John Richardson , Laurent Blanquart , Joey Shah
IPC分类号： H04N5/335 , H04N5/217
CPC分类号： H04N5/361 , H04N5/2176 , H04N5/3658
摘要： A black clamp stabilization circuit for an image sensor utilizes a mixed-signal SoC block comprising sub-blocks to dynamically and precisely adjust the black level based on comparison to a reference black level. The black level adjustments include a first level regulation using digital control of an analog signal in a feedback loop that includes a programmable gain amplifier and high-resolution A/D converter. By applying the black clamping in the analog domain, dynamic range is extended. Additional black level regulation is subsequently performed in the digital domain to differentially eliminate line noise and column noise generated within the imaging System-on-Chip. By providing information between the sub-blocks, the algorithms can converge more quickly. The technique enables multiple signal paths to separately handle individual colors and to increase imaging data throughput.
摘要翻译：用于图像传感器的黑色钳位稳定电路利用包括子块的混合信号SoC块，以基于与参考黑色电平的比较来动态且精确地调整黑色电平。黑电平调节包括使用包括可编程增益放大器和高分辨率A / D转换器的反馈环路中的模拟信号的数字控制的第一电平调节。通过在模拟域中施加黑色钳位，可以延长动态范围。随后在数字域中执行额外的黑电平调节，以差分消除在成像片上系统中产生的线噪声和列噪声。通过在子块之间提供信息，算法可以更快地收敛。该技术使得多个信号路径可以分开处理各种颜色并增加成像数据吞吐量。

5. 发明授权

US07855748B2 Reference voltage generation in imaging sensors 失效
标题翻译：成像传感器中的参考电压产生
公开(公告)号：US07855748B2
公开(公告)日：2010-12-21
申请号：US11949542
申请日：2007-12-03
申请人： Giuseppe Rossi , Laurent Blanquart , Ying Huang
发明人： Giuseppe Rossi , Laurent Blanquart , Ying Huang
IPC分类号： H04N5/225
CPC分类号： H03M1/662 , H03M1/76 , H04N5/335 , H04N5/3698
摘要： The claimed subject matter provides systems and/or methods that facilitate generating and/or maintaining low noise reference voltages for CMOS imaging System-on-Chip (iSoC) sensors. A primary reference voltage can be generated utilizing a low noise bandgap. Further, the primary reference voltage can be filtered via a low pass filter. The filtered, primary reference voltage can thereafter be distributed to a plurality of isolated domains. Each of the isolated domains can generate an independent set of reference voltages based upon the filtered, primary reference voltage. Moreover, subsets of these reference voltages can be employed by programmable digital to analog converters (DACs). Each of the reference voltages can be isolated from switching noise and/or clock glitches generated within each domain. Further, each DAC output can be buffered to have adequately low impedance with appropriate drive capability and requisite signal swing.
摘要翻译：所要求保护的主题提供了有助于为CMOS成像片上系统（iSoC）传感器产生和/或维持低噪声参考电压的系统和/或方法。可以利用低噪声带隙产生主参考电压。此外，可以通过低通滤波器对初级参考电压进行滤波。滤波后的主参考电压此后可以分配到多个隔离域。每个隔离域可以基于滤波的主要参考电压产生独立的一组参考电压。此外，这些参考电压的子集可由可编程数模转换器（DAC）采用。每个参考电压可以与每个域内产生的开关噪声和/或时钟毛刺隔离。此外，每个DAC输出可以被缓冲以具有适当的低阻抗，具有适当的驱动能力和必要的信号摆幅。

6. 发明申请

US20080218615A1 Apparatus and method for stabilizing image sensor black level 有权
标题翻译：用于稳定图像传感器黑色电平的装置和方法
公开(公告)号：US20080218615A1
公开(公告)日：2008-09-11
申请号：US11715808
申请日：2007-03-07
申请人： Ying Huang , Giuseppe Rossi , Roberto Marchesini , Qianjiang (Bob) Mao , John Wallner , John Richardson , Laurent Blanquart , Joey Shah
发明人： Ying Huang , Giuseppe Rossi , Roberto Marchesini , Qianjiang (Bob) Mao , John Wallner , John Richardson , Laurent Blanquart , Joey Shah
IPC分类号： H04N5/335
CPC分类号： H04N5/361 , H04N5/2176 , H04N5/3658
摘要： A black clamp stabilization circuit for an image sensor utilizes a mixed-signal SoC block comprising sub-blocks to dynamically and precisely adjust the black level based on comparison to a reference black level. The black level adjustments include a first level regulation using digital control of an analog signal in a feedback loop that includes a programmable gain amplifier and high-resolution A/D converter. By applying the black clamping in the analog domain, dynamic range is extended. Additional black level regulation is subsequently performed in the digital domain to differentially eliminate line noise and column noise generated within the imaging System-on-Chip. By providing information between the sub-blocks, the algorithms can converge more quickly. The technique enables multiple signal paths to separately handle individual colors and to increase imaging data throughput.
摘要翻译：用于图像传感器的黑色钳位稳定电路利用包括子块的混合信号SoC块，以基于与参考黑色电平的比较来动态且精确地调整黑色电平。黑电平调节包括使用包括可编程增益放大器和高分辨率A / D转换器的反馈环路中的模拟信号的数字控制的第一电平调节。通过在模拟域中施加黑色钳位，可以延长动态范围。随后在数字域中执行额外的黑电平调节，以差分消除在成像片上系统中产生的线噪声和列噪声。通过在子块之间提供信息，算法可以更快地收敛。该技术使得多个信号路径可以分开处理各种颜色并增加成像数据吞吐量。

7. 发明授权

US08610790B2 Programmable data readout for an optical sensor 有权
标题翻译：用于光学传感器的可编程数据读出
公开(公告)号：US08610790B2
公开(公告)日：2013-12-17
申请号：US13217797
申请日：2011-08-25
申请人： Laurent Blanquart , John D. Wallner , Qianjiang Mao
发明人： Laurent Blanquart , John D. Wallner , Qianjiang Mao
IPC分类号： H04N5/225
CPC分类号： H04N5/343 , H04N5/3452 , H04N5/347
摘要： Programmable data readout for optical image sensors is disclosed herein. By way of example, vertical skipping and vertical mixing functionality is provided that is responsive to commands, enabling dynamic selectivity and processing of optical sensor data. A data output control system can be incorporated with or coupled to data readout circuitry of an optical sensor. The output control system comprises a vertical skipping engine that can dynamically select a subset of data for output in response to one or more skipping commands, and a vertical mixing engine that can act upon subsets of data in accordance with processing functions called by respective mixing commands. The disclosure provides simplification of selective data readout and processing for image sensors, potentially reducing design, testing, and maintenance overhead, as well as cost and number of integrated circuit components.
摘要翻译：本文公开了用于光学图像传感器的可编程数据读出。作为示例，提供垂直跳跃和垂直混合功能，其响应命令，实现光学传感器数据的动态选择性和处理。数据输出控制系统可以结合或耦合到光学传感器的数据读出电路。输出控制系统包括垂直跳过引擎，其可以响应于一个或多个跳过命令来动态地选择用于输出的数据子集;以及垂直混合引擎，其可以根据由各个混合命令调用的处理函数而对数据子集执行操作。该公开提供了用于图像传感器的选择性数据读出和处理的简化，可能降低设计，测试和维护开销，以及集成电路组件的成本和数量。

8. 发明申请

US20090015301A1 CONTROLLING TIMING DEPENDENCIES IN A MIXED SIGNAL SYSTEM-ON-A-CHIP (SOC) 有权
标题翻译：控制混合信号系统中的时序依赖关系（SOC）
公开(公告)号：US20090015301A1
公开(公告)日：2009-01-15
申请号：US11776006
申请日：2007-07-11
申请人： Roberto Marchesini , Laurent Blanquart , Qianjiang Mao , John D. Wallner
发明人： Roberto Marchesini , Laurent Blanquart , Qianjiang Mao , John D. Wallner
IPC分类号： H03L7/00
CPC分类号： H04N5/335
摘要： The claimed subject matter provides systems and/or methods that facilitate controlling timing dependencies in a mixed signal circuit. Timing performance associated with a horizontal scanner and an analog to digital converter (ADC) can be monitored. Moreover, data related to the monitored timing performance can be leveraged to modify timing parameter(s) of clocks that coordinate operations of the horizontal scanner and the ADC (e.g., and/or digital component(s) included in the mixed signal circuit). For example, the clocks associated with the horizontal scanner and the ADC can be independently tuned to optimize mixed signal circuit performance.
摘要翻译：所要求保护的主题提供了有助于控制混合信号电路中的定时依赖性的系统和/或方法。可以监视与水平扫描仪和模数转换器（ADC）相关的时序性能。此外，可以利用与所监视的定时性能相关的数据来修改协调水平扫描仪和ADC（例如，混合信号电路中包括的和/或数字组件）的操作的时钟的定时参数。例如，可以独立调整与水平扫描器和ADC相关的时钟，以优化混合信号电路性能。

9. 发明申请

US20130050547A1 PROGRAMMABLE DATA READOUT FOR AN OPTICAL SENSOR 有权
标题翻译：光学传感器的可编程数据读数
公开(公告)号：US20130050547A1
公开(公告)日：2013-02-28
申请号：US13217797
申请日：2011-08-25
申请人： Laurent Blanquart , John D. Wallner , Qianjiang Mao
发明人： Laurent Blanquart , John D. Wallner , Qianjiang Mao
IPC分类号： H04N5/335
CPC分类号： H04N5/343 , H04N5/3452 , H04N5/347
摘要： Programmable data readout for optical image sensors is disclosed herein. By way of example, vertical skipping and vertical mixing functionality is provided that is responsive to commands, enabling dynamic selectivity and processing of optical sensor data. A data output control system can be incorporated with or coupled to data readout circuitry of an optical sensor. The output control system comprises a vertical skipping engine that can dynamically select a subset of data for output in response to one or more skipping commands, and a vertical mixing engine that can act upon subsets of data in accordance with processing functions called by respective mixing commands. The disclosure provides simplification of selective data readout and processing for image sensors, potentially reducing design, testing, and maintenance overhead, as well as cost and number of integrated circuit components.
摘要翻译：本文公开了用于光学图像传感器的可编程数据读出。作为示例，提供垂直跳跃和垂直混合功能，其响应命令，实现光学传感器数据的动态选择性和处理。数据输出控制系统可以结合或耦合到光学传感器的数据读出电路。输出控制系统包括垂直跳过引擎，其可以响应于一个或多个跳过命令来动态地选择用于输出的数据子集;以及垂直混合引擎，其可以根据由各个混合命令调用的处理函数而对数据子集执行操作。该公开提供了用于图像传感器的选择性数据读出和处理的简化，可能降低设计，测试和维护开销，以及集成电路组件的成本和数量。

10. 发明授权

US07930580B2 Controlling timing dependencies in a mixed signal system-on-a-chip (SOC) 有权
标题翻译：控制混合信号片上系统（SOC）中的时序相关性
公开(公告)号：US07930580B2
公开(公告)日：2011-04-19
申请号：US11776006
申请日：2007-07-11
申请人： Roberto Marchesini , Laurent Blanquart , Qianjiang Mao , John D. Wallner
发明人： Roberto Marchesini , Laurent Blanquart , Qianjiang Mao , John D. Wallner
IPC分类号： G06F1/00
CPC分类号： H04N5/335
摘要： The claimed subject matter provides systems and/or methods that facilitate controlling timing dependencies in a mixed signal circuit. Timing performance associated with a horizontal scanner and an analog to digital converter (ADC) can be monitored. Moreover, data related to the monitored timing performance can be leveraged to modify timing parameter(s) of clocks that coordinate operations of the horizontal scanner and the ADC (e.g., and/or digital component(s) included in the mixed signal circuit). For example, the clocks associated with the horizontal scanner and the ADC can be independently tuned to optimize mixed signal circuit performance.
摘要翻译：所要求保护的主题提供了有助于控制混合信号电路中的定时依赖性的系统和/或方法。可以监视与水平扫描仪和模数转换器（ADC）相关的时序性能。此外，可以利用与所监视的定时性能相关的数据来修改协调水平扫描仪和ADC（例如，混合信号电路中包括的和/或数字组件）的操作的时钟的定时参数。例如，可以独立调整与水平扫描器和ADC相关的时钟，以优化混合信号电路性能。

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