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1. 发明申请

US20110233672A1 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF 有权
标题翻译：半导体结构及其制造方法
公开(公告)号：US20110233672A1
公开(公告)日：2011-09-29
申请号：US12748703
申请日：2010-03-29
申请人： Yih-Jau CHANG , Shang-Hui Tu , Gene Sheu , Yi-Fong Chang , Nithin Devarajulu Palavalli
发明人： Yih-Jau CHANG , Shang-Hui Tu , Gene Sheu , Yi-Fong Chang , Nithin Devarajulu Palavalli
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7835 , H01L29/0634 , H01L29/0692 , H01L29/42368 , H01L29/66659
摘要： A semiconductor structure is provided. A second conductivity type well region is formed on a first conductivity type substrate. A second conductivity type diffused source and second conductivity type diffused drain are formed on the first conductivity type substrate. A gate structure is formed on the second conductivity type well region between the second conductivity type diffused source and the second conductivity type diffused drain. First conductivity type buried rings are arranged in a horizontal direction, and formed in the second conductivity type well region, and divide the second conductivity type well region into an upper drift region and a lower drift region.
摘要翻译：提供半导体结构。在第一导电型基板上形成第二导电类型阱区。在第一导电型基板上形成第二导电型扩散源极和第二导电型扩散漏极。在第二导电型扩散源和第二导电型扩散漏极之间的第二导电类型阱区上形成栅极结构。第一导电型掩埋环沿水平方向布置，并形成在第二导电类型阱区中，并将第二导电类型阱区划分为上漂移区和下漂移区。

2. 发明授权

US08252652B2 Semiconductor structure and fabrication method thereof 有权
标题翻译：半导体结构及其制造方法
公开(公告)号：US08252652B2
公开(公告)日：2012-08-28
申请号：US12748703
申请日：2010-03-29
申请人： Yih-Jau Chang , Shang-Hui Tu , Gene Sheu , Yi-Fong Chang , Nithin Devarajulu Palavalli
发明人： Yih-Jau Chang , Shang-Hui Tu , Gene Sheu , Yi-Fong Chang , Nithin Devarajulu Palavalli
IPC分类号： H01L21/336 , H01L29/06
CPC分类号： H01L29/7835 , H01L29/0634 , H01L29/0692 , H01L29/42368 , H01L29/66659
摘要： A semiconductor structure is provided. A second conductivity type well region is formed on a first conductivity type substrate. A second conductivity type diffused source and second conductivity type diffused drain are formed on the first conductivity type substrate. A gate structure is formed on the second conductivity type well region between the second conductivity type diffused source and the second conductivity type diffused drain. First conductivity type buried rings are arranged in a horizontal direction, and formed in the second conductivity type well region, and divide the second conductivity type well region into an upper drift region and a lower drift region.
摘要翻译：提供半导体结构。在第一导电型基板上形成第二导电类型阱区。在第一导电型基板上形成第二导电型扩散源极和第二导电型扩散漏极。在第二导电型扩散源和第二导电型扩散漏极之间的第二导电类型阱区上形成栅极结构。第一导电型掩埋环沿水平方向布置，并形成在第二导电类型阱区中，并将第二导电类型阱区划分为上漂移区和下漂移区。

3. 发明授权

US08154078B2 Semiconductor structure and fabrication method thereof 有权
标题翻译：半导体结构及其制造方法
公开(公告)号：US08154078B2
公开(公告)日：2012-04-10
申请号：US12707419
申请日：2010-02-17
申请人： Yih-Jau Chang , Shang-Hui Tu , Gene Sheu
发明人： Yih-Jau Chang , Shang-Hui Tu , Gene Sheu
IPC分类号： H01L29/66
CPC分类号： H01L29/7835 , H01L29/0634 , H01L29/0696 , H01L29/42368 , H01L29/66659
摘要： A semiconductor structure is provided. A second conductivity type well region is disposed on a first conductivity type substrate. A gate structure comprising a first sidewall and second sidewall is provided. The first sidewall is disposed on the second conductivity type well region. A second conductivity type diffused source is disposed on the first conductivity type substrate outside of the second sidewall. A second conductivity type diffused drain is disposed on the second conductivity type well region outside of the first sidewall. First conductivity type buried rings are arranged in a horizontal direction, separated from each other, and formed in the second conductivity type well region. Doped profiles of the first conductivity type buried rings gradually become smaller in a direction from the second conductivity type diffused source to the second conductivity type diffused drain.
摘要翻译：提供半导体结构。第二导电类型阱区设置在第一导电类型的衬底上。提供包括第一侧壁和第二侧壁的栅极结构。第一侧壁设置在第二导电类型的井区上。第二导电型扩散源设置在第二侧壁外侧的第一导电型基板上。第二导电类型扩散漏极设置在第一侧壁外侧的第二导电类型阱区上。第一导电型掩埋环布置在水平方向上，彼此分离，并形成在第二导电类型阱区中。第一导电型掩埋环的掺杂分布在从第二导电型扩散源到第二导电型扩散漏极的方向上逐渐变小。

4. 发明授权

US09076887B2 Method of fabricating a vertical diffusion metal-oxide-semiconductor transistor 有权
标题翻译：制造垂直扩散金属氧化物半导体晶体管的方法
公开(公告)号：US09076887B2
公开(公告)日：2015-07-07
申请号：US13464584
申请日：2012-05-04
申请人： Tsung-Hsiung Lee , Shang-Hui Tu , Rudy Octavius Sihombing
发明人： Tsung-Hsiung Lee , Shang-Hui Tu , Rudy Octavius Sihombing
IPC分类号： H01L29/78 , H01L29/66 , H01L21/336 , H01L21/8234 , H01L29/06 , H01L21/265 , H01L27/088
CPC分类号： H01L21/823487 , H01L21/26586 , H01L27/088 , H01L29/0634 , H01L29/0649 , H01L29/0653 , H01L29/66712 , H01L29/66719 , H01L29/7802
摘要： A method for fabricating a semiconductor device is provided. A method for fabricating a semiconductor device includes providing a semiconductor substrate having a first conductive type. An epitaxy layer having the first conductive type is formed on the semiconductor substrate. First trenches are formed in the epitaxy layer. First insulating liner layers are formed on sidewalls and bottoms of the first trenches. A first dopant having the first conductive type dopes the epitaxy layer from the sidewalls of the first trenches to form first doped regions. A first insulating material is filled into the first trenches. Second trenches are formed in the epitaxy layer. Second insulating liner layers are formed on sidewalls and bottoms of the second trenches. A second dopant having a second conductive type dopes the epitaxy layer from the sidewalls of the second trenches to form second doped regions.
摘要翻译：提供一种制造半导体器件的方法。一种制造半导体器件的方法包括提供具有第一导电类型的半导体衬底。在半导体衬底上形成具有第一导电类型的外延层。在外延层中形成第一沟槽。第一绝缘衬垫层形成在第一沟槽的侧壁和底部上。具有第一导电类型的第一掺杂剂从第一沟槽的侧壁掺杂外延层以形成第一掺杂区域。第一绝缘材料被填充到第一沟槽中。在外延层中形成第二沟槽。第二绝缘衬垫层形成在第二沟槽的侧壁和底部上。具有第二导电类型的第二掺杂剂从第二沟槽的侧壁掺杂外延层以形成第二掺杂区域。

5. 发明授权

US08921202B2 Semiconductor device and fabrication method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US08921202B2
公开(公告)日：2014-12-30
申请号：US12986225
申请日：2011-01-07
申请人： Geeng-Lih Lin , Kwang-Ming Lin , Shang-Hui Tu , Jui-Chun Chang
发明人： Geeng-Lih Lin , Kwang-Ming Lin , Shang-Hui Tu , Jui-Chun Chang
IPC分类号： H01L21/76 , H01L21/74 , H01L21/8249 , H01L27/06
CPC分类号： H01L29/417 , H01L21/743 , H01L21/8249 , H01L27/0623 , H01L29/0684
摘要： The invention provides a semiconductor device. A buried layer is formed in a substrate. A first deep trench contact structure is formed in the substrate. The first deep trench contact structure comprises a conductor and a liner layer formed on a sidewall of the conductor. A bottom surface of the first deep trench contact structure is in contact with the buried layer.
摘要翻译：本发明提供一种半导体器件。在衬底中形成掩埋层。在衬底中形成第一深沟槽接触结构。第一深沟槽接触结构包括导体和形成在导体的侧壁上的衬里层。第一深沟槽接触结构的底表面与埋层接触。

6. 发明授权

US08809950B2 Semiconductor structure and fabrication method thereof 有权
公开(公告)号：US08809950B2
公开(公告)日：2014-08-19
申请号：US13473532
申请日：2012-05-16
申请人： Shang-Hui Tu , Hung-Shern Tsai
发明人： Shang-Hui Tu , Hung-Shern Tsai
IPC分类号： H01L29/66 , H01L29/08 , H01L29/06 , H01L29/78 , H01L29/423
CPC分类号： H01L29/7835 , H01L29/063 , H01L29/0638 , H01L29/0692 , H01L29/0847 , H01L29/42368 , H01L29/66659
摘要： A method for fabrication of a semiconductor device is provided. A first type doped body region is formed in a first type substrate. A first type heavily-doped region is formed in the first type doped body region. A second type well region and second type bar regions are formed in the first type substrate with the second type bar regions between the second type well region and the first type doped body region. The first type doped body region, the second type well region, and each of the second type bar regions are separated from each other by the first type substrate. The second type bar regions are inter-diffused to form a second type continuous region adjoining the second type well region. A second type heavily-doped region is formed in the second type well region.

7. 发明申请

US20130175607A1 SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20130175607A1
公开(公告)日：2013-07-11
申请号：US13419464
申请日：2012-03-14
申请人： Tsung-Hsiung Lee , Shang-Hui Tu
发明人： Tsung-Hsiung Lee , Shang-Hui Tu
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7802 , H01L21/26586 , H01L29/0634 , H01L29/0649 , H01L29/0878 , H01L29/1095 , H01L29/66712
摘要： A semiconductor device is provided. The semiconductor device includes a substrate having a first doping region and an overlying second doping region, wherein the first and second doping regions have a first conductivity type and wherein the second doping region has at least one first trench and at least one second trench adjacent thereto. A first epitaxial layer is disposed in the first trench and has a second conductivity type. A second epitaxial layer is disposed in the second trench and has the first conductivity type, wherein the second epitaxial layer has a doping concentration greater than that of the second doping region and less than that of the first doping region. A gate structure is disposed on the second trench. A method of fabricating a semiconductor device is also disclosed.
摘要翻译：提供半导体器件。半导体器件包括具有第一掺杂区和上覆第二掺杂区的衬底，其中第一和第二掺杂区具有第一导电类型，并且其中第二掺杂区具有至少一个第一沟槽和与其相邻的至少一个第二沟槽。第一外延层设置在第一沟槽中并且具有第二导电类型。第二外延层设置在第二沟槽中并且具有第一导电类型，其中第二外延层的掺杂浓度大于第二掺杂区的掺杂浓度，并且小于第一掺杂区的掺杂浓度。栅极结构设置在第二沟槽上。还公开了制造半导体器件的方法。

8. 发明申请

US20100148253A1 HIGH VOLTAGE SEMICONDUCTOR DEVICES WITH SCHOTTKY DIODES 有权
标题翻译：具有肖特基二极管的高压半导体器件
公开(公告)号：US20100148253A1
公开(公告)日：2010-06-17
申请号：US12426194
申请日：2009-04-17
申请人： Shang-Hui Tu , Hung-Shern Tsai
发明人： Shang-Hui Tu , Hung-Shern Tsai
IPC分类号： H01L27/06
CPC分类号： H01L29/7835 , H01L29/0692 , H01L29/0696 , H01L29/782
摘要： High voltage semiconductor devices with Schottky diodes are presented. A high voltage semiconductor device includes an LDMOS device and a Schottky diode device. The LDMOS device includes a semiconductor substrate, a P-body region in a first region of the substrate, and an N-drift region in the second region of the substrate with a junction therebetween. A patterned isolation region defines an active region. An anode electrode is disposed on the P-body region. An N+-doped region is disposed in the N-drift region. A cathode electrode is disposed on the N+-doped region. The Schottky diode includes an N-drift region on the semiconductor substrate. The anode electrode is disposed on the N-drift region at the first region of the substrate. The N+-doped region is disposed on the N-drift region at the second region of the substrate. The cathode electrode is disposed on the N+-doped region.
摘要翻译：提出了具有肖特基二极管的高电压半导体器件。高压半导体器件包括LDMOS器件和肖特基二极管器件。 LDMOS器件包括半导体衬底，衬底的第一区域中的P体区域和衬底的第二区域中的N漂移区域，其间具有接合部。图案化隔离区限定有源区。阳极电极设置在P体区域上。 N +掺杂区域设置在N漂移区域中。在N +掺杂区域上设置阴极电极。肖特基二极管包括半导体衬底上的N漂移区。阳极电极设置在衬底的第一区域的N漂移区上。 N +掺杂区域设置在衬底的第二区域的N漂移区上。阴极电极设置在N +掺杂区域上。

9. 发明申请

US20140035029A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20140035029A1
公开(公告)日：2014-02-06
申请号：US13565079
申请日：2012-08-02
申请人： Rudy Octavius Sihombing , Chia-Hao Lee , Tsung-Hsiung Lee , Shang-Hui Tu
发明人： Rudy Octavius Sihombing , Chia-Hao Lee , Tsung-Hsiung Lee , Shang-Hui Tu
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7811 , H01L21/26586 , H01L29/0634 , H01L29/0653 , H01L29/0878 , H01L29/1095 , H01L29/167 , H01L29/66712
摘要： A semiconductor device including a semiconductor substrate of a first conductivity type and an epitaxial layer of the first conductivity type disposed thereon is disclosed. Pluralities of first and second trenches are alternately arranged in the epitaxial layer. First and second doped regions of the first conductivity type are formed in the epitaxial layer and surrounding each first trench. A third doped region of a second conductivity type is formed in the epitaxial layer and surrounding each second trench. A first dopant in the first doped region has diffusivity larger than that of a second dopant in the second doped region. A method for fabricating a semiconductor device is also disclosed.
摘要翻译：公开了一种包括第一导电类型的半导体衬底和设置在其上的第一导电类型的外延层的半导体器件。多个第一沟槽和第二沟槽交替布置在外延层中。第一导电类型的第一和第二掺杂区域形成在外延层中并围绕每个第一沟槽。第二导电类型的第三掺杂区域形成在外延层中并围绕每个第二沟槽。第一掺杂区域中的第一掺杂剂在第二掺杂区域中的扩散率大于第二掺杂剂的扩散率。还公开了一种制造半导体器件的方法。

10. 发明授权

US08643089B2 Semiconductor device and fabricating method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US08643089B2
公开(公告)日：2014-02-04
申请号：US13419464
申请日：2012-03-14
申请人： Tsung-Hsiung Lee , Shang-Hui Tu
发明人： Tsung-Hsiung Lee , Shang-Hui Tu
IPC分类号： H01L29/66 , H01L21/336
CPC分类号： H01L29/7802 , H01L21/26586 , H01L29/0634 , H01L29/0649 , H01L29/0878 , H01L29/1095 , H01L29/66712
摘要： A semiconductor device is provided. The semiconductor device includes a substrate having a first doping region and an overlying second doping region, wherein the first and second doping regions have a first conductivity type and wherein the second doping region has at least one first trench and at least one second trench adjacent thereto. A first epitaxial layer is disposed in the first trench and has a second conductivity type. A second epitaxial layer is disposed in the second trench and has the first conductivity type, wherein the second epitaxial layer has a doping concentration greater than that of the second doping region and less than that of the first doping region. A gate structure is disposed on the second trench. A method of fabricating a semiconductor device is also disclosed.
摘要翻译：提供半导体器件。半导体器件包括具有第一掺杂区和上覆第二掺杂区的衬底，其中第一和第二掺杂区具有第一导电类型，并且其中第二掺杂区具有至少一个第一沟槽和与其相邻的至少一个第二沟槽。第一外延层设置在第一沟槽中并且具有第二导电类型。第二外延层设置在第二沟槽中并且具有第一导电类型，其中第二外延层的掺杂浓度大于第二掺杂区的掺杂浓度，并且小于第一掺杂区的掺杂浓度。栅极结构设置在第二沟槽上。还公开了制造半导体器件的方法。

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