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1. 发明授权

US06926818B1 Method to enhance the adhesion between dry film and seed metal 有权
标题翻译：提高干膜和种子金属之间粘附的方法
公开(公告)号：US06926818B1
公开(公告)日：2005-08-09
申请号：US09961557
申请日：2001-09-24
申请人： Yih-Ann Lin , Tung-Heng Shie , Kai-Ming Ching , Sheng-Liang Pan , Kuo-Liang Lu
发明人： Yih-Ann Lin , Tung-Heng Shie , Kai-Ming Ching , Sheng-Liang Pan , Kuo-Liang Lu
IPC分类号： C25D5/02
CPC分类号： C25D5/022 , H01L2224/0401 , H01L2224/05557
摘要： A method of forming a bump structure through the use of an electroplating solution, comprising the following steps. A substrate having an overlying conductive structure is provided. A patterned dry film resist is formed over the conductive structure. The patterned dry film resist having a trench exposing a portion of conductive structure. The patterned dry film resist adhering to the conductive structure at an interface. The structure is treated with a treatment that increases the adherence of the patterned dry film resist to the conductive structure at the interface. A conductive plug is over the exposed portion of the conductive structure within the trench through the use of the electroplating solution. The increased adhesion of the patterned dry film resist to the conductive structure at the interface preventing the electroplating solution from penetrating the interface of the patterned dry film resist and the conductive structure during the formation of the conductive plug. The patterned dry film resist is removed from the conductive structure. The conductive plug is reflowed to form the bump structure.
摘要翻译：通过使用电镀液形成凸点结构的方法，包括以下步骤。提供具有上覆导电结构的基板。在导电结构上形成图案化的干膜抗蚀剂。图案化的干膜抗蚀剂具有暴露导电结构的一部分的沟槽。在界面处附着在导电结构上的图案化的干膜抗蚀剂。通过增加图案化的干膜抗蚀剂在界面处的导电结构的粘附性的处理来处理该结构。通过使用电镀溶液，导电插塞在沟槽内的导电结构的暴露部分之上。图案化的干膜抗蚀剂在界面处增加了对导电结构的粘附，防止电镀溶液在形成导电插塞期间渗透图案化的干膜抗蚀剂和导电结构的界面。从导电结构去除图案化的干膜抗蚀剂。导电塞被回流以形成凸块结构。

2. 发明授权

US06468704B1 Method for improved photomask alignment after epitaxial process through 90° orientation change 有权
标题翻译：在通过90°取向变化的外延工艺后改进光掩模对准的方法
公开(公告)号：US06468704B1
公开(公告)日：2002-10-22
申请号：US09835027
申请日：2001-04-16
申请人： Chi-Hung Liao , Yih-Ann Lin , Sheng-Liang Pan , Cheng-Yu Chu , Kuo-Liang Lu , Yu Hsi Wang
发明人： Chi-Hung Liao , Yih-Ann Lin , Sheng-Liang Pan , Cheng-Yu Chu , Kuo-Liang Lu , Yu Hsi Wang
IPC分类号： G03F900
CPC分类号： G03F9/7046 , G03F9/7076 , H01L23/544 , H01L2223/54453 , H01L2924/0002 , H01L2924/00
摘要： A method for alignment to an alignment mark array within a patterned electronic material layer, formed on a substrate employed in a microelectronics fabrication, with improved registration accuracy of a subsequent step-and-repeat photomask pattern. There is first provided a substrate upon which is formed a patterned microelectronics layer containing an alignment mark array. There is then formed over the substrate and patterned layer, covering over the alignment marks, a subsequent layer or layers which may be of opaque material. In order to align properly a patterned photomask for patterning the overlying layer by means of conventional photolithography, the alignment mark array is located by first scanning with a laser light source contained within a step-and-repeat apparatus containing the patterned photomask and detecting the optical radiation signal scattered from the alignment mark array. The accuracy of location may be enhanced by rotating the orientation of the alignment mark array with respect to the direction of scanning with the laser light source by 90 degrees to render the subsequent orientation orthogonal to the first orientation, and then repeating the scanning operation. The altered nature of the back-scattered light signal from the orthogonal scanning direction provides additional information for improving the precision of location and alignment.
摘要翻译：一种用于对准图案化电子材料层内的对准标记阵列的方法，其形成在微电子制造中使用的衬底上，具有改进的后续步进重复光掩模图案的配准精度。首先设置有基板，在其上形成包含对准标记阵列的图案化微电子层。然后在衬底和图案化层上形成覆盖对准标记的后续层或层，其可以是不透明材料。为了适当地对准用于通过常规光刻法图案化上覆层的图案化光掩模，通过首先用包含在包含图案化光掩模的步进重复设备中的激光源进行扫描来定位对准标记阵列，并且检测光学从对准标记阵列散射的辐射信号。可以通过将对准标记阵列的方向相对于激光光源的扫描方向旋转90度来使得随后的方向与第一方位正交，然后重复扫描操作来提高位置的精度。来自正交扫描方向的反向散射光信号的改变性质提供了用于提高位置和对准精度的附加信息。

3. 发明授权

US06623912B1 Method to form the ring shape contact to cathode on wafer edge for electroplating in the bump process when using the negative type dry film photoresist 有权
标题翻译：在使用负型干膜光致抗蚀剂时，在凸块工艺中形成与晶片边缘上的阴极形成环形电镀方法
公开(公告)号：US06623912B1
公开(公告)日：2003-09-23
申请号：US09867094
申请日：2001-05-30
申请人： Kai-Ming Ching , Yu-Kung Hsiao , Sheng-Liang Pan , Kuo-Liang Lu
发明人： Kai-Ming Ching , Yu-Kung Hsiao , Sheng-Liang Pan , Kuo-Liang Lu
IPC分类号： G03F730
CPC分类号： H01L21/76885 , H01L24/11 , H01L2224/05568 , H01L2224/05573 , H01L2224/1147 , H01L2224/13099 , H01L2924/00014 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01059 , H01L2924/01075 , H01L2924/01078 , H01L2924/014 , H01L2224/05599
摘要： A method of clearing photoresist on a wafer edge, including the following steps. A wafer having a upper exposed conductive layer is provided. The wafer having a center, an edge and a ring-shaped area proximate the wafer edge. A photoresist layer is formed upon the exposed conductive layer. The photoresist layer is removed from within the ring-shaped area by a rinse process to expose the conductive layer within the ring-shaped area. An oxygen diffusion barrier layer is formed over the photoresist layer.
摘要翻译：一种在晶片边缘上清除光致抗蚀剂的方法，包括以下步骤。提供具有上暴露导电层的晶片。该晶片具有靠近晶片边缘的中心，边缘和环形区域。在暴露的导电层上形成光致抗蚀剂层。通过漂洗工艺从环形区域内去除光致抗蚀剂层，以暴露环形区域内的导电层。在光致抗蚀剂层上形成氧扩散阻挡层。

4. 发明授权

US07009772B2 High transmittance overcoat for microlens arrays in semiconductor color imagers 有权
标题翻译：用于半导体彩色成像器中的微透镜阵列的高透射率外涂层
公开(公告)号：US07009772B2
公开(公告)日：2006-03-07
申请号：US10957920
申请日：2004-10-04
申请人： Yu-Kung Hsiao , Sheng-Liang Pan , Bii-Juno Chang , Kuo-Liang Lu
发明人： Yu-Kung Hsiao , Sheng-Liang Pan , Bii-Juno Chang , Kuo-Liang Lu
IPC分类号： G02B27/10
CPC分类号： H01L27/14627 , H01L27/14621 , H01L27/14623 , H01L31/02327
摘要： A transmittance overcoat with effectively planar top surface and specified optical and materials properties is applied above a microlens layer to extend the focal length and enhance the performance of long focal length microlenses for semiconductor array color imaging devices. The geometrical optics design factors and microelectric fabrication sequence to achieve optimized long focal length microlens performance are disclosed. The principal advantages of the adaptive process taught in the present invention is shown to enable real-time compensation adjustments for process and material variations. The overcoat process enables simplified single-layer integrated microlens optics for low-cost, high volume manufacturing of CMOS and CCD color video cameras.
摘要翻译：在微透镜层之上施加具有有效平面顶表面和特定光学和材料特性的透光率外涂层以延长焦距并增强半导体阵列彩色成像装置的长焦距微透镜的性能。公开了实现优化的长焦距微透镜性能的几何光学设计因子和微电子制造序列。示出了本发明中教导的自适应过程的主要优点，以实现对过程和材料变化的实时补偿调整。外涂层工艺可实现简化的单层集成微透镜光学器件，用于CMOS和CCD彩色摄像机的低成本，大批量制造。

5. 发明授权

US06586322B1 Method of making a bump on a substrate using multiple photoresist layers 有权
标题翻译：使用多个光致抗蚀剂层在基板上制造凸块的方法
公开(公告)号：US06586322B1
公开(公告)日：2003-07-01
申请号：US10032341
申请日：2001-12-21
申请人： Chih-Cheng Chiu , Sheng-Liang Pan , Kuo-Liang Lu
发明人： Chih-Cheng Chiu , Sheng-Liang Pan , Kuo-Liang Lu
IPC分类号： H01L2144
CPC分类号： H01L24/11 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/0345 , H01L2224/0346 , H01L2224/03462 , H01L2224/0347 , H01L2224/03912 , H01L2224/0401 , H01L2224/05027 , H01L2224/05147 , H01L2224/05166 , H01L2224/05655 , H01L2224/1147 , H01L2224/11474 , H01L2224/11849 , H01L2224/11902 , H01L2224/11914 , H01L2224/13023 , H01L2224/13111 , H01L2924/00013 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/0105 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/30105 , H01L2924/30107 , H01L2924/00014 , H01L2224/13099 , H01L2224/05099 , H01L2224/13599 , H01L2224/05599 , H01L2224/29099 , H01L2224/29599
摘要： A method of forming a bump on a substrate such as a semiconductor wafer or flip chip. The method includes the step of providing a semiconductor device having a contact pad and an upper passivation layer and an opening formed in the upper passivation layer exposing a portion of the contact pad. An under bump metallurgy is deposited over the upper passivation layer and the contact pad. A first photoresist layer is deposited in a liquid state so that the first photoresist layer covers the under bump metallurgy. A second photoresist layer is deposited and the second photoresist layer is a dry film photoresist. The unexposed portions of the first photoresist layer are removed. The remaining portions of the first photoresist layers are removed. The electrically conductive material is reflown to provide a bump on the semiconductor device.
摘要翻译：在半导体晶片或倒装芯片等基板上形成凸点的方法。该方法包括提供具有接触焊盘和上钝化层的半导体器件的步骤，以及形成在上钝化层中的开口，露出接触焊盘的一部分。在上钝化层和接触焊盘上沉积凸块下冶金。以液态沉积第一光致抗蚀剂层，使得第一光致抗蚀剂层覆盖凸块下金属。沉积第二光致抗蚀剂层，第二光致抗蚀剂层是干膜光致抗蚀剂。去除第一光致抗蚀剂层的未曝光部分。去除第一光致抗蚀剂层的剩余部分。导电材料被重熔以在半导体器件上提供凸块。

6. 发明授权

US06495813B1 Multi-microlens design for semiconductor imaging devices to increase light collection efficiency in the color filter process 有权
标题翻译：用于半导体成像装置的多微透镜设计，以提高滤色镜过程中的光采集效率
公开(公告)号：US06495813B1
公开(公告)日：2002-12-17
申请号：US09414926
申请日：1999-10-12
申请人： Yang-Tung Fan , Bii-Cheng Chang , Sheng-Liang Pan , Kuo-Liang Lu
发明人： Yang-Tung Fan , Bii-Cheng Chang , Sheng-Liang Pan , Kuo-Liang Lu
IPC分类号： H01L2700
CPC分类号： H01L27/14603 , H01L27/14627
摘要： Multi-microlens arrays for optimizing light collection efficiency in CCD/CMOS solid-state color image cameras with L-shaped or non-regular photodetector areas are disclosed. Microelectronic fabrication methods for forming planar array multi-microlenses comprised of elements consisting of lens-pairs, integrated with color-filters, and compatible with CMOS high-volume manufacturing are taught. Experimental results demonstrating the processes for fabrication of multi-microlenses for L-shaped and for non-regular sensing areas are given.
摘要翻译：公开了用于优化具有L形或非常规光电探测器区域的CCD / CMOS固态彩色摄像机中的光收集效率的多微透镜阵列。教导了用于形成平面阵列多微透镜的微电子制造方法，所述平面阵列多微透镜由与彩色滤光片集成并与CMOS大批量制造兼容的透镜对构成的元件组成。给出了证明L型和非常规感测区域的多微透镜制造工艺的实验结果。

7. 发明授权

US06171885B2 High efficiency color filter process for semiconductor array imaging devices 有权
标题翻译：用于半导体阵列成像器件的高效率滤色器工艺
公开(公告)号：US06171885B2
公开(公告)日：2001-01-09
申请号：US09414925
申请日：1999-10-12
申请人： Yang-Tung Fan , Sheng-Liang Pan , Bii-Cheng Chang , Kuo-Liang Lu
发明人： Yang-Tung Fan , Sheng-Liang Pan , Bii-Cheng Chang , Kuo-Liang Lu
IPC分类号： H01L21339
CPC分类号： H01L27/14609 , H01L27/14621 , H01L27/14627
摘要： A microelectronic method is described for optimizing the fabrication of optical and semiconductor array structures for high efficiency color image formation in solid-state cameras. Disclosed is an ordered fabrication sequence in which microlens formation precedes color filter layer formation to enable increased image light collection efficiency, to encapsulate and protect the microlens elements from chemical and thermal processing damage, to minimize topographical underlayer variations which would axially misalign or otherwise aberrate microlens elements formed on non-planar surfaces, and, to complete the most difficult steps early in the process to minimize rework and scrap. A CMOS, CID, or CCD optoelectronic configuration is formed by photolithographically patterning a planar-array of photodiodes on a Silicon or other III-V, II-VI, or compound semiconductor substrate. The photodiode array is provided with metal photoshields, passivated, planarized, and, a first convex microlens array of high curvature or other suitable lenses are formed thereon. A transparent encapsulant is deposited to planarize the microlens layer and provide a spacer for the successive deposition(s) of one or more color filter layers. The microlens array may be formed from positive photoresists and the spacer from negative resist, with close attention to matching the index of refraction at layer interfaces. A final surface layer comprising a color filter completes the solid-state color image-forming device.
摘要翻译：描述了用于优化固态照相机中用于高效率彩色图像形成的光学和半导体阵列结构的制造的微电子方法。公开了一种有序的制造顺序，其中微透镜形成在滤色器层形成之前，以提高图像光采集效率，封装和保护微透镜元件免受化学和热处理损伤，以最小化将轴向不对准或以其他方式将微透镜像差的形貌底层变化在非平面表面上形成的元件，并且在过程的早期完成最困难的步骤，以最小化返工和废料。通过光刻地图案化硅或其它III-V，II-VI或化合物半导体衬底上的光电二极管平面阵列来形成CMOS，CID或CCD光电结构。光电二极管阵列设置有金属遮光罩，钝化，平面化，并且在其上形成高曲率的第一凸形微透镜阵列或其它合适的透镜。沉积透明的密封剂以使微透镜层平坦化，并为一个或多个滤色器层的连续沉积提供间隔物。微透镜阵列可以由正光致抗蚀剂和来自负光刻胶的间隔物形成，密切关注层界面处的折射率的匹配。包括滤色器的最终表面层完成了固态彩色图像形成装置。

8. 发明申请

US20050041296A1 High transmittance overcoat for microlens arrays in semiconductor color imagers 有权
标题翻译：用于半导体彩色成像器中的微透镜阵列的高透射率外涂层
公开(公告)号：US20050041296A1
公开(公告)日：2005-02-24
申请号：US10957920
申请日：2004-10-04
申请人： Yu-Kung Hsiao , Sheng-Liang Pan , Bii-Juno Chang , Kuo-Liang Lu
发明人： Yu-Kung Hsiao , Sheng-Liang Pan , Bii-Juno Chang , Kuo-Liang Lu
IPC分类号： G02B27/10 , H01L21/00 , H01L31/0203 , H01L31/0232
CPC分类号： H01L27/14627 , H01L27/14621 , H01L27/14623 , H01L31/02327
摘要： A transmittance overcoat with effectively planar top surface and specified optical and materials properties is applied above a microlens layer to extend the focal length and enhance the performance of long focal length microlenses for semiconductor array color imaging devices. The geometrical optics design factors and microelectric fabrication sequence to achieve optimized long focal length microlens performance are disclosed. The principal advantages of the adaptive process taught in the present invention is shown to enable real-time compensation adjustments for process and material variations. The overcoat process enables simplified single-layer integrated microlens optics for low-cost, high volume manufacturing of CMOS and CCD color video cameras.
摘要翻译：在微透镜层之上施加具有有效平面顶表面和特定光学和材料特性的透光率外涂层以延长焦距并增强半导体阵列彩色成像装置的长焦距微透镜的性能。公开了实现优化的长焦距微透镜性能的几何光学设计因子和微电子制造序列。示出了本发明中教导的自适应过程的主要优点，以实现对过程和材料变化的实时补偿调整。外涂层工艺可实现简化的单层集成微透镜光学器件，用于CMOS和CCD彩色摄像机的低成本，大批量制造。

9. 发明授权

US06821810B1 High transmittance overcoat for optimization of long focal length microlens arrays in semiconductor color imagers 有权
标题翻译：高透光率外涂层，用于优化半导体彩色成像器中的长焦距微透镜阵列
公开(公告)号：US06821810B1
公开(公告)日：2004-11-23
申请号：US09633644
申请日：2000-08-07
申请人： Yu-Kung Hsiao , Sheng-Liang Pan , Bii-Juno Chang , Kuo-Liang Lu
发明人： Yu-Kung Hsiao , Sheng-Liang Pan , Bii-Juno Chang , Kuo-Liang Lu
IPC分类号： H01L2100
CPC分类号： H01L27/14627 , H01L27/14621 , H01L27/14623 , H01L31/02327
摘要： A transmittance overcoat with effectively planar top surface and specified optical and materials properties is applied above a microlens layer to extend the focal length and enhance the performance of long focal length microlenses for semiconductor array color imaging devices. The geometrical optics design factors and microelectronic fabrication sequence to achieve optimized long focal length microlens performance are disclosed. The principal advantages of the adaptive process taught in the present invention is shown to enable real-time compensation adjustments for process and material variations. The overcoat process enables simplified single-layer integrated microlens optics for lowcost, high volume manufacturing of CMOS and CCD color video cameras.
摘要翻译：在微透镜层之上施加具有有效平面顶表面和特定光学和材料特性的透光率外涂层以延长焦距并增强半导体阵列彩色成像装置的长焦距微透镜的性能。公开了实现优化的长焦距微透镜性能的几何光学设计因子和微电子制造序列。示出了本发明中教导的自适应过程的主要优点，以实现对过程和材料变化的实时补偿调整。外涂层工艺使简化的单层集成微透镜光学器件用于CMOS和CCD彩色摄像机的低成本，大批量制造。

10. 发明授权

US06274917B1 High efficiency color filter process for semiconductor array imaging devices 有权
公开(公告)号：US06274917B1
公开(公告)日：2001-08-14
申请号：US09693505
申请日：2000-10-23
申请人： Yang-Tung Fan , Sheng-Liang Pan , Bii-Cheng Chang , Kuo-Liang Lu
发明人： Yang-Tung Fan , Sheng-Liang Pan , Bii-Cheng Chang , Kuo-Liang Lu
IPC分类号： H01L310232
CPC分类号： H01L27/14609 , H01L27/14621 , H01L27/14627
摘要： A microelectronic method is described for optimizing the fabrication of optical and semiconductor array structures for high efficiency color image formation in solid-state cameras. Disclosed is an ordered fabrication sequence in which microlens formation precedes color filter layer formation to enable increased image light collection efficiency, to encapsulate and protect the microlens elements from chemical and thermal processing damage, to minimize topographical underlayer variations which would axially misalign or otherwise aberrate microlens elements formed on non-planar surfaces, and, to complete the most difficult steps early in the process to minimize rework and scrap. A CMOS, CID, or CCD optoelectronic configuration is formed by photolithographically patterning a planar-array of photodiodes on a Silicon or other III-V, II-VI, or compound semiconductor substrate. The photodiode array is provided with metal photoshields, passivated, planarized, and, a first convex microlens array of high curvature or other suitable lenses are formed thereon. A transparent encapsulant is deposited to planarize the microlens layer and provide a spacer for the successive deposition(s) of one or more color filter layers. The microlens array may be formed from positive photoresists and the spacer from negative resist, with close attention to matching the index of refraction at layer interfaces. A final surface layer comprising a color filter completes the solid-state color image-forming device.

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