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1. 发明授权

US08982031B2 Display panel having a plurality of multiplexers for driving a plurality of first driving switches and a plurality of second driving switches 有权
标题翻译：显示面板具有用于驱动多个第一驱动开关和多个第二驱动开关的多个多路复用器
公开(公告)号：US08982031B2
公开(公告)日：2015-03-17
申请号：US13610900
申请日：2012-09-12
申请人： Yi-Xuan Hung , Yu-Hsin Ting , Chen-Ming Chen , Szu-Chieh Chen , Da-Wei Fan , Chung-Lin Fu
发明人： Yi-Xuan Hung , Yu-Hsin Ting , Chen-Ming Chen , Szu-Chieh Chen , Da-Wei Fan , Chung-Lin Fu
IPC分类号： G09G3/36 , G09G3/20
CPC分类号： G09G3/20 , G09G2310/0218 , G09G2310/0275 , G09G2310/0281 , G09G2310/0297
摘要： A display panel includes a plurality of first driving switches installed at a first side of the display panel, a plurality of second switches installed at a second side of the display panel, a plurality of first data lines, a plurality of second data lines, a plurality of scan lines, and a plurality of pixels. Each of the first driving switches includes a first input end and a plurality of first output ends. Each of the second driving switches includes a second input end and a plurality of second output ends. The first data lines are electrically connected to the first output ends. The second data lines are electrically connected to the second output ends. The plurality of pixels are electrically connected to the plurality of first data lines, second data lines and scan lines for displaying images. The first data lines and the second data lines are arranged interlacedly.
摘要翻译：显示面板包括安装在显示面板的第一侧的多个第一驱动开关，安装在显示面板的第二侧的多个第二开关，多个第一数据线，多条第二数据线，多个扫描线，以及多个像素。每个第一驱动开关包括第一输入端和多个第一输出端。每个第二驱动开关包括第二输入端和多个第二输出端。第一数据线电连接到第一输出端。第二数据线电连接到第二输出端。多个像素电连接到多个第一数据线，第二数据线和用于显示图像的扫描线。第一数据线和第二数据线被交错布置。

2. 发明申请

US20130127801A1 DISPLAY PANEL 有权
标题翻译：显示面板
公开(公告)号：US20130127801A1
公开(公告)日：2013-05-23
申请号：US13610900
申请日：2012-09-12
申请人： Yi-Xuan Hung , Yu-Hsin Ting , Chen-Ming Chen , Szu-Chieh Chen , Da-Wei Fan , Chung-Lin Fu
发明人： Yi-Xuan Hung , Yu-Hsin Ting , Chen-Ming Chen , Szu-Chieh Chen , Da-Wei Fan , Chung-Lin Fu
IPC分类号： G06F3/038
CPC分类号： G09G3/20 , G09G2310/0218 , G09G2310/0275 , G09G2310/0281 , G09G2310/0297
摘要： A display panel includes a plurality of first driving switches installed at a first side of the display panel, a plurality of second switches installed at a second side of the display panel, a plurality of first data lines, a plurality of second data lines, a plurality of scan lines, and a plurality of pixels. Each of the first driving switches includes a first input end and a plurality of first output ends. Each of the second driving switches includes a second input end and a plurality of second output ends. The first data lines are electrically connected to the first output ends. The second data lines are electrically connected to the second output ends. The plurality of pixels are electrically connected to the plurality of first data lines, second data lines and scan lines for displaying images. The first data lines and the second data lines are arranged interlacedly.
摘要翻译：显示面板包括安装在显示面板的第一侧的多个第一驱动开关，安装在显示面板的第二侧的多个第二开关，多个第一数据线，多个第二数据线，多个扫描线，以及多个像素。每个第一驱动开关包括第一输入端和多个第一输出端。每个第二驱动开关包括第二输入端和多个第二输出端。第一数据线电连接到第一输出端。第二数据线电连接到第二输出端。多个像素电连接到多个第一数据线，第二数据线和用于显示图像的扫描线。第一数据线和第二数据线被交错布置。

3. 发明申请

US20110292005A1 DISPLAY APPARATUS AND METHOD FOR ELIMINATING GHOST THEREOF 审中-公开
标题翻译：显示装置及其消除愚蠢的方法
公开(公告)号：US20110292005A1
公开(公告)日：2011-12-01
申请号：US12940765
申请日：2010-11-05
申请人： Chee-Wai LAU , Yu-Hsin Ting , Chung-Lin Fu , Wei-Chun Hsu , Nan-Ying Lin , Fu-Yuan Liou
发明人： Chee-Wai LAU , Yu-Hsin Ting , Chung-Lin Fu , Wei-Chun Hsu , Nan-Ying Lin , Fu-Yuan Liou
IPC分类号： G09G5/00
CPC分类号： G09G3/3677 , G09G3/3688 , G09G2320/0257 , G09G2330/027
摘要： A display apparatus includes a plurality of scan lines, a plurality of data lines, a plurality of pixel transistors, a plurality of pixel electrodes, a gate driver, a source driver and a discharge circuit. The data lines are intersected with the scan lines. Each of the pixel transistors is electrically coupled to a corresponding scan line and a corresponding data line, and each of the pixel electrodes is electrically coupled to a corresponding pixel transistor. The gate driver is electrically coupled to the scan lines, and the source driver is electrically coupled to the data lines. The discharge circuit is electrically coupled to the gate driver and the data lines. The discharge circuit starts when the display apparatus is turned off, to control the gate drive for turning on the pixel transistors simultaneously, and make the pixel electrodes be electrically communicated with a reference voltage.
摘要翻译：显示装置包括多条扫描线，多条数据线，多个像素晶体管，多个像素电极，栅极驱动器，源极驱动器和放电电路。数据线与扫描线相交。每个像素晶体管电耦合到对应的扫描线和对应的数据线，并且每个像素电极电耦合到相应的像素晶体管。栅极驱动器电耦合到扫描线，并且源极驱动器电耦合到数据线。放电电路电耦合到栅极驱动器和数据线。当显示装置关闭时，放电电路开始，同时控制栅极驱动以同时开启像素晶体，并使像素电极与基准电压电连通。

4. 发明授权

US08766899B2 Active liquid crystal display panel 有权
标题翻译：主动液晶显示面板
公开(公告)号：US08766899B2
公开(公告)日：2014-07-01
申请号：US13087328
申请日：2011-04-14
申请人： Wei-Chun Hsu , Yu-Hsin Ting , Chung-Lin Fu , Tsao-Wen Lu , Nan-Ying Lin , Pei-Hua Chen
发明人： Wei-Chun Hsu , Yu-Hsin Ting , Chung-Lin Fu , Tsao-Wen Lu , Nan-Ying Lin , Pei-Hua Chen
IPC分类号： G09G3/36 , G09G5/00
CPC分类号： G09G3/3648 , G09G3/3677 , G09G2320/0214
摘要： An active liquid crystal display panel includes a pixel array, a gate driving circuit, a data driving circuit, and an analog buffer. The gate driving circuit is used for driving M first scan lines where M is a natural number. The analog buffer is coupled to the gate driving circuit and includes M buffer circuits and a regulator. Each buffer circuit drives a corresponding second scan line according to an output signal of a corresponding first scan line of the M first scan lines, and the regulator is used for maintaining at least one reference voltage supplied to the M buffer circuits.
摘要翻译：有源液晶显示面板包括像素阵列，栅极驱动电路，数据驱动电路和模拟缓冲器。栅极驱动电路用于驱动M是自然数的M个第一扫描线。模拟缓冲器耦合到栅极驱动电路，并包括M个缓冲电路和调节器。每个缓冲电路根据M个第一扫描线的对应的第一扫描线的输出信号驱动相应的第二扫描线，并且调节器用于保持提供给M个缓冲电路的至少一个参考电压。

5. 发明申请

US20130141315A1 FLAT PANEL DISPLAY, SHIFT REGISTER AND METHOD OF CONTROLLING THE SHIFT REGISTER 有权
标题翻译：平板显示器，移位寄存器和控制移位寄存器的方法
公开(公告)号：US20130141315A1
公开(公告)日：2013-06-06
申请号：US13661239
申请日：2012-10-26
申请人： Pei-Hua Chen , Yu-Hsin Ting , Chung-Lin Fu , Tsao-Wen Lu , Nan-Ying Lin , Wei-Chun Hsu
发明人： Pei-Hua Chen , Yu-Hsin Ting , Chung-Lin Fu , Tsao-Wen Lu , Nan-Ying Lin , Wei-Chun Hsu
IPC分类号： G11C19/00 , G09G3/20
CPC分类号： G11C19/28 , G09G3/3648 , G09G3/3677 , G09G3/38 , G09G2310/0286 , G11C19/00 , G11C19/184
摘要： A shift register includes shift register units, in which at least one shift register unit is coupled to a forestage shift register unit and a post-stage shift register unit, where the at least one shift register unit includes a signal input circuit, a signal output circuit, a pull down circuit and a switching circuit. The signal input circuit electrically coupled to the forestage shift register unit can receive a logic signal from the forestage shift register. The signal output circuit is electrically coupled to the signal input circuit via a control signal terminal and is electrically coupled to the post-stage shift register unit. The signal output to circuit can receive a first clock signal. The pull down circuit is electrically coupled to or electrically isolated from the control signal terminal through the switching circuit.
摘要翻译：移位寄存器包括移位寄存器单元，其中至少一个移位寄存器单元耦合到林格移位寄存器单元和后级移位寄存器单元，其中至少一个移位寄存器单元包括信号输入电路，信号输出电路，下拉电路和开关电路。电连接到林间移位寄存器单元的信号输入电路可以从林格移位寄存器接收逻辑信号。信号输出电路经由控制信号端子电耦合到信号输入电路，并且电耦合到后级移位寄存器单元。输出到电路的信号可以接收第一个时钟信号。下拉电路通过开关电路与控制信号端子电耦合或电隔离。

6. 发明授权

US08115754B2 Data line driving method 有权
标题翻译：数据线驱动方式
公开(公告)号：US08115754B2
公开(公告)日：2012-02-14
申请号：US12413835
申请日：2009-03-30
申请人： Chung-Lin Fu , Fu-Yuan Liou , Yu-Hsin Ting , Shu-Huan Hsieh
发明人： Chung-Lin Fu , Fu-Yuan Liou , Yu-Hsin Ting , Shu-Huan Hsieh
IPC分类号： G06F3/038
CPC分类号： G09G3/3611 , G09G2310/0202 , G09G2310/0224 , G09G2320/0209
摘要： A data line driving method adapted in a display panel driver circuit is provided. The display panel driver circuit comprises a plurality rows of gate lines and a plurality of data driver stages each corresponding to a data line group, wherein the data line driving method comprises the steps of: turning on the data driver stages in a first sequential order to input a first frame data in the data line groups corresponding to the data driver stages in each gate line activation time within a first frame period; and turning on the data driver stages in a second sequential order which is opposed to the first sequential order to input a second frame data in the data line groups corresponding to the data driver stages in each gate line activation time within a second frame period; wherein the first and the second frame period are two interlaced periods next to each other.
摘要翻译：提供一种适用于显示面板驱动电路的数据线驱动方法。显示面板驱动电路包括多行栅极线和多个对应于数据线组的数据驱动器级，其中数据线驱动方法包括以下步骤：以第一顺序接通数据驱动器级，以在第一帧周期内的每个栅极线激活时间内，在对应于数据驱动器级的数据线组中输入第一帧数据; 并以与第一顺序顺序相反的第二顺序顺序接通数据驱动器级，以在第二帧周期内的每个栅极线激活时间内输入与数据驱动器级对应的数据线组中的第二帧数据; 其中第一和第二帧周期是彼此相邻的两个隔行周期。

7. 发明申请

US20100110045A1 Data Line Driving Method 有权
标题翻译：数据线驱动方式
公开(公告)号：US20100110045A1
公开(公告)日：2010-05-06
申请号：US12413835
申请日：2009-03-30
申请人： Chung-Lin Fu , Fu-Yuan Liou , Yu-Hsin Ting , Shu-Huan Hsieh
发明人： Chung-Lin Fu , Fu-Yuan Liou , Yu-Hsin Ting , Shu-Huan Hsieh
IPC分类号： G06F3/038
CPC分类号： G09G3/3611 , G09G2310/0202 , G09G2310/0224 , G09G2320/0209
摘要： A data line driving method adapted in a display panel driver circuit is provided. The display panel driver circuit comprises a plurality rows of gate lines and a plurality of data driver stages each corresponding to a data line group, wherein the data line driving method comprises the steps of: turning on the data driver stages in a first sequential order to input a first frame data in the data line groups corresponding to the data driver stages in each gate line activation time within a first frame period; and turning on the data driver stages in a second sequential order which is opposed to the first sequential order to input a second frame data in the data line groups corresponding to the data driver stages in each gate line activation time within a second frame period; wherein the first and the second frame period are two interlaced periods next to each other.
摘要翻译：提供一种适用于显示面板驱动电路的数据线驱动方法。显示面板驱动电路包括多行栅极线和多个对应于数据线组的数据驱动器级，其中数据线驱动方法包括以下步骤：以第一顺序接通数据驱动器级，以在第一帧周期内的每个栅极线激活时间内，在对应于数据驱动器级的数据线组中输入第一帧数据; 并以与第一顺序顺序相反的第二顺序顺序接通数据驱动器级，以在第二帧周期内的每个栅极线激活时间内输入与数据驱动器级对应的数据线组中的第二帧数据; 其中第一和第二帧周期是彼此相邻的两个隔行周期。

8. 发明授权

US08836679B2 Display with multiplexer feed-through compensation and methods of driving same 有权
标题翻译：显示多路复用器馈通补偿及其驱动方法
公开(公告)号：US08836679B2
公开(公告)日：2014-09-16
申请号：US13567582
申请日：2012-08-06
申请人： Nan-Ying Lin , Yu-Hsin Ting , Chung-Lin Fu , Wei-Chun Hsu , Pei-Hua Chen
发明人： Nan-Ying Lin , Yu-Hsin Ting , Chung-Lin Fu , Wei-Chun Hsu , Pei-Hua Chen
IPC分类号： G09G5/00 , G09G3/36
CPC分类号： G09G3/3611 , G09G3/3685 , G09G2310/0297
摘要： In one aspect, an LCD includes a display panel with a pixel matrix having M scan lines and N data lines, and a multiplexer feed-through compensation circuit, which includes P signal lines for providing P video signals, P multiplexers, and K pairs of control lines providing K pairs of control signals. Each multiplexer is electrically coupled to a corresponding signal line and has K channels. Each channel includes first and second switches parallel-connected between the signal line and a corresponding data line for selectively transmitting the video signal to the corresponding data line. Each pair of control lines is respectively electrically coupled to the first and second switches of a corresponding channel of each multiplexer. Each pair of control signals are configured such that a time turning off one of the first and second switches is earlier than that turning off the other switch.
摘要翻译：一方面，LCD包括具有M条扫描线和N条数据线的像素矩阵的显示面板和多路复用器馈通补偿电路，其包括用于提供P视频信号的P信号线，P多路复用器和K对提供K对控制信号的控制线。每个复用器电耦合到对应的信号线并且具有K个信道。每个通道包括并联在信号线和相应的数据线之间的第一和第二开关，用于选择性地将视频信号传输到对应的数据线。每对控制线分别电耦合到每个多路复用器的相应通道的第一和第二开关。每对控制信号被配置为使得关闭第一和第二开关中的一个的时间早于关闭另一个开关的时间。

9. 发明申请

US20120146962A1 ACTIVE LIQUID CRYSTAL DISPLAY PANEL 有权
标题翻译：主动液晶显示面板
公开(公告)号：US20120146962A1
公开(公告)日：2012-06-14
申请号：US13087328
申请日：2011-04-14
申请人： Wei-Chun Hsu , Yu-Hsin Ting , Chung-Lin Fu , Tsao-Wen Lu , Nan-Ying Lin , Pei-Hua Chen
发明人： Wei-Chun Hsu , Yu-Hsin Ting , Chung-Lin Fu , Tsao-Wen Lu , Nan-Ying Lin , Pei-Hua Chen
IPC分类号： G09G3/36 , G09G5/00
CPC分类号： G09G3/3648 , G09G3/3677 , G09G2320/0214
摘要： An active liquid crystal display panel includes a pixel array, a gate driving circuit, a data driving circuit, and an analog buffer. The gate driving circuit is used for driving M first scan lines where M is a natural number. The analog buffer is coupled to the gate driving circuit and includes M buffer circuits and a regulator. Each buffer circuit drives a corresponding second scan line according to an output signal of a corresponding first scan line of the M first scan lines, and the regulator is used for maintaining at least one reference voltage supplied to the M buffer circuits.
摘要翻译：有源液晶显示面板包括像素阵列，栅极驱动电路，数据驱动电路和模拟缓冲器。栅极驱动电路用于驱动M是自然数的M个第一扫描线。模拟缓冲器耦合到栅极驱动电路，并包括M个缓冲电路和调节器。每个缓冲电路根据M个第一扫描线的对应的第一扫描线的输出信号驱动相应的第二扫描线，并且调节器用于保持提供给M个缓冲电路的至少一个参考电压。

10. 发明申请

US20120104402A1 ARCHITECTURE OF ANALOG BUFFER CIRCUIT 审中-公开
标题翻译：模拟缓存电路的架构
公开(公告)号：US20120104402A1
公开(公告)日：2012-05-03
申请号：US12938867
申请日：2010-11-03
申请人： Pei-Hua Chen , Yu-Hsin Ting , Chung-Lin Fu , Tsao-Wen Lu , Nan-Ying Lin , Wei-Chun Hsu
发明人： Pei-Hua Chen , Yu-Hsin Ting , Chung-Lin Fu , Tsao-Wen Lu , Nan-Ying Lin , Wei-Chun Hsu
IPC分类号： H01L27/12
CPC分类号： H01L27/124
摘要： In one aspect of the invention, an analog buffer circuit includes a p-channel field effect transistor (PTFT) and an n-channel field effect transistor (NTFT). Each of the PTFT and NTFT has a source region and a drain region defining a channel region therebetween, formed on a substrate such that the drain regions of the PTFT and the NTFT are in substantial contact with each other, a gate layer formed over and insulated from the corresponding channel region, a source electrode insulated from the gate layer and electrically connected to the corresponding source region, and a common drain electrode insulated from the gate layer and the source electrode, and is electrically connected to the drain regions of both the PTFT and the NTFT through a via defined over the depletion region.
摘要翻译：在本发明的一个方面，模拟缓冲电路包括p沟道场效应晶体管（PTFT）和n沟道场效应晶体管（NTFT）。 PTFT和NTFT中的每一个具有形成在基板上的源极区域和限定其间的沟道区域的漏极区域，使得PTFT和NTFT的漏极区域彼此基本接触;形成在绝缘层上的栅极层从相应的沟道区域，与栅极层绝缘并电连接到对应的源极区域的源极电极和与栅极层和源极电极绝缘的公共漏电极，并且电连接到两个PTFT的漏极区域和通过在耗尽区域上定义的通孔的NTFT。

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