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1. 发明授权

US08482443B2 Clock timing adjustment device and continuous time delta-sigma modulator using the same 有权
标题翻译：时钟定时调整装置和使用其的连续时间Δ-Σ调制器
公开(公告)号：US08482443B2
公开(公告)日：2013-07-09
申请号：US13184182
申请日：2011-07-15
申请人： Yi-Gyeong Kim , Bong Chan Kim , Min-Hyung Cho , Jong-Kee Kwon
发明人： Yi-Gyeong Kim , Bong Chan Kim , Min-Hyung Cho , Jong-Kee Kwon
IPC分类号： H03M3/00
CPC分类号： H03M3/372 , H03M3/458
摘要： Provided is a clock timing adjustment device for adjusting a time difference of clocks and a delta-sigma modulator. The clock timing adjustment device includes a power detection unit and a timing adjustment unit. The power detection unit receives input signals which are generated using pairs of first and second clocks having a plurality of clock time differences and respectively correspond to the clock time differences, detects powers of the input signals, and outputs a control signal corresponding to a clock time difference where the power is minimized. The timing adjustment unit receives a reference clock and the control signal and outputs the first and second clocks having the clock time difference where the power is minimized from the reference clock according to the control signal.
摘要翻译：提供了一种用于调整时钟的时间差和Δ-Σ调制器的时钟定时调整装置。时钟定时调整装置包括功率检测单元和定时调整单元。功率检测单元接收使用具有多个时钟时间差的第一和第二时钟对生成的输入信号，并分别对应于时钟时间差，检测输入信号的功率，并输出对应于时钟时间的控制信号功率最小化的差异。定时调整单元接收参考时钟和控制信号，并根据控制信号从参考时钟输出具有最小功率的时钟时间差的第一和第二时钟。

2. 发明授权

US08610493B2 Bias circuit and analog integrated circuit comprising the same 有权
标题翻译：偏置电路和包含该偏置电路的模拟集成电路
公开(公告)号：US08610493B2
公开(公告)日：2013-12-17
申请号：US13243955
申请日：2011-09-23
申请人： Yi-Gyeong Kim , Bong Chan Kim , Min-Hyung Cho , Jong-Kee Kwon
发明人： Yi-Gyeong Kim , Bong Chan Kim , Min-Hyung Cho , Jong-Kee Kwon
IPC分类号： G05F3/02
CPC分类号： H03F3/45475 , H03F2203/45248 , H03F2203/45514 , H03F2203/45541 , H03F2203/45551
摘要： Disclosed is a bias circuit which includes a bias voltage generating part configured to generate a bias voltage using a reference current and a variable current; a reference current source part configured to provide the reference current to the bias voltage generating part; and a current adjusting part configured to provide the variable current to the bias voltage generating part and to adjust the amount of the variable current according to voltage levels of at least two input signals. The bias circuit prevents an increase in power consumption and improves a slew rate at the same time.
摘要翻译：公开了一种偏置电路，其包括被配置为使用参考电流和可变电流产生偏置电压的偏置电压产生部件; 参考电流源部，被配置为将所述参考电流提供给所述偏置电压产生部; 以及电流调节部，被配置为向所述偏置电压生成部提供所述可变电流，并且根据至少两个输入信号的电压电平来调整所述可变电流的量。偏置电路可以防止功耗的增加，同时提高转换速率。

3. 发明申请

US20120154028A1 BIAS CIRCUIT AND ANALOG INTEGRATED CIRCUIT COMPRISING THE SAME 有权
标题翻译：偏置电路和包含该电路的模拟集成电路
公开(公告)号：US20120154028A1
公开(公告)日：2012-06-21
申请号：US13243955
申请日：2011-09-23
申请人： Yi-Gyeong Kim , Bong Chan Kim , Min-Hyung Cho , Jong-Kee Kwon
发明人： Yi-Gyeong Kim , Bong Chan Kim , Min-Hyung Cho , Jong-Kee Kwon
IPC分类号： G05F1/10
CPC分类号： H03F3/45475 , H03F2203/45248 , H03F2203/45514 , H03F2203/45541 , H03F2203/45551
摘要： Disclosed is a bias circuit which includes a bias voltage generating part configured to generate a bias voltage using a reference current and a variable current; a reference current source part configured to provide the reference current to the bias voltage generating part; and a current adjusting part configured to provide the variable current to the bias voltage generating part and to adjust the amount of the variable current according to voltage levels of at least two input signals. The bias circuit prevents an increase in power consumption and improves a slew rate at the same time.
摘要翻译：公开了一种偏置电路，其包括被配置为使用参考电流和可变电流产生偏置电压的偏置电压产生部件; 参考电流源部，被配置为将所述参考电流提供给所述偏置电压产生部; 以及电流调节部，被配置为向所述偏置电压生成部提供所述可变电流，并且根据至少两个输入信号的电压电平来调整所述可变电流的量。偏置电路可以防止功耗的增加，同时提高转换速率。

4. 发明授权

US08542139B2 Current switch driving circuit and digital to analog converter 有权
标题翻译：电流开关驱动电路和数模转换器
公开(公告)号：US08542139B2
公开(公告)日：2013-09-24
申请号：US13310606
申请日：2011-12-02
申请人： Min-Hyung Cho , Yi-Gyeong Kim , Jong-Kee Kwon
发明人： Min-Hyung Cho , Yi-Gyeong Kim , Jong-Kee Kwon
IPC分类号： H03M1/00
CPC分类号： H03K17/04106 , H03M1/06 , H03M1/66
摘要： Provided are a current switch driving circuit generating a signal for driving a current switch, and a digital-to-analog converter using the same. The current switch driving circuit includes a first PMOS transistor in which a source terminal is connected to a power supply terminal, a gate terminal receives an input signal, and a drain terminal outputs a driving signal, an NMOS transistor in which a drain terminal is connected to the drain terminal of the first PMOS transistor, and a gate terminal receives the input signal, a second PMOS transistor in which a source terminal is connected to a source terminal of the NMOS transistor, a gate terminal is connected to a bias voltage terminal, and a drain terminal is connected to a ground terminal, and a control current source allowing the second PMOS transistor to be maintained constantly in an ON state.
摘要翻译：提供了产生用于驱动电流开关的信号的电流开关驱动电路和使用该电流开关的数模转换器。电流开关驱动电路包括：第一PMOS晶体管，源极端子连接到电源端子，栅极端子接收输入信号，漏极端子输出驱动信号;漏极端子连接的NMOS晶体管到第一PMOS晶体管的漏极端子，并且栅极端子接收输入信号;第二PMOS晶体管，其源极端子连接到NMOS晶体管的源极端子，栅极端子连接到偏置电压端子，并且漏极端子连接到接地端子，并且使得允许第二PMOS晶体管恒定地处于导通状态的控制电流源。

5. 发明申请

US20120154189A1 CURRENT SWITCH DRIVING CIRCUIT AND DIGITAL TO ANALOG CONVERTER 有权
标题翻译：电流开关驱动电路和数字到模拟转换器
公开(公告)号：US20120154189A1
公开(公告)日：2012-06-21
申请号：US13310606
申请日：2011-12-02
申请人： Min-Hyung CHO , Yi-Gyeong Kim , Jong-Kee Kwon
发明人： Min-Hyung CHO , Yi-Gyeong Kim , Jong-Kee Kwon
IPC分类号： H03M1/66 , H03B1/00
CPC分类号： H03K17/04106 , H03M1/06 , H03M1/66
摘要： Provided are a current switch driving circuit generating a signal for driving a current switch, and a digital-to-analog converter using the same. The current switch driving circuit includes a first PMOS transistor in which a source terminal is connected to a power supply terminal, a gate terminal receives an input signal, and a drain terminal outputs a driving signal, an NMOS transistor in which a drain terminal is connected to the drain terminal of the first PMOS transistor, and a gate terminal receives the input signal, a second PMOS transistor in which a source terminal is connected to a source terminal of the NMOS transistor, a gate terminal is connected to a bias voltage terminal, and a drain terminal is connected to a ground terminal, and a control current source allowing the second PMOS transistor to be maintained constantly in an ON state.
摘要翻译：提供了产生用于驱动电流开关的信号的电流开关驱动电路和使用该电流开关的数模转换器。电流开关驱动电路包括：第一PMOS晶体管，源极端子连接到电源端子，栅极端子接收输入信号，漏极端子输出驱动信号;漏极端子连接的NMOS晶体管到第一PMOS晶体管的漏极端子，并且栅极端子接收输入信号;第二PMOS晶体管，其源极端子连接到NMOS晶体管的源极端子，栅极端子连接到偏置电压端子，并且漏极端子连接到接地端子，并且使得允许第二PMOS晶体管恒定地处于导通状态的控制电流源。

6. 发明授权

US09077287B2 Sound detecting circuit and amplifier circuit thereof 有权
标题翻译：声音检测电路及其放大电路
公开(公告)号：US09077287B2
公开(公告)日：2015-07-07
申请号：US13531437
申请日：2012-06-22
申请人： Yi-Gyeong Kim , Min-Hyung Cho , Tae Moon Roh , Jong-Kee Kwon , Woo Seok Yang , Jongdae Kim
发明人： Yi-Gyeong Kim , Min-Hyung Cho , Tae Moon Roh , Jong-Kee Kwon , Woo Seok Yang , Jongdae Kim
IPC分类号： H03F99/00 , H03F3/08
CPC分类号： H03F3/08
摘要： Disclosed is a sound detecting circuit which includes a sensing unit configured to generate an AC signal in response to a sound pressure level of a sound signal; an amplification unit configured to amplify the AC signal; and a bias voltage generating unit configured to generate a bias voltage to be provided to the amplification unit. The bias voltage generating unit comprises a current source configured to provide a power current; and a current-voltage converting circuit configured to convert the power current into the bias voltage and to reduce a noise due to the power current.
摘要翻译：公开了一种声音检测电路，其包括：感测单元，被配置为响应于声音信号的声压级产生AC信号; 放大单元，被配置为放大AC信号; 以及偏置电压产生单元，被配置为产生要提供给所述放大单元的偏置电压。偏置电压产生单元包括被配置为提供功率电流的电流源; 以及电流电压转换电路，被配置为将功率电流转换成偏置电压并且减少由于功率电流引起的噪声。

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