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1. 发明授权

US07436009B2 Via structures and trench structures and dual damascene structures 有权
标题翻译：通过结构和沟槽结构和双镶嵌结构
公开(公告)号：US07436009B2
公开(公告)日：2008-10-14
申请号：US11732883
申请日：2007-04-04
申请人： Yi-Chen Huang , Chien-Chung Fu , Ming-Hong Hsieh , Hui Ouyang , Yi-Nien Su , Hun-Jan Tao
发明人： Yi-Chen Huang , Chien-Chung Fu , Ming-Hong Hsieh , Hui Ouyang , Yi-Nien Su , Hun-Jan Tao
IPC分类号： H01L29/06
CPC分类号： H01L21/76865 , H01L21/76808 , H01L21/76843 , H01L21/76846 , H01L21/76862
摘要： Via hole and trench structures and fabrication methods are disclosed. The structure includes a conductive layer in a dielectric layer, and a via structure in the dielectric layer contacting a portion of a surface of the conductive layer. The via structure includes the conductive liner contacting the portion of the surface of the first conductive layer. A trench structure is formed on the via structure in the dielectric without the conductive liner layer in the trench.
摘要翻译：公开了通孔和沟槽结构和制造方法。该结构包括电介质层中的导电层，以及介电层中与导电层表面的一部分接触的通孔结构。通孔结构包括与第一导电层的表面的部分接触的导电衬垫。在电介质中的通孔结构上形成沟槽结构，而沟槽中没有导电衬垫层。

2. 发明授权

US07217663B2 Via hole and trench structures and fabrication methods thereof and dual damascene structures and fabrication methods thereof 有权
标题翻译：通孔和沟槽结构及其制造方法和双镶嵌结构及其制造方法
公开(公告)号：US07217663B2
公开(公告)日：2007-05-15
申请号：US11039043
申请日：2005-01-18
申请人： Yi-Chen Huang , Chien Chung Fu , Ming-Hong Hsieh , Hui Ouyang , Yi-Nien Su , Hun-Jan Tao
发明人： Yi-Chen Huang , Chien Chung Fu , Ming-Hong Hsieh , Hui Ouyang , Yi-Nien Su , Hun-Jan Tao
IPC分类号： H01L21/302
CPC分类号： H01L21/76865 , H01L21/76808 , H01L21/76843 , H01L21/76846 , H01L21/76862
摘要： Via hole and trench structures and fabrication methods are disclosed. The structure comprises a conductive layer in a dielectric layer, and a via hole in the dielectric layer for exposing a portion of a surface of the conductive layer. A conductive liner covers the exposed surface of the first conductive layer. A trench is formed on the via hole in the dielectric without the conductive liner layer in the trench. Dual damascene structures and fabrications methods are also disclosed. Following the fabrication methods of the via hole and trench structures, a conductive layer is further formed in the via hole and trench structures.
摘要翻译：公开了通孔和沟槽结构和制造方法。该结构包括在电介质层中的导电层和用于暴露导电层表面的一部分的电介质层中的通孔。导电衬套覆盖第一导电层的暴露表面。在电介质的通孔上形成沟槽，而沟槽中没有导电衬垫层。还披露了双镶嵌结构和制造方法。按照通孔和沟槽结构的制造方法，在通孔和沟槽结构中进一步形成导电层。

3. 发明申请

US20070184669A1 Via structures and trench structures and dual damascene structures 有权
标题翻译：通过结构和沟槽结构和双镶嵌结构
公开(公告)号：US20070184669A1
公开(公告)日：2007-08-09
申请号：US11732883
申请日：2007-04-04
申请人： Yi-Chen Huang , Chien Fu , Ming-Hong Hsieh , Hui Ouyang , Yi-Nien Su , Hun-Jan Tao
发明人： Yi-Chen Huang , Chien Fu , Ming-Hong Hsieh , Hui Ouyang , Yi-Nien Su , Hun-Jan Tao
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/76865 , H01L21/76808 , H01L21/76843 , H01L21/76846 , H01L21/76862
摘要： Via hole and trench structures and fabrication methods are disclosed. The structure includes a conductive layer in a dielectric layer, and a via structure in the dielectric layer contacting a portion of a surface of the conductive layer. The via structure includes the conductive liner contacting the portion of the surface of the first conductive layer. A trench structure is formed on the via structure in the dielectric without the conductive liner layer in the trench.
摘要翻译：公开了通孔和沟槽结构和制造方法。该结构包括电介质层中的导电层，以及介电层中与导电层表面的一部分接触的通孔结构。通孔结构包括与第一导电层的表面的部分接触的导电衬垫。在电介质中的通孔结构上形成沟槽结构，而沟槽中没有导电衬垫层。

4. 发明申请

US20060160362A1 Via hole and trench structures and fabrication methods thereof and dual damascene structures and fabrication methods thereof 有权
标题翻译：通孔和沟槽结构及其制造方法和双镶嵌结构及其制造方法
公开(公告)号：US20060160362A1
公开(公告)日：2006-07-20
申请号：US11039043
申请日：2005-01-18
申请人： Yi-Chen Huang , Chien Fu , Ming-Hong Hsieh , Hui Ouyang , Yi-Nien Su , Hun-Jan Tao
发明人： Yi-Chen Huang , Chien Fu , Ming-Hong Hsieh , Hui Ouyang , Yi-Nien Su , Hun-Jan Tao
IPC分类号： H01L21/311 , H01L21/302 , H01L21/31
CPC分类号： H01L21/76865 , H01L21/76808 , H01L21/76843 , H01L21/76846 , H01L21/76862
摘要： Via hole and trench structures and fabrication methods are disclosed. The structure comprises a conductive layer in a dielectric layer, and a via hole in the dielectric layer for exposing a portion of a surface of the conductive layer. A conductive liner covers the exposed surface of the first conductive layer. A trench is formed on the via hole in the dielectric without the conductive liner layer in the trench. Dual damascene structures and fabrications methods are also disclosed. Following the fabrication methods of the via hole and trench structures, a conductive layer is further formed in the via hole and trench structures.
摘要翻译：公开了通孔和沟槽结构和制造方法。该结构包括在电介质层中的导电层和用于暴露导电层表面的一部分的电介质层中的通孔。导电衬套覆盖第一导电层的暴露表面。在电介质的通孔上形成沟槽，而沟槽中没有导电衬垫层。还披露了双镶嵌结构和制造方法。按照通孔和沟槽结构的制造方法，在通孔和沟槽结构中进一步形成导电层。

5. 发明授权

US07598176B2 Method for photoresist stripping and treatment of low-k dielectric material 有权
标题翻译：光刻胶剥离和低k介电材料处理方法
公开(公告)号：US07598176B2
公开(公告)日：2009-10-06
申请号：US10949128
申请日：2004-09-23
申请人： Jang-Shiang Tsai , Yi-Nien Su , Chung-Chi Ko , Jyu-Horng Shieh , Peng-Fu Hsu , Hun-Jan Tao
发明人： Jang-Shiang Tsai , Yi-Nien Su , Chung-Chi Ko , Jyu-Horng Shieh , Peng-Fu Hsu , Hun-Jan Tao
IPC分类号： H01L21/311
CPC分类号： H01L21/02063 , G03F7/427 , Y10S438/958
摘要： A plasma processing operation uses a gas mixture of N2 and H2 to both remove a photoresist film and treat a low-k dielectric material. The plasma processing operation prevents degradation of the low-k material by forming a protective layer on the low-k dielectric material. Carbon from the photoresist layer is activated and caused to complex with the low-k dielectric, maintaining a suitably high carbon content and a suitably low dielectric constant. The plasma processing operation uses a gas mixture with H2 constituting at least 10%, by volume, of the gas mixture.
摘要翻译：等离子体处理操作使用N 2和H 2的气体混合物来去除光致抗蚀剂膜并处理低k电介质材料。等离子体处理操作通过在低k电介质材料上形成保护层来防止低k材料的劣化。来自光致抗蚀剂层的碳被激活并与低k电介质复合，保持适当高的碳含量和合适的低介电常数。等离子体处理操作使用具有构成气体混合物的至少10体积％的H 2的气体混合物。

6. 发明授权

US07875547B2 Contact hole structures and contact structures and fabrication methods thereof 有权
标题翻译：接触孔结构及接触结构及其制造方法
公开(公告)号：US07875547B2
公开(公告)日：2011-01-25
申请号：US11035325
申请日：2005-01-12
申请人： Ju-Wang Hsu , Jyu-Horng Shieh , Yi-Nien Su , Peng-Fu Hsu , Hun-Jan Tao
发明人： Ju-Wang Hsu , Jyu-Horng Shieh , Yi-Nien Su , Peng-Fu Hsu , Hun-Jan Tao
IPC分类号： H01L21/4763
CPC分类号： H01L21/76802 , H01L21/76835
摘要： Methods and structures for forming a contact hole structure are disclosed. These methods first form a substantially silicon-free material layer over a substrate. A material layer is formed over the substantially silicon-free material layer. A contact hole is formed within the substantially silicon-free material layer and the material layer without substantially damaging the substrate. In addition, a conductive layer is formed in the contact hole so as to form a contact structure.
摘要翻译：公开了形成接触孔结构的方法和结构。这些方法首先在衬底上形成基本上无硅的材料层。在基本无硅材料层上形成材料层。在基本无硅的材料层和材料层内形成接触孔，而基本上不损坏衬底。此外，在接触孔中形成导电层以形成接触结构。

7. 发明授权

US07029992B2 Low oxygen content photoresist stripping process for low dielectric constant materials 失效
标题翻译：低介电常数材料的低含氧光刻胶剥离工艺
公开(公告)号：US07029992B2
公开(公告)日：2006-04-18
申请号：US10920099
申请日：2004-08-17
申请人： Jyu-Horng Shieh , Yi-Nien Su , Jang-Shiang Tsai , Chen-Nan Yeh , Hun-Jan Tao
发明人： Jyu-Horng Shieh , Yi-Nien Su , Jang-Shiang Tsai , Chen-Nan Yeh , Hun-Jan Tao
IPC分类号： H01L21/322
CPC分类号： H01L21/31138 , G03F7/427
摘要： A plasma containing 5–10% oxygen and 90–95% of an inert gas strips photoresist from over a low-k dielectric material formed on or in a semiconductor device. The inert gas may be nitrogen, hydrogen, or a combination thereof, or it may include at least one of nitrogen, hydrogen, NH3, Ar, He, and CF4. The operating pressure of the plasma may range from 1 millitorr to 150 millitor. The plasma removes photoresist, the hard skin formed on photoresist during aggressive etch processes, and polymeric depositions formed during etch processes. The plasma strips photoresist at a rate sufficiently high for production use and does not appreciably attack carbon-containing low-k dielectric materials. An apparatus including a plasma tool containing a semiconductor substrate and the low oxygen-content plasma, is also provided.
摘要翻译：含有5-10％氧气和90-95％惰性气体的等离子体从形成在半导体器件上或半导体器件中的低k电介质材料上剥离光致抗蚀剂。惰性气体可以是氮气，氢气或它们的组合，或者它可以包括氮气，氢气，NH 3，Ar，He和CF 4中的至少一种。。等离子体的工作压力可以在1毫托至150毫升之间。等离子体去除光致抗蚀剂，在腐蚀性蚀刻工艺期间在光致抗蚀剂上形成的硬皮以及在蚀刻工艺期间形成的聚合物沉积。等离子体以足够高的生产用途的速率剥离光致抗蚀剂，并且不会明显地攻击含碳低k电介质材料。还提供了包括含有半导体衬底和低含氧等离子体的等离子体工具的装置。

8. 发明申请

US20060063386A1 Method for photoresist stripping and treatment of low-k dielectric material 有权
标题翻译：光刻胶剥离和低k介电材料处理方法
公开(公告)号：US20060063386A1
公开(公告)日：2006-03-23
申请号：US10949128
申请日：2004-09-23
申请人： Jang-Shiang Tsai , Yi-Nien Su , Chung-Chi Ko , Jyu-Horng Shieh , Peng-Fu Hsu , Hun-Jan Tao
发明人： Jang-Shiang Tsai , Yi-Nien Su , Chung-Chi Ko , Jyu-Horng Shieh , Peng-Fu Hsu , Hun-Jan Tao
IPC分类号： H01L21/302
CPC分类号： H01L21/02063 , G03F7/427 , Y10S438/958
摘要： A plasma processing operation uses a gas mixture of N2 and H2 to both remove a photoresist film and treat a low-k dielectric material. The plasma processing operation prevents degradation of the low-k material by forming a protective layer on the low-k dielectric material. Carbon from the photoresist layer is activated and caused to complex with the low-k dielectric, maintaining a suitably high carbon content and a suitably low dielectric constant. The plasma processing operation uses a gas mixture with H2 constituting at least 10%, by volume, of the gas mixture.
摘要翻译：等离子体处理操作使用N 2和H 2的气体混合物去除光致抗蚀剂膜并处理低k电介质材料。等离子体处理操作通过在低k电介质材料上形成保护层来防止低k材料的劣化。来自光致抗蚀剂层的碳被激活并与低k电介质复合，保持适当高的碳含量和合适的低介电常数。等离子体处理操作使用构成气体混合物的至少10体积％的H 2 N 2气体混合物。

9. 发明授权

US08415799B2 Dual damascene interconnect in hybrid dielectric 有权
标题翻译：混合电介质中的双镶嵌互连
公开(公告)号：US08415799B2
公开(公告)日：2013-04-09
申请号：US11172442
申请日：2005-06-30
申请人： Yi-Nien Su , Jyu-Horng Shieh , Hun-Jan Tao
发明人： Yi-Nien Su , Jyu-Horng Shieh , Hun-Jan Tao
IPC分类号： H01L23/48
CPC分类号： H01L21/76829 , H01L21/76808 , H01L21/7681 , H01L21/76832 , H01L21/76834 , H01L21/76835
摘要： A semiconductor device. A diffusion barrier layer overlies a substrate. An adhesion promoting layer overlies the diffusion barrier layer. A first dielectric layer between the diffusion barrier layer and the adhesion promoting layer comprises at least one via opening through the diffusion barrier layer and the adhesion promoting layer. A second dielectric layer overlies the adhesion promoting layer, comprising a trench opening above the via opening. A metal interconnect fills the via and trench openings.
摘要翻译：半导体器件。扩散阻挡层覆盖在基底上。粘附促进层覆盖在扩散阻挡层上。扩散阻挡层和增粘层之间的第一电介质层包括穿过扩散阻挡层和粘合促进层的至少一个通孔。第二电介质层覆盖粘附促进层，包括在通孔开口上方的沟槽开口。金属互连件填充通孔和沟槽开口。

10. 发明授权

US07400401B2 Measuring low dielectric constant film properties during processing 有权
标题翻译：在加工期间测量低介电常数膜性能
公开(公告)号：US07400401B2
公开(公告)日：2008-07-15
申请号：US11096049
申请日：2005-03-31
申请人： Jang-Shiang Tsai , Peng-Fu Hsu , Baw-Ching Perng , Ju-Wang Hsu , Jyu-Horng Shieh , Yi-Nien Su , Hun-Jan Tao
发明人： Jang-Shiang Tsai , Peng-Fu Hsu , Baw-Ching Perng , Ju-Wang Hsu , Jyu-Horng Shieh , Yi-Nien Su , Hun-Jan Tao
IPC分类号： G01J4/00
CPC分类号： G01N21/211
摘要： A method and system for determining the dielectric constant of a low-k dielectric film on a production substrate include measuring the electronic component of the dielectric constant using an ellipsometer, measuring the ionic component of the dielectric constant using an IR spectrometer, measuring the overall dielectric constant using a microwave spectrometer and deriving the dipolar component of the dielectric constant. The measurements and determination are non-contact and may be carried out on a production device that is further processed following the measurements.
摘要翻译：用于确定制造基板上的低k电介质膜的介电常数的方法和系统包括使用椭偏仪测量介电常数的电子部件，使用IR光谱仪测量介电常数的离子分量，测量总电介质使用微波光谱仪恒定并导出介电常数的偶极分量。测量和确定是非接触的，并且可以在进行测量后进一步处理的生产设备上进行。

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