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    • 1. 发明申请
    • DATA CENTER CONGESTION MANAGEMENT FOR NON-TCP TRAFFIC
    • 数据中心管理非TCP流量管理
    • US20150341273A1
    • 2015-11-26
    • US14285028
    • 2014-05-22
    • Ygdal NaouriRobert O. SharpKenneth G. KeelsEric W. Multanen
    • Ygdal NaouriRobert O. SharpKenneth G. KeelsEric W. Multanen
    • H04L12/801H04L12/26H04L12/807H04L12/911
    • H04L47/18H04L12/4633H04L43/0858H04L43/0864H04L43/16H04L47/27H04L47/822
    • Methods, apparatus and software for implementing enhanced data center congestion management for non-TCP traffic. Non-congested transmit latencies are determined for transmission of packets or Ethernet frames along paths between source and destination end-end-nodes when congestion along the paths is not present or minimal. Transmit latencies are similarly measured along the same source-destination paths during ongoing operations during which traffic congestion may vary. Based on whether a difference between the transmit latency for a packet or frame and the non-congested transmit latency for the path exceeds a threshold, the path is marked as congested or not congested. A rate at which the non-TCP packets are transmitted along the path is then managed as function of a rate at which the path is marked as congested. In one implementation, non-TCP traffic is managed by mimicking a Data Center TCP technique, under which the congestion marking status of the path is substituted as an input to a DCTP algorithm in place of the normally-used ECN-Echo flag input. The congestion window output by the DCTCP algorithm is then used to manage the rate at which non-TCP packets to be forwarded via the path are transmitted from a source end-node.
    • 用于实现非TCP流量增强数据中心拥塞管理的方法,设备和软件。 确定沿着路径的拥塞不存在或最小时,沿着源端和目的端端节点之间的路径传输分组或以太网帧的非拥塞发送延迟。 在正在进行的操作期间,沿着相同的源 - 目的地路径类似地测量发射延迟,在此期间,业务拥塞可能变化。 基于分组或帧的发送等待时间与路径的非拥塞发送等待时间之间的差是否超过阈值,路径被标记为拥塞或不拥塞。 然后,以路径被标记为拥塞的速率的函数来管理沿着路径发送非TCP分组的速率。 在一个实现中,通过模拟数据中心TCP技术来管理非TCP流量,在该技术下,将路径的拥塞标记状态替换为DCTP算法的输入来代替常用的ECN-Echo标志输入。 然后使用DCTCP算法输出的拥塞窗口来管理从源端节点传送经由路径转发的非TCP分组的速率。
    • 4. 发明申请
    • Real Time Car Driving Simulator
    • 实时驾驶模拟器
    • US20160005333A1
    • 2016-01-07
    • US14753151
    • 2015-06-29
    • Ygdal Naouri
    • Ygdal Naouri
    • G09B19/16
    • Real-time car driving simulator for providing to passengers of a vehicle the feeling they are currently driving the vehicle. The simulator includes devices combined together for providing the same functionalities of a video camera unit, an inertial measurement unit, user interface(s), a processor, and monitor(s). A passenger attempts to mimic the vehicle operator's actions while the operator is operating the vehicle and the vehicle is in motion, and an assessment of the comparison is provided to the passenger. The processor analyzes output of control components controlled by the vehicle operator provided by a vehicle control component position system and simulated control of the vehicle's movement being effected by the passenger using the user interface(s) to enable output indicative of accuracy of the simulation of the control of vehicle movement by the passenger relative to the actual control of the vehicle movement by the operator to be provided to the passenger.
    • 实时汽车驾驶模拟器,为车辆的乘客提供他们正在驾驶车辆的感觉。 模拟器包括组合在一起的设备,用于提供摄像机单元,惯性测量单元,用户接口,处理器和监视器的相同功能。 乘客在操作车辆和车辆运动时试图模拟车辆操作者的动作,并且向乘客提供比较的评估。 处理器分析由车辆控制部件位置系统提供的由车辆操作者控制的控制部件的输出以及由乘客使用用户界面进行的车辆运动的模拟控制,以使得能够输出指示模拟的精度的输出 控制乘客相对于驾驶员实际控制车辆运动而被提供给乘客的运动。
    • 5. 发明授权
    • At least one die produced, at least in part, from wafer, and including at least one replicated integrated circuit
    • 至少一个管芯至少部分地从晶片制造并且包括至少一个复制的集成电路
    • US08935648B2
    • 2015-01-13
    • US13995215
    • 2012-03-16
    • Ygdal Naouri
    • Ygdal Naouri
    • G06F17/50G06F1/18G06F13/14
    • G06F1/185G06F13/14G06F13/385Y10T29/49124
    • An embodiment may include at least one die produced, at least in part, from a wafer, and may include at least one integrated circuit and/or at least one other integrated circuit. These integrated circuits may be mutual replications of each other and may include respective core and additional blocks. Each respective core block may have an associated respective capability. As formed in the wafer, the respective additional blocks may be coupled together so as to permit the associated respective capabilities of the respective core blocks to be functionally combined to provide an increased capability relative to each of the associated respective capabilities considered separately, and also so as to permit the integrated circuits to be externally interfaced as a unified device. The wafer may be separable into respective dice including respective of the integrated circuits such that the integrated circuits include respective external interfaces. Many modifications are possible.
    • 一个实施例可以包括至少部分地从晶片产生的至少一个管芯,并且可以包括至少一个集成电路和/或至少一个其它集成电路。 这些集成电路可以彼此相互重复,并且可以包括相应的核心和附加块。 每个相应的核心块可以具有相关联的相应的能力。 如在晶片中形成的,相应的附加块可以耦合在一起,以便允许各个核心块的相关联的相应能力在功能上组合以提供相对于分别考虑的相关联的每个能力的增加的能力,并且也 以允许集成电路作为统一设备进行外部接口连接。 晶片可以分离成包括相应的集成电路的各个芯片,使得集成电路包括相应的外部接口。 许多修改是可能的。
    • 7. 发明申请
    • MINIMIZING ON-DIE MEMORY IN PULL MODE SWITCHES
    • 最小化拉杆模式开关中的内置存储器
    • US20150319231A1
    • 2015-11-05
    • US14266250
    • 2014-04-30
    • Ygdal Naouri
    • Ygdal Naouri
    • H04L29/08
    • H04L49/70H04L67/1002
    • Method and apparatus for minimizing on-die memory in pull-mode switches. A disaggregated edge switch (DSW) includes a local communication interface including a plurality of outer ports configured to be coupled to a plurality of local hosts or servers via respective outer links, and a network interface configured to couple to at least one remote apparatus via a respective inner port and link. Data is transferred between the local hosts/servers using pull-mode transfers under which a receiver port “pulls” data from a local source port. The use of pull-mode data transfers between the local host/servers is managed by a scheduler so as to minimize the amount of buffers space for these local data transfers. Techniques are also disclosed for extending pull-mode data transfers using the Ethernet protocol over Ethernet links.
    • 用于最小化拉模式开关中的片上存储器的方法和装置。 分解边缘交换机(DSW)包括本地通信接口,该本地通信接口包括多个外部端口,其被配置为经由相应的外部链路耦合到多个本地主机或服务器;以及网络接口,被配置为经由 各自的内部端口和链路。 使用拉模式传输在本地主机/服务器之间传输数据,在该模式下,接收器端口从本地源端口“拉”数据。 在本地主机/服务器之间使用拉模式数据传输由调度器管理,以便最小化这些本地数据传输的缓冲区空间量。 还公开了用于通过以太网链路使用以太网协议扩展拉模式数据传输的技术。
    • 8. 发明申请
    • AT LEAST ONE DIE PRODUCED, AT LEAST IN PART, FROM WAFER, AND INCLUDING AT LEAST ONE REPLICATED INTEGRATED CIRCUIT
    • 至少一个生产,至少一部分,从WAFER,包括至少一个复制集成电路
    • US20140198440A1
    • 2014-07-17
    • US13995215
    • 2012-03-16
    • Ygdal Naouri
    • Ygdal Naouri
    • G06F1/18
    • G06F1/185G06F13/14G06F13/385Y10T29/49124
    • An embodiment may include at least one die produced, at least in part, from a wafer, and may include at least one integrated circuit and/or at least one other integrated circuit. These integrated circuits may be mutual replications of each other and may include respective core and additional blocks. Each respective core block may have an associated respective capability. As formed in the wafer, the respective additional blocks may be coupled together so as to permit the associated respective capabilities of the respective core blocks to be functionally combined to provide an increased capability relative to each of the associated respective capabilities considered separately, and also so as to permit the integrated circuits to be externally interfaced as a unified device. The wafer may be separable into respective dice including respective of the integrated circuits such that the integrated circuits include respective external interfaces. Many modifications are possible.
    • 一个实施例可以包括至少部分地从晶片制造的至少一个管芯,并且可以包括至少一个集成电路和/或至少一个其它集成电路。 这些集成电路可以彼此相互重复,并且可以包括相应的核心和附加块。 每个相应的核心块可以具有相关联的相应的能力。 如在晶片中形成的,相应的附加块可以耦合在一起,以便允许各个核心块的相关联的相应能力在功能上组合以提供相对于分别考虑的相关联的每个能力的增加的能力,并且也 以允许集成电路作为统一设备进行外部接口连接。 晶片可以分离成包括相应的集成电路的各个芯片,使得集成电路包括相应的外部接口。 许多修改是可能的。