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1. 发明授权

US07793177B2 Chip testing device and system 有权
标题翻译：芯片测试装置和系统
公开(公告)号：US07793177B2
公开(公告)日：2010-09-07
申请号：US11783371
申请日：2007-04-09
申请人： Yen-Wen Chen , Yen-Ynn Chou
发明人： Yen-Wen Chen , Yen-Ynn Chou
IPC分类号： G01R31/28
CPC分类号： G01R31/318555 , G01R31/31716 , G01R31/318572
摘要： A chip testing device having a plurality of testing units is provided. Each testing unit comprises a selector, a flip-flop unit, a first buffer and a second buffer. The selector is controlled by a control signal and has a first input terminal, a feedback input terminal, and a first output terminal. The flip-flop unit has a second input terminal coupled to the first output terminal, a clock signal input terminal for receiving a reference clock signal, and a second output terminal outputting an output data. The first buffer is coupled to the flip-flop unit to convert the output data to a high voltage data, and outputs the high voltage data. The second buffer is coupled to the first buffer to convert high voltage data to low voltage data and transmit the low voltage data to the feedback input terminal.
摘要翻译：提供具有多个测试单元的芯片测试装置。每个测试单元包括选择器，触发器单元，第一缓冲器和第二缓冲器。选择器由控制信号控制，并具有第一输入端，反馈输入端和第一输出端。触发器单元具有耦合到第一输出端子的第二输入端子，用于接收参考时钟信号的时钟信号输入端子和输出输出数据的第二输出端子。第一缓冲器耦合到触发器单元以将输出数据转换为高电压数据，并输出高电压数据。第二缓冲器耦合到第一缓冲器，以将高电压数据转换成低电压数据，并将低电压数据传送到反馈输入端。

2. 发明授权

US07659767B2 Boost circuit and level shifter 有权
标题翻译：升压电路和电平转换器
公开(公告)号：US07659767B2
公开(公告)日：2010-02-09
申请号：US12194348
申请日：2008-08-19
申请人： Yen-Wen Chen , Yen-Ynn Chou
发明人： Yen-Wen Chen , Yen-Ynn Chou
IPC分类号： H03L5/00
CPC分类号： H03K19/01707 , H03K19/01714 , H03K19/018521
摘要： A level shifter including a first boost circuit, an inverter, a second boost circuit and a level shift circuit is disclosed. The first boost circuit receives an input signal, and a first amplification factor for the input signal is determined based on a control signal. The inverter receives the input signal to generate an inverted input signal. The second boost circuit is coupled to an output terminal of the inverter to receive the inverted input signal, and a second amplification factor for the inverted input signal is determined based on the control signal. The level shift circuit has a first input terminal and a second input terminal respectively coupled to output terminals of the first boost circuit and second boost circuit to change the voltage level of output signals from the first boost circuit and second boost circuit to a first voltage level.
摘要翻译：公开了一种包括第一升压电路，逆变器，第二升压电路和电平移位电路的电平移位器。第一升压电路接收输入信号，并且基于控制信号确定用于输入信号的第一放大因子。逆变器接收输入信号以产生反相输入信号。第二升压电路耦合到反相器的输出端以接收反相输入信号，并且基于控制信号确定用于反相输入信号的第二放大因子。电平移位电路具有分别耦合到第一升压电路和第二升压电路的输出端的第一输入端和第二输入端，以将来自第一升压电路和第二升压电路的输出信号的电压电平改变为第一电压电平。

3. 发明申请

US20080086667A1 Chip testing device and system 有权
标题翻译：芯片测试装置和系统
公开(公告)号：US20080086667A1
公开(公告)日：2008-04-10
申请号：US11783371
申请日：2007-04-09
申请人： Yen-Wen Chen , Yen-Ynn Chou
发明人： Yen-Wen Chen , Yen-Ynn Chou
IPC分类号： G01R31/28
CPC分类号： G01R31/318555 , G01R31/31716 , G01R31/318572
摘要： A chip testing device having a plurality of testing units is provided. Each testing unit comprises a selector, a flip-flop unit, a first buffer and a second buffer. The selector is controlled by a control signal and has a first input terminal, a feedback input terminal, and a first output terminal. The flip-flop unit has a second input terminal coupled to the first output terminal, a clock signal input terminal for receiving a reference clock signal, and a second output terminal outputting an output data. The first buffer is coupled to the flip-flop unit to convert the output data to a high voltage data, and outputs the high voltage data. The second buffer is coupled to the first buffer to convert high voltage data to low voltage data and transmit the low voltage data to the feedback input terminal.
摘要翻译：提供具有多个测试单元的芯片测试装置。每个测试单元包括选择器，触发器单元，第一缓冲器和第二缓冲器。选择器由控制信号控制，并具有第一输入端，反馈输入端和第一输出端。触发器单元具有耦合到第一输出端子的第二输入端子，用于接收参考时钟信号的时钟信号输入端子和输出输出数据的第二输出端子。第一缓冲器耦合到触发器单元以将输出数据转换为高电压数据，并输出高电压数据。第二缓冲器耦合到第一缓冲器，以将高电压数据转换成低电压数据，并将低电压数据传送到反馈输入端。

4. 发明申请

US20080137442A1 Memory data reading circuit 审中-公开
标题翻译：存储器数据读取电路
公开(公告)号：US20080137442A1
公开(公告)日：2008-06-12
申请号：US11802698
申请日：2007-05-24
申请人： Yen-Wen Chen , Yen-Ynn Chou
发明人： Yen-Wen Chen , Yen-Ynn Chou
IPC分类号： G11C7/10
CPC分类号： G11C7/12
摘要： A data read circuit for a memory without a complex pre-charge circuit is provided. A diode is coupled between a pair of bit lines to replace the pre-charge circuit. A voltage drop caused by the diode is substantially half the operating voltage of the memory.
摘要翻译：提供了一种用于没有复杂预充电电路的存储器的数据读取电路。二极管耦合在一对位线之间以替代预充电电路。由二极管引起的电压降大致是存储器工作电压的一半。

5. 发明申请

US20080136487A1 Boost circuit and level shifter 审中-公开
标题翻译：升压电路和电平转换器
公开(公告)号：US20080136487A1
公开(公告)日：2008-06-12
申请号：US11727556
申请日：2007-03-27
申请人： Yen-Wen Chen , Yen-Ynn Chou
发明人： Yen-Wen Chen , Yen-Ynn Chou
IPC分类号： H03L5/00 , G05F3/02
CPC分类号： H03K19/01707 , H03K19/01714 , H03K19/018521
摘要： A level shifter including a first boost circuit, an inverter, a second boost circuit and a level shift circuit is disclosed. The first boost circuit receives an input signal, and a first amplification factor for the input signal is determined based on a control signal. The inverter receives the input signal to generate an inverted input signal. The second boost circuit is coupled to an output terminal of the inverter to receive the inverted input signal, and a second amplification factor for the inverted input signal is determined based on the control signal. The level shift circuit has a first input terminal and a second input terminal respectively coupled to output terminals of the first boost circuit and second boost circuit to change the voltage level of output signals from the first boost circuit and second boost circuit to a first voltage level.
摘要翻译：公开了一种包括第一升压电路，逆变器，第二升压电路和电平移位电路的电平移位器。第一升压电路接收输入信号，并且基于控制信号确定用于输入信号的第一放大因子。逆变器接收输入信号以产生反相输入信号。第二升压电路耦合到反相器的输出端以接收反相输入信号，并且基于控制信号确定用于反相输入信号的第二放大因子。电平移位电路具有分别耦合到第一升压电路和第二升压电路的输出端的第一输入端和第二输入端，以将来自第一升压电路和第二升压电路的输出信号的电压电平改变为第一电压电平。

6. 发明授权

US08514212B2 Drive circuit of display and method for calibrating brightness of display 失效
标题翻译：显示驱动电路及校准显示亮度的方法
公开(公告)号：US08514212B2
公开(公告)日：2013-08-20
申请号：US12615133
申请日：2009-11-09
申请人： Yen-Ynn Chou
发明人： Yen-Ynn Chou
IPC分类号： G09G5/00
CPC分类号： G09G3/20 , G09G2310/0275 , G09G2360/147
摘要： A drive circuit of a displayer for driving at least a pixel, including: an output stage coupled to the pixel and controlled by a pixel signal to switch an output voltage on the pixel; a calibration device coupled between the output stage and the pixel and including an input end controlled by a bias voltage further calibrating the brightness of the pixel; a stabilizing device coupled between the input end of the calibration device and the pixel signal for stabilizing the voltage on the input end of the calibration device to be at the level of the bias voltage after a variation; and a accelerating device coupled between the stabilizing device and a voltage source for generating the bias voltage and accelerating the speed stabilizing the voltage on the input end of the calibration device to be at the level of the bias voltage.
摘要翻译：一种用于驱动至少一个像素的显示器的驱动电路，包括：输出级，其耦合到像素并由像素信号控制以切换像素上的输出电压; 耦合在所述输出级和所述像素之间并包括由偏置电压控制的输入端的校准装置，所述偏置电压进一步校准所述像素的亮度; 耦合在所述校准装置的输入端和所述像素信号之间的稳定装置，用于使所述校准装置的输入端上的电压稳定在变化之后的所述偏置电压的电平; 以及加速装置，其耦合在所述稳定装置和用于产生所述偏置电压的电压源之间并且加速使所述校准装置的输入端上的电压稳定在所述偏置电压的电平的速度。

7. 发明授权

US08405684B2 Method and apparatus for calibrating the brightness of the carbon nanotube display 失效
标题翻译：用于校准碳纳米管显示器的亮度的方法和装置
公开(公告)号：US08405684B2
公开(公告)日：2013-03-26
申请号：US12565438
申请日：2009-09-23
申请人： Yen-Ynn Chou
发明人： Yen-Ynn Chou
IPC分类号： G09G5/10
CPC分类号： H01J31/127 , G09G2320/0693
摘要： A drive circuit of a carbon nanotube display (CNDP) used to drive at least a pixel of a CNDP is provided, having an output stage and a calibration device. The output stage is coupled to the pixel and controlled by a pixel signal to switch the pixel between a high voltage and a low voltage. The calibration device is coupled between the output stage and the pixel and controlled by a bias to calibrate the equivalent resistance of the calibration device and further calibrate the brightness of the pixel.
摘要翻译：提供了用于驱动CNDP的至少一个像素的碳纳米管显示器（CNDP）的驱动电路，具有输出级和校准装置。输出级耦合到像素并由像素信号控制以在高电压和低电压之间切换像素。校准装置耦合在输出级和像素之间，并通过偏置来控制，以校准校准装置的等效电阻并进一步校准像素的亮度。

8. 发明申请

US20080224959A1 Display control circuit for vacuum fluorescent display 有权
标题翻译：显示真空荧光显示控制电路
公开(公告)号：US20080224959A1
公开(公告)日：2008-09-18
申请号：US11902743
申请日：2007-09-25
申请人： Yen-Ynn Chou
发明人： Yen-Ynn Chou
IPC分类号： G09G3/20 , G06F1/04
CPC分类号： G06F1/04 , G09G3/22
摘要： The invention provides display control circuits for Vacuum Fluorescent Displays (VFDs). The display control circuit controls a plurality of display units of the VFD and comprises an image signal generator generating a plurality of image signals, a clock signal generator generating a clock signal, and a plurality of control signal generators. Each control signal generator receives one of the image signals and the clock signal, generates a control signal for one of the display unit, and determines the duty cycle of the control signal according to the received image signal and the clock signal. The brightness of one display unit varies with the duty cycles of the corresponding control signal. The clock signal generator comprises a plurality of flip-flops coupled in series and a plurality of logic gates.
摘要翻译：本发明提供了真空荧光显示器（VFD）的显示控制电路。显示控制电路控制VFD的多个显示单元，并且包括产生多个图像信号的图像信号发生器，产生时钟信号的时钟信号发生器和多个控制信号发生器。每个控制信号发生器接收一个图像信号和时钟信号，产生一个显示单元的控制信号，并根据接收到的图像信号和时钟信号确定控制信号的占空比。一个显示单元的亮度随相应的控制信号的占空比而变化。时钟信号发生器包括串联耦合的多个触发器和多个逻辑门。

9. 发明授权

US08654156B2 Driver circuit of display and method for calibrating brightness of display 失效
标题翻译：显示器的驱动电路和校准显示亮度的方法
公开(公告)号：US08654156B2
公开(公告)日：2014-02-18
申请号：US12650405
申请日：2009-12-30
申请人： Yen-Ynn Chou
发明人： Yen-Ynn Chou
IPC分类号： G09G5/10
CPC分类号： G09G3/3614 , G09G2320/0693
摘要： A driver circuit for driving at least a pixel of a displayer, including an output stage, a calibration device and a surge suppression device. The output stage is coupled to the pixel and controlled by a pixel signal to switch an output voltage on the pixel between a high level and a low level. The calibration device is coupled between the output stage and the pixel and comprises an input end controlled by a bias voltage to calibrate an equivalent resistance of the calibration device for further calibrating a brightness level of the pixel. The surge suppression device is coupled between the input end of the calibration device and the pixel signal, and is used to suppress surges in the bias voltage which occur due to switching of the output voltage.
摘要翻译：一种用于驱动显示器的至少像素的驱动电路，包括输出级，校准装置和浪涌抑制装置。输出级耦合到像素并由像素信号控制，以在高电平和低电平之间切换像素上的输出电压。校准装置耦合在输出级和像素之间，并且包括由偏置电压控制的输入端，以校准校准装置的等效电阻，以进一步校准像素的亮度级。浪涌抑制装置耦合在校准装置的输入端和像素信号之间，并且用于抑制由于输出电压的切换而产生的偏置电压的浪涌。

10. 发明授权

US08089427B2 Display control circuit for vacuum fluorescent display 有权
标题翻译：显示真空荧光显示控制电路
公开(公告)号：US08089427B2
公开(公告)日：2012-01-03
申请号：US11902743
申请日：2007-09-25
申请人： Yen-Ynn Chou
发明人： Yen-Ynn Chou
IPC分类号： G09G3/22
CPC分类号： G06F1/04 , G09G3/22
摘要： The invention provides display control circuits for Vacuum Fluorescent Displays (VFDs). The display control circuit controls a plurality of display units of the VFD and comprises an image signal generator generating a plurality of image signals, a clock signal generator generating a clock signal, and a plurality of control signal generators. Each control signal generator receives one of the image signals and the clock signal, generates a control signal for one of the display unit, and determines the duty cycle of the control signal according to the received image signal and the clock signal. The brightness of one display unit varies with the duty cycles of the corresponding control signal. The clock signal generator comprises a plurality of flip-flops coupled in series and a plurality of logic gates.
摘要翻译：本发明提供了真空荧光显示器（VFD）的显示控制电路。显示控制电路控制VFD的多个显示单元，并且包括产生多个图像信号的图像信号发生器，产生时钟信号的时钟信号发生器和多个控制信号发生器。每个控制信号发生器接收一个图像信号和时钟信号，产生一个显示单元的控制信号，并根据接收到的图像信号和时钟信号确定控制信号的占空比。一个显示单元的亮度随相应的控制信号的占空比而变化。时钟信号发生器包括串联耦合的多个触发器和多个逻辑门。

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