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1. 发明授权

US5517152A Current source circuit and operating method thereof 失效
标题翻译：电流源电路及其操作方法
公开(公告)号：US5517152A
公开(公告)日：1996-05-14
申请号：US948355
申请日：1992-09-23
申请人： Takahiro Miki , Yasuyuki Nakamura , Shiro Hosotani
发明人： Takahiro Miki , Yasuyuki Nakamura , Shiro Hosotani
IPC分类号： G05F3/24 , H02J1/00 , H03F3/343 , H03F3/345 , H03F3/347 , H03K3/356 , H03K17/041 , H03M1/74 , H01J19/82 , G05F1/10 , G05F3/04 , H03K3/00
CPC分类号： G05F3/242 , H03K17/04106 , H03K3/356017 , H03M1/745
摘要： A current source circuit according to the present invention is provided with an output terminal 100, a bias voltage source 21, N channel MOS transistors 2 and 1 and P channel MOS transistor 3. The source of transistor 2, the drain of transistor 1 and the drain of transistor 3 are connected to a common node, the drain of transistor 2 is connected to output terminal 100 and the gate of transistor 2 is connected to bias voltage source 21. Conductions of transistors 1 and 3 are dynamically controlled in response to an external signal. As a result, it is possible to implement a current source circuit having a small number of devices and enabling an operation at a high speed.
摘要翻译：根据本发明的电流源电路设置有输出端子100，偏置电压源21，N沟道MOS晶体管2和1以及P沟道MOS晶体管3.晶体管2的源极，晶体管1的漏极和晶体管3的漏极连接到公共节点，晶体管2的漏极连接到输出端子100，晶体管2的栅极连接到偏置电压源21.晶体管1和3的结合是响应于外部的信号。结果，可以实现具有少量器件的电流源电路，并且能够高速地进行操作。

2. 发明授权

US5854569A Current source for rapid switching and reduced oscillatory transients 失效
标题翻译：用于快速切换和减少振荡瞬变的电流源
公开(公告)号：US5854569A
公开(公告)日：1998-12-29
申请号：US890027
申请日：1997-07-31
申请人： Hiroyuki Kohno , Yasuyuki Nakamura , Takahiro Miki
发明人： Hiroyuki Kohno , Yasuyuki Nakamura , Takahiro Miki
IPC分类号： H01L27/04 , G05F3/24 , H01L21/822 , H03K17/16 , H03K17/687 , G05F3/02
CPC分类号： G05F3/242 , H03K2217/0018
摘要： A current source and a semiconductor integrated circuit device for suppressing fluctuations occured in an output current of current sources composed MOS transistors for switching. A back gate voltage of MOS transistors M1, M3 for switching connected in series to a constant current generator 9 is supplied through a power source line 5d independent of a power source line 4d which supplies a driving voltage. The stabilization of the back gate voltage leads the operation of the MOS transistors M1, M3 to be stabilized, thereby suppressing the fluctuations occured in the output currents I.sub.out and I.sub.out current sources.
摘要翻译：电流源和半导体集成电路器件，用于抑制组合用于切换的MOS晶体管的电流源的输出电流发生的波动。用于与恒定电流发生器9串联连接的开关用的MOS晶体管M1，M3的背栅电压通过电源线5d供给，而电源线5d独立于提供驱动电压的电源线4d。背栅极电压的稳定导致MOS晶体管M1，M3的操作稳定，从而抑制输出电流Iout和+ E，ovs Iout + EE电流源中发生的波动。

3. 发明授权

US5657018A Bar graph decoder outputting thermometer code 失效
标题翻译：条形图解码器输出温度计代码
公开(公告)号：US5657018A
公开(公告)日：1997-08-12
申请号：US538485
申请日：1995-10-03
申请人： Hiroyuki Kohno , Yasuyuki Nakamura , Takahiro Miki
发明人： Hiroyuki Kohno , Yasuyuki Nakamura , Takahiro Miki
IPC分类号： H03M1/76 , H03M7/00 , H03M7/08 , H03M7/16 , H03M5/00
CPC分类号： H03M7/165
摘要： A bar graph decoder includes input terminals to which 5-bit digital data is input, a logic circuit for outputting a thermometer code changing continuously at a constant ratio in response to the input data, and output terminals connected to the logic circuit for outputting switch select signals according to the digital input. The logic circuit is configured only of 2-input OR circuits and 2-input AND circuits. As a result, a bar graph decoder having a simple configuration and a reduced number of elements can be provided.
摘要翻译：条形图解码器包括输入5位数字数据的输入端子，用于输出响应于输入数据以恒定比例连续变化的温度计代码的逻辑电路，以及连接到用于输出开关选择的逻辑电路的输出端子信号根据数字输入。逻辑电路仅由2输入OR电路和2输入AND电路组成。结果，可以提供具有简单配置和数量减少的元件的条形图解码器。

4. 发明授权

US5689258A Multiple current digital-analog converter capable of reducing output glitch 失效
标题翻译：多电流数字模拟转换器可以减少输出毛刺
公开(公告)号：US5689258A
公开(公告)日：1997-11-18
申请号：US532315
申请日：1995-09-21
申请人： Yasuyuki Nakamura , Hiroyuki Kouno , Takahiro Miki
发明人： Yasuyuki Nakamura , Hiroyuki Kouno , Takahiro Miki
IPC分类号： H03M1/08 , H03M1/74 , H03M1/66
CPC分类号： H03M1/0863 , H03M1/747
摘要： A digital-analog converter has unit current source cells each having a differential switch circuit and a constant current source. The differential switch circuit made of two switches is driven by a pair of complementary driving circuits controlled by a bit signal and the inverted bit signal corresponding to that signal and entered simultaneously. The constant current source outputs a constant current to a first and a second current output terminal via the switch circuit. The signals for controlling the driving circuits that drive the switches are such that the delay time for the switch closing operation will be longer than the delay time for the switch opening operation. As a result, the cross point of the two signals to open and close the switches in a complementary manner becomes greater than the median between the maximum and minimum signal levels. That is, even when the threshold value of a currently switching transistor is greater than a median, that value may be arranged to match the median, whereby the furnished switching transistors are not turned on or off simultaneously.
摘要翻译：数模转换器具有单元电流源单元，每个单元具有差分开关电路和恒流源。由两个开关构成的差分开关电路由一对由位信号控制的互补驱动电路和对应于该信号的反相位信号驱动并同时输入。恒流源通过开关电路向第一和第二电流输出端输出恒定电流。用于控制驱动开关的驱动电路的信号使得开关闭合操作的延迟时间将长于开关操作的延迟时间。结果，以互补方式打开和闭合开关的两个信号的交叉点变得大于最大和最小信号电平之间的中值。也就是说，即使当当前开关晶体管的阈值大于中值时，也可以将该值设置为与中值相匹配，由此所提供的开关晶体管不会同时导通或截止。

5. 发明授权

US4723194A Structure of capacitor circuit 失效
标题翻译：电容电路结构
公开(公告)号：US4723194A
公开(公告)日：1988-02-02
申请号：US911434
申请日：1986-09-25
申请人： Yasuyuki Nakamura , Takahiro Miki
发明人： Yasuyuki Nakamura , Takahiro Miki
IPC分类号： H01L27/04 , G11C11/24 , H01G4/38 , H01L21/822
CPC分类号： G11C11/24 , H01G4/385
摘要： A structure of a capacitor circuit in accordance with the present invention comprises a plurality of capacitors formed on a semiconductor or conductor substrate in a manner in which insulating films and electrodes are provided alternately. This structure is characterized in that: there are provided a first capacitor and a second capacitor adjacent to each other; the first capacitor and the second capacitor comprise, respectively, first electrodes formed on the substrate through the first insulating film, second electrodes formed on the first electrodes through the second insulating film and third electrodes formed on the second electrodes through the third insulating film, the third electrode of the first capacitor being connected to the second electrode of the second capacitor.
摘要翻译：根据本发明的电容器电路的结构包括以交替设置绝缘膜和电极的方式形成在半导体或导体基板上的多个电容器。该结构的特征在于：提供了彼此相邻的第一电容器和第二电容器; 第一电容器和第二电容器分别包括通过第一绝缘膜形成在基板上的第一电极，通过第二绝缘膜形成在第一电极上的第二电极和通过第三绝缘膜形成在第二电极上的第三电极，第一电容器的第三电极连接到第二电容器的第二电极。

6. 发明授权

US5631579A Output buffer circuit for interfacing semiconductor integrated circuits operating on different supply voltages 失效
标题翻译：用于连接在不同电源电压下工作的半导体集成电路的输出缓冲电路
公开(公告)号：US5631579A
公开(公告)日：1997-05-20
申请号：US548066
申请日：1995-10-25
申请人： Takahiro Miki , Hiroyuki Kouno , Yasuyuki Nakamura
发明人： Takahiro Miki , Hiroyuki Kouno , Yasuyuki Nakamura
IPC分类号： G06F3/00 , G11C11/409 , H01L27/02 , H03K19/003 , H03K19/0175 , H03K19/0185
CPC分类号： H03K19/00315 , H01L27/0251
摘要： An output buffer circuit operating normally when its supply potential is exceeded by the potential of the bus to which the buffer circuit output is connected. The circuit comprises a p-channel MOS transistor and a first and a second n-channel MOS transistor. The output node of the output buffer circuit is connected not to the p-channel MOS transistor but to the connection point between the source of the first n-channel MOS transistor and the drain of the second n-channel MOS transistor. The threshold potential of the first n-channel MOS transistor is set so that, with the output node in the high-impedance state, the first n-channel MOS transistor is turned off when the output node potential exceeds the supply potential of the output buffer circuit. This prevents the p-channel MOS transistor from getting activated or from being forward-biased between the back gate and the drain or source. Thus no leak current flows when the bus potential becomes higher than the supply potential of the output buffer circuit.
摘要翻译：当缓冲电路输出的总线的电位超过其电源电位时，输出缓冲电路正常工作。电路包括p沟道MOS晶体管和第一和第二n沟道MOS晶体管。输出缓冲电路的输出节点不连接到p沟道MOS晶体管，而是连接到第一n沟道MOS晶体管的源极和第二n沟道MOS晶体管的漏极之间的连接点。第一n沟道MOS晶体管的阈值电位被设置为使得当输出节点处于高阻抗状态时，当输出节点电位超过输出缓冲器的供给电位时，第一n沟道MOS晶体管截止电路。这防止了p沟道MOS晶体管在背栅极和漏极或源极之间被激活或被正向偏置。因此，当总线电位变得高于输出缓冲电路的电源电位时，没有泄漏电流流动。

7. 发明申请

US20110164258A1 IMAGE PROCESSING APPARATUS AND IMAGE PROCESSING METHOD 失效
标题翻译：图像处理装置和图像处理方法
公开(公告)号：US20110164258A1
公开(公告)日：2011-07-07
申请号：US12809508
申请日：2008-12-19
申请人： Yasuyuki Nakamura
发明人： Yasuyuki Nakamura
IPC分类号： G06K15/02
CPC分类号： H04N1/0402 , G06T1/00 , G06T3/4053 , H04N1/0411 , H04N1/0414 , H04N1/0417 , H04N1/0455 , H04N1/1017 , H04N1/3871 , H04N1/40068
摘要： An image processing apparatus is provided with an area sensor which is formed by arranging sensor components for a pixel in a two-dimensional array and is attached in an inclined manner with respect to a reference installation position. The apparatus has a sensor unit which reads, from the sensor components which are determined based on an inclination angle indicating an inclination of the area sensor from the reference installation position and have been arranged within the area sensor, image data in which the inclination has been corrected; an image obtaining unit which obtains a plurality of frames of image data having a shift of less than one pixel, by scanning an original document image once by the sensor unit; and a high resolution conversion unit which obtains image data with a resolution higher than resolutions of the sensor components by using the obtained image data to perform interpolation processing.
摘要翻译：一种图像处理装置设置有区域传感器，该区域传感器通过将二维阵列中的像素的传感器部件布置并相对于参考安装位置倾斜地安装而形成。该装置具有传感器单元，该传感器单元从传感器部件读出基于表示区域传感器与参考安装位置的倾斜度并且已经布置在区域传感器内的倾斜角度确定的部件，其中已经倾斜的图像数据纠正图像获取单元，通过由传感器单元扫描原始文件图像一次，获得具有小于一个像素的移位的多个帧的图像数据; 以及高分辨率转换单元，其通过使用所获得的图像数据来获得具有高于传感器组件的分辨率的分辨率的图像数据，以进行插值处理。

8. 发明申请

US20080311428A1 Phase-Change Substance and Thermal Control Device 失效
标题翻译：相变物质和热控制装置
公开(公告)号：US20080311428A1
公开(公告)日：2008-12-18
申请号：US12088389
申请日：2006-09-28
申请人： Toru Mori , Yoshimi Kubo , Akira Okamoto , Yasuyuki Nakamura
发明人： Toru Mori , Yoshimi Kubo , Akira Okamoto , Yasuyuki Nakamura
IPC分类号： C01F17/00 , B32B9/00
CPC分类号： C09K5/08 , C01G45/1264 , C01P2002/34 , C03C17/23 , C03C17/3417 , C03C17/3435 , C03C2217/23
摘要： In an Mn-containing perovskite oxide which is a conventional phase-change substance (A1−xBx)MnO3, when the mixing amount x is increased, the transition temperature (Tc) is shifted to higher temperature side, but the slope of a change in the emittance become gentle and Δε (ε at higher temperature−ε at lower temperature) also become small. In the present invention, the compositional formula of the phase-change substance is the Mn-containing perovskite oxide represented by (A1−xBx)Mn1+yO3 with 0
摘要翻译：在常规相变物质（A1-xBx）MnO3的含Mn钙钛矿氧化物中，当混合量x增加时，转变温度（Tc）转变到较高温度侧，但是斜率发光度变得平缓，而Deltaepsilon（较低温度下的ε-ε较高）也变小。在本发明中，相变物质的组成式是由（A1-xBx）Mn1 + yO3表示的含有Mn的钙钛矿氧化物，其中Mn比由化学计量组成变化，从而使转变温度（Tc）升高到更高的温度，其发射特性与具有从化学计量组成不变的组成的相变物质相当。

9. 发明申请

US20060256120A1 Image processing apparatus and image processing method 有权
公开(公告)号：US20060256120A1
公开(公告)日：2006-11-16
申请号：US11487370
申请日：2006-07-17
申请人： Katsutoshi Ushida , Yuichi Naoi , Yoshiaki Katahira , Yasuyuki Nakamura , Koichi Morishita , Makoto Fukuo
发明人： Katsutoshi Ushida , Yuichi Naoi , Yoshiaki Katahira , Yasuyuki Nakamura , Koichi Morishita , Makoto Fukuo
IPC分类号： G09G5/39
CPC分类号： G06T1/60 , G06T1/0007
摘要： To provide an image processing technique compatible with both a CCD and a CIS, which controls storage of image data read by each device in a memory and the read of the stored data for each rectangular area to obtain a high memory efficiency, an image processing apparatus includes a memory area control section which sets, for image data bitmapped on a first memory, a rectangular area divided in a main scanning direction and sub-scanning direction, an address generation section which generates address information to read out image data corresponding to the rectangular area in correspondence with the set rectangular area, a memory control section which reads out the image data corresponding to the rectangular area and DMA-transfers the image data to a second memory in accordance with the generated address information, and an image processing section which executes image processing for each rectangular area of the DMA-transferred data by using the second memory.

10. 发明授权

US06506167B1 Blood-collecting tubes 失效
标题翻译：采血管
公开(公告)号：US06506167B1
公开(公告)日：2003-01-14
申请号：US09641585
申请日：2000-08-18
申请人： Tetsushi Ishimito , Yasuyuki Nakamura , Katsutoshi Hamada
发明人： Tetsushi Ishimito , Yasuyuki Nakamura , Katsutoshi Hamada
IPC分类号： A61B500
CPC分类号： B01L3/5021 , A61B5/15003 , A61B5/150251 , A61B5/150351 , A61B5/150389 , A61B5/150473 , A61B5/154 , G01N33/491
摘要： An object of the invention is to achieve an increased speed of blood collection and separation as well as ease of handling of plasma components after blood separation. A blood-collecting tube, which draws in blood and separates it by using an internal negative pressure in the tube, comprises an upstream tube 10 having a blood inlet 11 and blood outlets 18, a filter 20 for separating blood and a downstream tube 12. A plug 18 is fitted to the blood inlet 11 to thereby close the interior of the upstream tube 10, and the filter 20 is installed so that it blocks the blood outlets 18. The downstream tube 12 is disposed to enclose the filter 20 and constructed in such a way that the downstream tube 12 can be attached to and detached from the upstream tube 10.
摘要翻译：本发明的目的是提高血液采集和分离的速度，以及在血液分离后容易处理血浆成分。吸入血液并通过使用管中的内部负压将其分离的采血管包括具有血液入口11和血液出口18的上游管10，用于分离血液的过滤器20和下游管12。插塞18装配到血液入口11，从而封闭上游管10的内部，并且安装过滤器20以便阻止血液出口18.下游管12设置成包围过滤器20并构成使得下游管12能够与上游管10连接和分离。

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