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1. 发明授权

US08534563B2 Interface IC and memory card including the same 有权
标题翻译：接口IC和存储卡包括相同
公开(公告)号：US08534563B2
公开(公告)日：2013-09-17
申请号：US12923928
申请日：2010-10-14
申请人： Yasutaka Nakashiba , Hiroaki Ohkubo , Mitsuji Okada , Shigeharu Nakata , Shuuichi Kagawa
发明人： Yasutaka Nakashiba , Hiroaki Ohkubo , Mitsuji Okada , Shigeharu Nakata , Shuuichi Kagawa
IPC分类号： G06K19/06
CPC分类号： G06K19/073 , G11C7/24 , H03K19/017509
摘要： An exemplary aspect of the present invention is a memory card that includes: a memory that stores data; a driver that modulates the data stored in the memory; a transmitter that transmits the data modulated by the driver to a receiver provided in an external main unit; and an IC chip having the driver and the transmitter formed therein.
摘要翻译：本发明的示例性方面是存储卡，其包括：存储数据的存储器; 调制存储在存储器中的数据的驱动程序; 将由所述驱动器调制的数据发送到设置在外部主单元中的接收机的发射机; 以及其中形成有驱动器和发送器的IC芯片。

2. 发明申请

US20110089247A1 Interface IC and memory card including the same 有权
标题翻译：接口IC和存储卡包括相同
公开(公告)号：US20110089247A1
公开(公告)日：2011-04-21
申请号：US12923928
申请日：2010-10-14
申请人： Yasutaka Nakashiba , Hiroaki Ohkubo , Mitsuji Okada , Shigeharu Nakata , Shuuichi Kagawa
发明人： Yasutaka Nakashiba , Hiroaki Ohkubo , Mitsuji Okada , Shigeharu Nakata , Shuuichi Kagawa
IPC分类号： G06K19/073 , H03B1/00
CPC分类号： G06K19/073 , G11C7/24 , H03K19/017509
摘要： An exemplary aspect of the present invention is a memory card that includes: a memory that stores data; a driver that modulates the data stored in the memory; a transmitter that transmits the data modulated by the driver to a receiver provided in an external main unit; and an IC chip having the driver and the transmitter formed therein.
摘要翻译：本发明的示例性方面是存储卡，其包括：存储数据的存储器; 调制存储在存储器中的数据的驱动程序; 将由所述驱动器调制的数据发送到设置在外部主单元中的接收机的发射机; 以及其中形成有驱动器和发送器的IC芯片。

3. 发明申请

US20090161735A1 Direct sequence spread spectrum device and method for communication therewith 审中-公开
标题翻译：直接序列扩频设备及其通信方法
公开(公告)号：US20090161735A1
公开(公告)日：2009-06-25
申请号：US12314908
申请日：2008-12-18
申请人： Mitsuji Okada
发明人： Mitsuji Okada
IPC分类号： H04B1/707
CPC分类号： H04B1/70755
摘要： The communication device according to the present invention is a direct sequence spread spectrum device that performs a communication by using multiple different spread codes for multiple symbols. The direct sequence spread spectrum device according to the present invention includes: a correlation unit that calculates a correlation between each of the multiple different spread codes and a received signal spread by each of the multiple different spread codes, and that outputs a correlation degree for each of the spread codes; and a determination unit that demodulates the received signal to a symbol based on a value of the correlation degree for each of the spread codes.
摘要翻译：根据本发明的通信设备是通过对多个符号使用多个不同的扩展码来执行通信的直接序列扩频设备。根据本发明的直接序列扩展频谱装置包括：相关单元，其计算多个不同扩展码中的每一者与由多个不同扩频码中的每一个扩频的接收信号之间的相关性，并且输出每个的传播码; 以及确定单元，其基于每个扩展码的相关度的值将接收信号解调为符号。

4. 发明授权

US5191654A Microprocessor for high speed data processing 失效
标题翻译：用于高速数据处理的微处理器
公开(公告)号：US5191654A
公开(公告)日：1993-03-02
申请号：US822049
申请日：1992-01-16
申请人： Mitsuji Okada
发明人： Mitsuji Okada
IPC分类号： G06F7/00 , G06F7/76 , G06F15/78
CPC分类号： G06F15/7832
摘要： A microprocessor is provided with one input/output port per bit including a decoder 6 for determining whether or not a bit assigned to the input/output port is selected for a procesing operation in an output mode, and a processing circuit 12 for processing an operation that has been designated. The processing circuit 12 comprises at least one processing element for processing supplied 1-bit data for the processing and/or output latch data held inside the processing circuit itself. The processing element is selected by separately inputted processing information for outputting processed data. A masking circuit outputs the processed data from an output terminal only when an output signal from the decoder 6 indicates that the bit assigned to the input/output port is selected.
摘要翻译：微处理器具有每位一个输入/输出端口，包括解码器6，用于确定分配给输入/输出端口的位是否被选择用于输出模式中的处理操作;以及处理电路12，用于处理操作已被指定。处理电路12包括用于处理提供的1位数据以用于处理和/或输出保持在处理电路本身内的锁存数据的至少一个处理元件。通过分别输入的处理信息来选择处理元件，以输出处理数据。只有当来自解码器6的输出信号指示分配给输入/输出端口的位被选择时，屏蔽电路才从输出端输出处理后的数据。

5. 发明授权

US06421352B1 Data processing apparatus capable of independently interrupting transmission data 失效
标题翻译：能够独立地中断发送数据的数据处理装置
公开(公告)号：US06421352B1
公开(公告)日：2002-07-16
申请号：US09092341
申请日：1998-06-05
申请人： Susumu Manaka , Mitsuji Okada
发明人： Susumu Manaka , Mitsuji Okada
IPC分类号： H04L12413
CPC分类号： H04L12/40032 , H04L12/413 , H04L47/12 , H04L47/13
摘要： In a data processing apparatus, a receiver receives pause control data signals from other data processing apparatuses. Each of the pause control data signals includes identification data of one of the other data processing apparatuses and a transmission interrupting time period. The identification data associated with the transmission interrupting time period is stored in a memory. Also, when a time corresponding to the transmission interrupting time period has passed, the identification data is removed from the memory. Transmission of data to one of the other data processing apparatuses having the identification data stored in the memory is interrupted.
摘要翻译：在数据处理装置中，接收器从其他数据处理装置接收暂停控制数据信号。每个暂停控制数据信号包括其他数据处理装置之一的识别数据和传输中断时间段。与传输中断时间段相关联的识别数据被存储在存储器中。此外，当与发送中断时间段对应的时间过去时，识别数据从存储器中移除。将具有存储在存储器中的识别数据的其他数据处理装置之一的数据传输中断。

6. 发明授权

US08294513B2 Demodulator and demodulation method 失效
标题翻译：解调器和解调方法
公开(公告)号：US08294513B2
公开(公告)日：2012-10-23
申请号：US12892511
申请日：2010-09-28
申请人： Mitsuji Okada , Hiromi Saitou
发明人： Mitsuji Okada , Hiromi Saitou
IPC分类号： H03D1/00
CPC分类号： H04L27/06 , H04L25/062
摘要： A demodulator according to the present invention is the demodulator that demodulates a plurality of received symbols having different amplitude of carrier wave. The demodulator includes an amplitude value calculation unit that calculates a received symbol amplitude value by adding an absolute value of in-phase component and an absolute value of quadrature component determined from the amplitude of the carrier wave in the received symbol. Further, the demodulator includes a demodulation unit that detects a change of the received symbol amplitude value calculated by the amplitude value calculation unit, and demodulates the received symbol based on the detection result.
摘要翻译：根据本发明的解调器是对具有不同载波振幅的多个接收符号进行解调的解调器。解调器包括振幅值计算单元，其通过将接收到的符号中的载波的振幅确定的正交分量的绝对值和正交分量的绝对值相加来计算接收到的符号幅度值。此外，解调器包括解调单元，其检测由振幅值计算单元计算出的接收符号振幅值的变化，并且基于检测结果对接收的符号进行解调。

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