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1. 发明申请

US20120038022A1 INSULATING SUBSTRATE FOR SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE 审中-公开
标题翻译：用于半导体器件的绝缘衬底和半导体器件
公开(公告)号：US20120038022A1
公开(公告)日：2012-02-16
申请号：US13259076
申请日：2009-10-26
申请人： Kazuhide Tomiyasu , Yutaka Takafuji , Yasumori Fukushima , Kazuo Nakagawa , Kenshi Tada , Michiko Takei , Shin Matsumoto
发明人： Kazuhide Tomiyasu , Yutaka Takafuji , Yasumori Fukushima , Kazuo Nakagawa , Kenshi Tada , Michiko Takei , Shin Matsumoto
IPC分类号： H01L29/02 , B32B3/00
CPC分类号： H01L27/1218 , H01L27/1214 , H01L27/1222 , H01L27/1266 , H01L29/66772 , Y10T428/24355
摘要： Disclosed is a glass substrate (20) that is capable of constituting a semiconductor device (10) when a monocrystalline silicon thin film (90) is provided on the surface of the substrate by transfer. The surface of the glass substrate (20) has a receiving surface (22) onto which the monocrystalline silicon thin film (90) can be provided. The height of the ripples on the receiving surface (22) having a period of 200 to 500 microns is no more than 0.40 nm.
摘要翻译：公开了当通过转印在基板的表面上设置单晶硅薄膜（90）时能够构成半导体器件（10）的玻璃基板（20）。玻璃基板（20）的表面具有能够设置单晶硅薄膜（90）的接收面（22）。在接收表面（22）上具有200至500微米的周期的波纹的高度不大于0.40nm。

2. 发明申请

US20110309467A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110309467A1
公开(公告)日：2011-12-22
申请号：US13141332
申请日：2009-11-25
申请人： Shin Matsumoto , Yutaka Takafuji , Yasumori Fukushima , Kazuhide Tomiyasu , Kenshi Tada
发明人： Shin Matsumoto , Yutaka Takafuji , Yasumori Fukushima , Kazuhide Tomiyasu , Kenshi Tada
IPC分类号： H01L27/12 , H01L21/762
CPC分类号： H01L27/1266
摘要： Disclosed is a semiconductor device including a substrate for bonding (10a), and a semiconductor element part (25aa) which is bonded to the substrate (10a), and in which an element pattern (T) is formed, wherein in a bonded interface between the substrate (10a) and the semiconductor element part (25aa), recessed portions (23a) are formed in at least one of the substrate (10a) and the semiconductor element part (25aa).
摘要翻译：公开了一种包括用于接合的基板（10a）的半导体器件和接合到基板（10a）的半导体元件部分（25aa），并且其中形成有元件图案（T），其中在在基板（10a）和半导体元件部（25aa）中的至少一个上形成有基板（10a）和半导体元件部（25a），凹部（23a）。

3. 发明申请

US20100295105A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100295105A1
公开(公告)日：2010-11-25
申请号：US12746323
申请日：2008-09-25
申请人： Yasumori Fukushima , Kazuhide Tomiyasu , Yutaka Takafuji , Kenshi Tada , Michiko Takei
发明人： Yasumori Fukushima , Kazuhide Tomiyasu , Yutaka Takafuji , Kenshi Tada , Michiko Takei
IPC分类号： H01L29/78 , H01L21/762 , H01L29/73 , H01L29/861 , H01L21/331 , H01L21/336
CPC分类号： H01L27/1266 , H01L21/76254 , H01L27/1214 , H01L29/6659 , H01L29/66772 , H01L29/7833
摘要： A method for manufacturing a semiconductor device includes: an element portion formation step of forming an element portion on a base layer; a delaminating layer formation step of forming a delaminating layer in the base layer; a bonding step of bonding the base layer having the element portion to a substrate; and a separation step of separating and removing a portion of the base layer in the depth direction along the delaminating layer by heating the base layer bonded to the substrate. The method further includes, after the separation step, an ion implantation step of ion-implanting a p-type impurity element in the base layer for adjusting the impurity concentration of a p-type region of the element.
摘要翻译：一种制造半导体器件的方法包括：元件部分形成步骤，在基底层上形成元件部分; 在所述基底层中形成剥离层的剥离层形成工序; 键合步骤，将具有元件部分的基底层粘合到基底上; 以及分离步骤，通过加热结合到基板的基底层，沿着剥离层在深度方向上分离和去除基底层的一部分。该方法还包括在分离步骤之后的离子注入步骤，用于在基底层中离子注入p型杂质元素，以调整元件的p型区域的杂质浓度。

4. 发明申请

US20100252885A1 SEMICONDUCTOR DEVICE AND DISPLAY DEVICE 审中-公开
标题翻译：半导体器件和显示器件
公开(公告)号：US20100252885A1
公开(公告)日：2010-10-07
申请号：US12742463
申请日：2008-09-19
申请人： Yasumori Fukushima , Yutaka Takafuji , Kenshi Tada
发明人： Yasumori Fukushima , Yutaka Takafuji , Kenshi Tada
IPC分类号： H01L27/12
CPC分类号： H01L21/84 , H01L21/76254 , H01L27/12 , H01L29/78603 , H01L29/78621
摘要： A semiconductor device (10) is formed by bonding a semiconductor substrate (1) including a CMOS transistor (3) to a glass substrate (2). The semiconductor substrate (1) is formed by partial separation at a separation layer. A P-type high concentration impurity region (39n) is formed in electric connection with a channel region (35n) of an NMOS transistor (3n) so that an electric potential of the channel region (35n) is fixed. The P-type high concentration impurity region (39n) has the same P conductive type as that of the channel region (35n) and also has a concentration higher than that of the channel region (35n). An N-type high concentration impurity region (39p) is formed in electric connection with a channel region (35p) of a PMOS transistor (3p) so that an electric potential of the channel region (35p) is fixed. The N-type high concentration impurity region (39p) has the same N conductive type as that of the channel region (35p) and also has a concentration higher than that of the channel region (35p). This makes it possible to provide a semiconductor device whose performance can be enhanced by restraint on variation in a characteristic of a thin film transistor and a display device including the semiconductor device.
摘要翻译：半导体器件（10）通过将包括CMOS晶体管（3）的半导体衬底（1）结合到玻璃衬底（2）而形成。半导体衬底（1）通过在分离层处的部分分离而形成。形成与NMOS晶体管（3n）的沟道区（35n）电连接的P型高浓度杂质区（39n），使得沟道区（35n）的电位固定。 P型高浓度杂质区域（39n）具有与沟道区域（35n）相同的P导电型，并且其浓度高于沟道区域（35n）的浓度。形成与PMOS晶体管（3p）的沟道区（35p）电连接的N型高浓度杂质区（39p），使得沟道区（35p）的电位固定。 N型高浓度杂质区（39p）具有与沟道区（35p）相同的N导电型，其浓度高于沟道区（35p）。这使得可以提供一种通过限制薄膜晶体管的特性变化和包括半导体器件的显示装置来提高其性能的半导体器件。

5. 发明申请

US20120326264A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法和半导体器件
公开(公告)号：US20120326264A1
公开(公告)日：2012-12-27
申请号：US13497807
申请日：2010-05-18
申请人： Yasumori Fukushima , Yutaka Takafuji , Kenshi Tada
发明人： Yasumori Fukushima , Yutaka Takafuji , Kenshi Tada
IPC分类号： H01L21/58 , H01L25/00
CPC分类号： H01L27/1266 , H01L27/1218 , H01L29/66772
摘要： A method of fabricating a semiconductor device of the present invention includes the steps of forming a single crystal semiconductor device, attaching the single crystal semiconductor device on a substrate, forming a TFT on a glass substrate, and electrically connecting the single crystal semiconductor device and the TFT. In the step of forming a single crystal semiconductor device, an alignment mark is provided at the single crystal semiconductor device. In the step of attaching a single crystal semiconductor device, the single crystal semiconductor device is positioned and attached on the glass substrate based on the machining accuracy of an attachment device. In the step of forming a TFT, the TFT is positioned and provided on the glass substrate based on the alignment mark provided at the single crystal semiconductor device.
摘要翻译：制造本发明的半导体器件的方法包括以下步骤：形成单晶半导体器件，将单晶半导体器件安装在衬底上，在玻璃衬底上形成TFT，并将单晶半导体器件和 TFT。在形成单晶半导体器件的步骤中，在单晶半导体器件上设置对准标记。在安装单晶半导体器件的步骤中，单晶半导体器件基于安装器件的加工精度被定位并附着在玻璃基板上。在形成TFT的步骤中，基于设置在单晶半导体器件上的对准标记，将TFT设置在玻璃基板上。

6. 发明申请

US20100283104A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100283104A1
公开(公告)日：2010-11-11
申请号：US12746317
申请日：2008-11-25
申请人： Kenshi Tada , Yutaka Takafuji , Yasumori Fukushima , Kazuhide Tomiyasu , Michiko Takei , Kazuo Nakagawa , Shin Matsumoto
发明人： Kenshi Tada , Yutaka Takafuji , Yasumori Fukushima , Kazuhide Tomiyasu , Michiko Takei , Kazuo Nakagawa , Shin Matsumoto
IPC分类号： H01L29/786 , H01L21/762 , H01L21/28
CPC分类号： H01L27/1266 , H01L21/263 , H01L27/1214 , H01L29/6675 , H01L29/7836
摘要： An element portion forming step includes an insulating film forming step of forming an insulating film on a surface of a base layer, a conductive layer forming step of uniformly forming a conductive layer on a surface of the insulating film, and an electrode forming step of patterning the conductive layer to form an electrode. A delamination layer forming step of ion implanting a delamination material into the base layer to form a delamination layer is performed before the electrode forming step.
摘要翻译：元件部分形成步骤包括在基底层的表面上形成绝缘膜的绝缘膜形成步骤，在绝缘膜的表面上均匀地形成导电层的导电层形成步骤和图案化的电极形成步骤导电层形成电极。在电极形成步骤之前，进行将分层材料离子注入基层以形成分层的分层形成步骤。

7. 发明申请

US20110042693A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110042693A1
公开(公告)日：2011-02-24
申请号：US12933042
申请日：2009-04-09
申请人： Kenshi Tada , Yutaka Takafuji , Yasumori Fukushima , Kazuhide Tomiyasu , Michiko Takei , Kazuo Nakagawa , Shin Matsumoto
发明人： Kenshi Tada , Yutaka Takafuji , Yasumori Fukushima , Kazuhide Tomiyasu , Michiko Takei , Kazuo Nakagawa , Shin Matsumoto
IPC分类号： H01L33/08 , H01L21/762
CPC分类号： H01L27/1266 , H01L21/8221 , H01L21/84 , H01L27/0688 , H01L27/1203 , H01L27/1214
摘要： A semiconductor device (10) includes a support substrate (14), an adhered device part (11) adhered to the support substrate (14), a multilayer device part (13) stacked on the adhered device part (11), and an adjacent device part (12) formed in a region adjacent to the adhered device part on the support substrate (14). The adhered device part (11), the multilayer device part (13), and the adjacent device part (12) are electrically connected to one another.
摘要翻译：半导体装置（10）包括支撑基板（14），粘附到支撑基板（14）的粘合装置部分（11），堆叠在粘附装置部分（11）上的多层装置部分（13）装置部分（12）形成在与支撑基板（14）上的粘附装置部分相邻的区域中。粘合装置部分（11），多层装置部分（13）和相邻装置部分（12）彼此电连接。

8. 发明申请

US20110006376A1 SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, AND DISPLAY DEVICE 审中-公开
标题翻译：半导体器件，半导体器件制造方法和显示器件
公开(公告)号：US20110006376A1
公开(公告)日：2011-01-13
申请号：US12922119
申请日：2009-03-03
申请人： Yasumori Fukushima , Yutaka Takafuji , Masao Moriguchi , Kenshi Tada , Steven Roy Droes
发明人： Yasumori Fukushima , Yutaka Takafuji , Masao Moriguchi , Kenshi Tada , Steven Roy Droes
IPC分类号： H01L27/092 , H01L29/78 , H01L21/30 , H01L29/739
CPC分类号： H01L27/124 , H01L27/1214 , H01L27/1225 , H01L27/1266 , H01L29/4908 , H01L29/66772
摘要： The present invention provides a semiconductor device capable of improving subthreshold characteristics of a PMOS transistor that is included in a thinned base layer and bonded to another substrate, a production method of such a semiconductor device, and a display device. The semiconductor device of the present invention is a semiconductor device, including: a substrate; and a device part bonded to the substrate, the device part including a base layer and a PMOS transistor, the PMOS transistor including a first electrical conduction path and a first gate electrode, the first electrical conduction path being provided inside the base layer on a side where the first gate electrode is disposed.
摘要翻译：本发明提供一种半导体器件，其能够改善包括在薄化的基底层中并结合到另一衬底的PMOS晶体管的亚阈值特性，这种半导体器件的制造方法和显示器件。本发明的半导体器件是半导体器件，包括：衬底; 以及与基板接合的器件部件，所述器件部件包括基极层和PMOS晶体管，所述PMOS晶体管包括第一导电路径和第一栅电极，所述第一导电路径设置在所述基极层的侧面其中设置第一栅电极。

9. 发明申请

US20100289037A1 SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE 审中-公开
标题翻译：半导体器件及其制造方法及显示器件
公开(公告)号：US20100289037A1
公开(公告)日：2010-11-18
申请号：US12812162
申请日：2008-10-10
申请人： Shin Matsumoto , Yutaka Takafuji , Yasumori Fukushima , kenshi Tada
发明人： Shin Matsumoto , Yutaka Takafuji , Yasumori Fukushima , kenshi Tada
IPC分类号： H01L33/00 , H01L27/092 , H01L21/336 , H01L29/786
CPC分类号： H01L27/1266 , H01L21/76254 , H01L27/124 , H01L29/78 , H01L29/78654
摘要： The present invention provides a semiconductor device having a plurality of MOS transistors with controllable threshold values in the same face and easy to manufacture, a manufacturing method thereof and a display device. The invention is a semiconductor device having a plurality of MOS transistors in the same face each having a structure formed by stacking a semiconductor active layer, a gate insulator, and a gate electrode, wherein the semiconductor device includes: an insulating layer stacked on a side opposite to a gate electrode side of the semiconductor active layer; and a conductive electrode stacked on a side opposite to a semiconductor active layer side of the insulating layer and extending over at least two of the plurality of MOS transistors.
摘要翻译：本发明提供一种半导体器件，其具有在相同的面上具有可控制的阈值的多个MOS晶体管并且易于制造，其制造方法和显示装置。本发明是一种具有多个MOS晶体管的半导体器件，它们具有通过层叠半导体有源层，栅极绝缘体和栅电极形成的结构，其中半导体器件包括：堆叠在一侧的绝缘层与半导体有源层的栅电极侧相对; 以及在与所述绝缘层的半导体有源层侧相反的一侧层叠的多个MOS晶体管中的至少两个上延伸的导电电极。

10. 发明申请

US20100270658A1 SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100270658A1
公开(公告)日：2010-10-28
申请号：US12746156
申请日：2008-09-12
申请人： Kazuo Nakagawa , Michiko Takei , Yasumori Fukushima , Kazuhide Tomiyasu , Shin Matsumoto , Kenshi Tada , Yutaka Takafuji
发明人： Kazuo Nakagawa , Michiko Takei , Yasumori Fukushima , Kazuhide Tomiyasu , Shin Matsumoto , Kenshi Tada , Yutaka Takafuji
IPC分类号： H01L29/02 , H01L21/762
CPC分类号： H01L27/1266 , H01L21/76254 , H01L27/1214 , H01L29/66772 , H01L29/78603 , H01L29/78606
摘要： A method is disclosed for producing a semiconductor device produced by (i) doping hydrogen ions or rare gas ions into a device substrate in which a transfer layer (16) is formed, (ii) then bonding the device substrate to a carrier target substrate, and (iii) transferring the transfer layer (16) onto the carrier substrate (30) by cleaving the device substrate along a portion in which the hydrogen ions or the rare gas ions are doped, the method including providing a blocking layer (11) for blocking diffusion of a bubble-causing substance between (i) a bonding surface (13), which serves as a bonding interface between the device substrate and the carrier substrate, and (ii) the transfer layer (16). This prevents bubbles from forming at the bonding interface between the semiconductor substrate and the target substrate due to the diffusion of the bubble-causing substance.
摘要翻译：公开了一种用于制造半导体器件的方法，该半导体器件通过（i）将氢离子或稀有气体离子掺杂到其中形成转移层（16）的器件衬底中，（ii）然后将器件衬底接合到载体目标衬底，以及（iii）通过沿着掺杂有氢离子或稀有气体离子的部分裂开所述器件衬底，将所述转移层（16）转移到所述载体衬底（30）上，所述方法包括提供用于在（i）用作器件衬底和载体衬底之间的结合界面的接合表面（13）和（ii）转移层（16）之间阻塞气泡引起物质的扩散。这样可防止由于起泡物质的扩散而在半导体衬底与目标衬底之间的结合界面处形成气泡。

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