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1. 发明授权

US08242017B2 Method and structure for copper gap fill plating of interconnect structures for semiconductor integrated circuits 有权
标题翻译：用于半导体集成电路的互连结构的铜间隙填充电镀方法和结构
公开(公告)号：US08242017B2
公开(公告)日：2012-08-14
申请号：US12044254
申请日：2008-03-07
申请人： Yang Hui Xiang , Qing Tang Jiang
发明人： Yang Hui Xiang , Qing Tang Jiang
IPC分类号： H01L21/4763
CPC分类号： H01L21/76856 , H01L21/76873
摘要： A method for forming an integrated circuit device including an interconnect structure, e.g., copper dual damascene. The method includes providing a substrate and forming an interlayer dielectric layer overlying the substrate. The method also includes patterning the interlayer dielectric layer to form a contact structure and forming a barrier metal layer overlying the contact structure. The method includes forming a seed layer comprising copper bearing species overlying the barrier metal layer and applying an oxygen bearing species to treat the seed layer to cause an oxide layer of predetermined thickness to form on the seed layer. The method protects the seed layer from contamination using the oxide layer while the substrate is transferred from the step of applying the seed layer and contacts a copper bearing material in liquid form overlying the oxide layer to dissolve the oxide layer while forming a thickness of copper bearing material using a plating process to begin filling the contact structure.
摘要翻译：一种用于形成集成电路器件的方法，该集成电路器件包括互连结构，例如铜双镶嵌。该方法包括提供衬底并形成覆盖衬底的层间电介质层。该方法还包括图案化层间电介质层以形成接触结构并形成覆盖接触结构的阻挡金属层。该方法包括形成包含覆盖在阻挡金属层上的含铜物种的种子层，并施加含氧物种来处理种子层以在种子层上形成预定厚度的氧化物层。该方法使用氧化物层保护种子层免受污染，同时从施加种子层的步骤转移衬底，并以覆盖氧化物层的液态形式接触含铜材料以溶解氧化物层，同时形成铜轴承的厚度使用电镀工艺开始填充接触结构的材料。

2. 发明申请

US20090227103A1 METHOD AND STRUCTURE FOR COPPER GAP FILL PLATING OF INTERCONNECT STRUCTURES FOR SEMICONDUCTOR INTEGRATED CIRCUITS 有权
标题翻译：用于半导体集成电路的互连结构铜箔填充的方法和结构
公开(公告)号：US20090227103A1
公开(公告)日：2009-09-10
申请号：US12044254
申请日：2008-03-07
申请人： Yang Hui Xiang , Qing Tang Jiang
发明人： Yang Hui Xiang , Qing Tang Jiang
IPC分类号： H01L21/4763
CPC分类号： H01L21/76856 , H01L21/76873
摘要： A method for forming an integrated circuit device including an interconnect structure, e.g., copper dual damascene. The method includes providing a substrate and forming an interlayer dielectric layer overlying the substrate. The method also includes patterning the interlayer dielectric layer to form a contact structure and forming a barrier metal layer overlying the contact structure. The method includes forming a seed layer comprising copper bearing species overlying the barrier metal layer and applying an oxygen bearing species to treat the seed layer to cause an oxide layer of predetermined thickness to form on the seed layer. The method protects the seed layer from contamination using the oxide layer while the substrate is transferred from the step of applying the seed layer and contacts a copper bearing material in liquid form overlying the oxide layer to dissolve the oxide layer while forming a thickness of copper bearing material using a plating process to begin filling the contact structure.
摘要翻译：一种用于形成集成电路器件的方法，该集成电路器件包括互连结构，例如铜双镶嵌。该方法包括提供衬底并形成覆盖衬底的层间电介质层。该方法还包括图案化层间电介质层以形成接触结构并形成覆盖接触结构的阻挡金属层。该方法包括形成包含覆盖在阻挡金属层上的含铜物种的种子层，并施加含氧物种来处理种子层以在种子层上形成预定厚度的氧化物层。该方法使用氧化物层保护种子层免受污染，同时从施加种子层的步骤转移衬底，并以覆盖氧化物层的液态形式接触含铜材料以溶解氧化物层，同时形成铜轴承的厚度使用电镀工艺开始填充接触结构的材料。

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