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1. 发明申请

US20170271016A1 NONVOLATILE MEMORY DEVICE AND METHOD OF PROGRAMMING THE SAME 审中-公开
公开(公告)号：US20170271016A1
公开(公告)日：2017-09-21
申请号：US15611451
申请日：2017-06-01
申请人： YOON-HEE CHOI , SUNGYEON LEE , SANG-HYUN JOO
发明人： YOON-HEE CHOI , SUNGYEON LEE , SANG-HYUN JOO
IPC分类号： G11C16/10 , G11C16/04 , G11C16/34
CPC分类号： G11C16/10 , G11C7/04 , G11C11/5628 , G11C16/0483 , G11C16/08 , G11C16/30 , G11C16/3459 , G11C2211/5621
摘要： In a method of programming a three-dimensional nonvolatile memory device, a program loop is executed at least one time. The program loop includes a programming step for programming selected memory cells among memory cells and a verifying step for verifying whether the selected memory cells are program-passed or not. In programming the selected memory cells, a level of a voltage being applied to a common source line connected to the memory cells in common may be changed. Thus, in a program operation, power consumption which is needed to charge-discharge the common source line can be decreased while increasing boosting efficiency.

2. 发明申请

US20150221376A1 NONVOLATILE MEMORY DEVICE AND PROGRAMMING METHOD THEREOF 审中-公开
标题翻译：非易失性存储器件及其编程方法
公开(公告)号：US20150221376A1
公开(公告)日：2015-08-06
申请号：US14567639
申请日：2014-12-11
申请人： YOON-HEE CHOI , SANG-WAN NAM , KANG-BIN LEE
发明人： YOON-HEE CHOI , SANG-WAN NAM , KANG-BIN LEE
IPC分类号： G11C16/10 , G11C16/34 , G11C16/04
CPC分类号： G11C16/10 , G11C7/04 , G11C16/0483 , G11C16/3459 , H01L27/1157 , H01L27/11575 , H01L27/11582
摘要： A programming method is for programming a nonvolatile memory device including a plurality of strings disposed perpendicular to a substrate and connected between bitlines and a common source line. The programming method includes setting up the common source line to a predetermined voltage, floating the setup common source line, performing a program operation on memory cells connected to a selected wordline, and performing a verify operation on the memory cells.
摘要翻译：编程方法是用于编程非易失性存储器件，其包括垂直于衬底设置并连接在位线和公共源极线之间的多个串。编程方法包括将公共源线设置为预定电压，浮置设置公共源线，对连接到所选字线的存储器单元执行编程操作，以及对存储器单元执行验证操作。

3. 发明申请

US20160260489A1 NONVOLATILE MEMORY DEVICE, STORAGE DEVICE HAVING THE SAME, AND OPERATION METHOD THEREOF 有权
标题翻译：非易失存储器件，具有该存储器件的存储器件及其操作方法
公开(公告)号：US20160260489A1
公开(公告)日：2016-09-08
申请号：US15003113
申请日：2016-01-21
申请人： CHEON AN LEE , MU-HUI PARK , JIHO CHO , JI-YOUNG LEE , YOON-HEE CHOI
发明人： CHEON AN LEE , MU-HUI PARK , JIHO CHO , JI-YOUNG LEE , YOON-HEE CHOI
IPC分类号： G11C16/16 , G11C16/04 , G11C16/26
CPC分类号： G11C16/16 , G11C16/08 , G11C16/10 , G11C16/26 , G11C16/3427
摘要： A method of operating a nonvolatile memory device is provided as follows. The nonvolatile memory device includes memory blocks each of which has word lines. A setup voltage is applied to the word lines. A word line voltage is applied to a first word line selected from the word lines. Recovery voltages are applied to the word lines. Each recovery voltage is applied to at least one corresponding word line of the word lines. The recovery voltages have different voltage levels from each other.
摘要翻译：如下提供操作非易失性存储器件的方法。非易失性存储器件包括每个都具有字线的存储器块。设置电压被施加到字线。字线电压被施加到从字线选择的第一字线。恢复电压被施加到字线。每个恢复电压被施加到字线的至少一个对应的字线。恢复电压彼此具有不同的电压电平。

4. 发明申请

US20080196004A1 APPARATUS AND METHOD FOR DEVELOPING COMPONENT-BASED SOFTWARE 审中-公开
标题翻译：用于开发基于组件的软件的装置和方法
公开(公告)号：US20080196004A1
公开(公告)日：2008-08-14
申请号：US11848647
申请日：2007-08-31
申请人： YOON-HEE CHOI , Chong-mok Park , Kyung-sub Min , Seok-jin Hong
发明人： YOON-HEE CHOI , Chong-mok Park , Kyung-sub Min , Seok-jin Hong
IPC分类号： G06F9/44
CPC分类号： G06F8/36 , G06F8/20
摘要： An apparatus and method for developing component-based software, and more particularly, an apparatus and method for developing component-based software in order to define an identified component in a component language and reuse the identified component. The apparatus includes a component division module to analyze source code and a build file and to divide the analyzed source code and build file into a build-level component and a functional-level component; an integrity check module to check the integrity of languages defining the build-level component, the functional-level component, and an interface of the functional-level component; and a component combination module to combine one or more build-level components corresponding to one or more functional-level components that form an architecture.
摘要翻译：一种用于开发基于组件的软件的装置和方法，更具体地，涉及用于开发基于组件的软件以便以组件语言定义所识别的组件并重新使用所识别的组件的装置和方法。该装置包括分析源代码和构建文件并将分析的源代码和构建文件划分为构建级组件和功能级组件的组件分区模块; 完整性检查模块，用于检查定义构建级组件，功能级组件和功能级组件接口的语言的完整性; 以及组件组合模块，以组合对应于形成架构的一个或多个功能级组件的一个或多个构建级组件。

5. 发明申请

US20170117055A1 NON-VOLATILE MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME 有权
公开(公告)号：US20170117055A1
公开(公告)日：2017-04-27
申请号：US15251345
申请日：2016-08-30
申请人： TAE-HYUN KIM , BONG-SOON LIM , YOON-HEE CHOI , SANG-WON SHIM
发明人： TAE-HYUN KIM , BONG-SOON LIM , YOON-HEE CHOI , SANG-WON SHIM
IPC分类号： G11C16/34 , G11C16/26 , G11C16/10 , G11C16/08
CPC分类号： G11C16/3459 , G06F11/1068 , G11C16/08 , G11C16/10 , G11C16/26 , G11C29/52
摘要： A memory device has a memory cell array with memory cells. A page buffer group generates page buffer signals according to a verify read result of the memory cells. A page buffer decoding unit generates a decoder output signal corresponding to the number of fail bits from the page buffer signals based on a first reference current. A slow bit counter outputs a count result corresponding to the number of fail bits from the decoder output signal based on a second reference current corresponding to M times the first reference current, where M is a positive integer. A pass/fail checking unit determines a program outcome with respect to the memory cells based on the count result and outputs a pass signal or a fail signal based on the determined program outcome.

6. 发明申请

US20150221375A1 NONVOLATILE MEMORY DEVICE AND METHOD OF PROGRAMMING THE SAME 有权
标题翻译：非易失性存储器件及其编程方法
公开(公告)号：US20150221375A1
公开(公告)日：2015-08-06
申请号：US14527461
申请日：2014-10-29
申请人： YOON-HEE CHOI , SANG-WAN NAM , KANG-BIN LEE
发明人： YOON-HEE CHOI , SANG-WAN NAM , KANG-BIN LEE
IPC分类号： G11C16/10 , G11C16/34
CPC分类号： G11C16/10 , G11C7/04 , G11C11/5628 , G11C16/0483 , G11C16/16 , G11C16/30 , G11C16/3459
摘要： In a method of programming a three-dimensional nonvolatile memory device, a program loop is executed at least one time, wherein the program loop includes a programming step for programming selected memory cells among the memory cells and a verifying step for verifying whether the selected memory cells are program-passed or not. In the programming the selected memory cells, a level of a voltage being applied to a common source line connected to the strings in common may be changed. Thus, in a program operation, power consumption which is needed to charge-discharge the common source line can be decreased while increasing boosting efficiency.
摘要翻译：在编程三维非易失性存储器件的方法中，程序循环至少执行一次，其中程序循环包括编程步骤，用于对存储单元之间的选定存储单元进行编程，以及验证步骤，用于验证所选择的存储器单元格是否通过程序传递。在对所选存储单元的编程中，可以改变施加到共同连接到串的公共源极线的电压电平。因此，在程序运行中，能够提高提升效率的同时，能够减小对公共源极线进行充放电所需要的功耗。

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