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    • 1. 发明授权
    • Virtualization system for computers having multiple protection mechanisms
    • 具有多重保护机制的计算机的虚拟化系统
    • US07278030B1
    • 2007-10-02
    • US10378126
    • 2003-03-03
    • Xiaoxin ChenAlberto J. MunozJeffrey W. Sheldon
    • Xiaoxin ChenAlberto J. MunozJeffrey W. Sheldon
    • G06F11/30G06F12/14
    • G06F12/1466G06F9/45537
    • In a virtual computer system, the invention virtualizes a primary protection mechanism, which restricts memory accesses based on the type of access attempted and a current hardware privilege level, using a secondary protection mechanism, which is independent of the hardware privilege level. The invention may be used to virtualize the protection mechanisms of the Intel IA-64 architecture. In this embodiment, virtual access rights settings in a virtual TLB are translated into shadow access rights settings in a hardware TLB, while virtual protection key settings in a virtual PKR cache are translated into shadow protection key settings in a hardware PKR cache, based in part on the virtual access rights settings. The shadow protection key settings are dependent on the guest privilege level, but the shadow access rights settings are not.
    • 在虚拟计算机系统中,本发明使用独立于硬件特权级别的次级保护机制来虚拟化主保护机制,其基于尝试的访问类型和当前硬件特权级别来限制存储器访问。 本发明可以用于虚拟化Intel IA-64架构的保护机制。 在该实施例中,虚拟TLB中的虚拟访问权限设置被转换为硬件TLB中的影子访问权限设置,而虚拟PKR高速缓存中的虚拟保护密钥设置被部分地转换为硬件PKR高速缓存中的影子保护密钥设置 对虚拟访问权限设置。 影子保护键设置取决于访客权限级别,但影子访问权限设置不是。
    • 2. 发明授权
    • Virtualization system for computers having multiple protection mechanisms
    • 具有多重保护机制的计算机的虚拟化系统
    • US07908646B1
    • 2011-03-15
    • US11865670
    • 2007-10-01
    • Xiaoxin ChenAlberto J. MunozJeffrey W. Sheldon
    • Xiaoxin ChenAlberto J. MunozJeffrey W. Sheldon
    • G06F7/04
    • G06F12/1466G06F9/45537
    • In a virtual computer system, the invention virtualizes a primary protection mechanism, which restricts memory accesses based on the type of access attempted and a current hardware privilege level, using a secondary protection mechanism, which is independent of the hardware privilege level. The invention may be used to virtualize the protection mechanisms of the Intel IA-64 architecture. In this embodiment, virtual access rights settings in a virtual TLB are translated into shadow access rights settings in a hardware TLB, while virtual protection key settings in a virtual PKR cache are translated into shadow protection key settings in a hardware PKR cache, based in part on the virtual access rights settings. The shadow protection key settings are dependent on the guest privilege level, but the shadow access rights settings are not.
    • 在虚拟计算机系统中,本发明使用独立于硬件特权级别的次级保护机制来虚拟化主保护机制,其基于尝试的访问类型和当前硬件特权级别来限制存储器访问。 本发明可以用于虚拟化Intel IA-64架构的保护机制。 在该实施例中,虚拟TLB中的虚拟访问权限设置被转换为硬件TLB中的影子访问权限设置,而虚拟PKR高速缓存中的虚拟保护密钥设置被部分地转换为硬件PKR高速缓存中的影子保护密钥设置 对虚拟访问权限设置。 影子保护键设置取决于访客权限级别,但影子访问权限设置不是。
    • 4. 发明授权
    • Virtualization system for computers that use address space indentifiers
    • 使用地址空间标识符的计算机的虚拟化系统
    • US07409487B1
    • 2008-08-05
    • US10609877
    • 2003-06-30
    • Xiaoxin ChenAlberto J. MunozSahil Rihan
    • Xiaoxin ChenAlberto J. MunozSahil Rihan
    • G06F12/00G06F9/26G06F21/00
    • G06F12/1036G06F12/109G06F2009/45583
    • A virtual computer system including multiple virtual machines (VMs) is implemented in a physical computer system that uses address space identifiers (ASIDs). Each VM includes a virtual translation look-aside buffer (TLB), in which guest software, executing on the VM, may insert address translations, with each translation including an ASID. For each ASID used by guest software, a virtual machine monitor (VMM), or other software unit, assigns a unique shadow ASID for use in corresponding address translations in a hardware TLB. If a unique shadow ASID is not available for a newly used guest ASID, the VMM reassigns a shadow ASID from a prior guest ASID to the new guest ASID, purging any entries in the hardware TLB corresponding to the prior guest ASID. Assigning unique shadow ASIDs limits the need for TLB purges upon switching between the multiple VMs, reducing the number of TLB miss faults, and consequently improving overall processing efficiency.
    • 在使用地址空间标识符(ASID)的物理计算机系统中实现包括多个虚拟机(VM)的虚拟计算机系统。 每个虚拟机包括虚拟翻译后备缓冲器(TLB),其中在VM上执行的客户机软件可以插入地址转换,每个转换包括ASID。 对于访客软件使用的每个ASID,虚拟机监视器(VMM)或其他软件单元分配一个唯一的影子ASID,用于硬件TLB中相应的地址转换。 如果唯一的影子ASID不适用于新使用的客户机ASID,则VMM将从先前客户机ASID的影子ASID重新分配给新的客户机ASID,清除与先前客户机ASID相对应的硬件TLB中的任何条目。 分配唯一的影子ASID限制了在多个VM之间切换时对TLB清除的需求,减少了TLB未命中故障的数量,从而提高了整体处理效率。
    • 5. 发明授权
    • Methods for accessing multiple page tables in a computer system
    • 访问计算机系统中多个页表的方法
    • US07490216B1
    • 2009-02-10
    • US11521632
    • 2006-09-14
    • Xiaoxin ChenAlberto J. Munoz
    • Xiaoxin ChenAlberto J. Munoz
    • G06F12/08G06F12/10
    • G06F12/1036G06F12/109
    • A virtual memory system implementing the invention provides concurrent access to translations for virtual addresses from multiple address spaces. One embodiment of the invention is implemented in a virtual computer system, in which a virtual machine monitor supports a virtual machine. In this embodiment, the invention provides concurrent access to translations for virtual addresses from the respective address spaces of both the virtual machine monitor and the virtual machine. Multiple page tables contain the translations for the multiple address spaces. Information about an operating state of the computer system, as well as an address space identifier, are used to determine whether, and under what circumstances, an attempted memory access is permissible. If the attempted memory access is permissible, the address space identifier is also used to determine which of the multiple page tables contains the translation for the attempted memory access.
    • 实现本发明的虚拟存储器系统提供对来自多个地址空间的虚拟地址的翻译的并发访问。 本发明的一个实施例在虚拟计算机系统中实现,其中虚拟机监视器支持虚拟机。 在本实施例中,本发明提供了从虚拟机监视器和虚拟机的相应地址空间对虚拟地址的翻译的并发访问。 多页表包含多个地址空间的翻译。 关于计算机系统的操作状态的信息以及地址空间标识符被用于确定在什么情况下是否允许尝试的存储器访问。 如果尝试的内存访问是允许的,那么地址空间标识符也用于确定哪个多个页表包含尝试的内存访问的转换。
    • 6. 发明授权
    • TLB miss fault handler and method for accessing multiple page tables
    • TLB错误处理程序和访问多个页表的方法
    • US07111145B1
    • 2006-09-19
    • US10397030
    • 2003-03-25
    • Xiaoxin ChenAlberto J. Munoz
    • Xiaoxin ChenAlberto J. Munoz
    • G06F12/00G06F12/08G06F12/10
    • G06F12/1036G06F12/109
    • A virtual memory system implementing the invention provides concurrent access to translations for virtual addresses from multiple address spaces. One embodiment of the invention is implemented in a virtual computer system, in which a virtual machine monitor supports a virtual machine. In this embodiment, the invention provides concurrent access to translations for virtual addresses from the respective address spaces of both the virtual machine monitor and the virtual machine. Multiple page tables contain the translations for the multiple address spaces. Information about an operating state of the computer system, as well as an address space identifier, are used to determine whether, and under what circumstances, an attempted memory access is permissible. If the attempted memory access is permissible, the address space identifier is also used to determine which of the multiple page tables contains the translation for the attempted memory access.
    • 实现本发明的虚拟存储器系统提供对来自多个地址空间的虚拟地址的翻译的并发访问。 本发明的一个实施例在虚拟计算机系统中实现,其中虚拟机监视器支持虚拟机。 在本实施例中,本发明提供了从虚拟机监视器和虚拟机的相应地址空间对虚拟地址的翻译的并发访问。 多页表包含多个地址空间的翻译。 关于计算机系统的操作状态的信息以及地址空间标识符被用于确定在什么情况下是否允许尝试的存储器访问。 如果尝试的内存访问是允许的,那么地址空间标识符也用于确定哪个多个页表包含尝试的内存访问的转换。
    • 7. 发明授权
    • Accessing multiple page tables in a computer system
    • 在计算机系统中访问多个页表
    • US08225071B2
    • 2012-07-17
    • US13023356
    • 2011-02-08
    • Xiaoxin ChenAlberto J. Munoz
    • Xiaoxin ChenAlberto J. Munoz
    • G06F12/08G06F12/10
    • G06F12/1036G06F12/109
    • A virtual memory system implementing the invention provides concurrent access to translations for virtual addresses from multiple address spaces. One embodiment of the invention is implemented in a virtual computer system, in which a virtual machine monitor supports a virtual machine. In this embodiment, the invention provides concurrent access to translations for virtual addresses from the respective address spaces of both the virtual machine monitor and the virtual machine. Multiple page tables contain the translations for the multiple address spaces. Information about an operating state of the computer system, as well as an address space identifier, are used to determine whether, and under what circumstances, an attempted memory access is permissible. If the attempted memory access is permissible, the address space identifier is also used to determine which of the multiple page tables contains the translation for the attempted memory access.
    • 实现本发明的虚拟存储器系统提供对来自多个地址空间的虚拟地址的翻译的并发访问。 本发明的一个实施例在虚拟计算机系统中实现,其中虚拟机监视器支持虚拟机。 在本实施例中,本发明提供了从虚拟机监视器和虚拟机的相应地址空间对虚拟地址的翻译的并发访问。 多页表包含多个地址空间的翻译。 关于计算机系统的操作状态的信息以及地址空间标识符被用于确定在什么情况下是否允许尝试的存储器访问。 如果尝试的内存访问是允许的,那么地址空间标识符也用于确定哪个多个页表包含尝试的内存访问的转换。
    • 8. 发明授权
    • Methods for accessing multiple page tables in a computer system
    • 访问计算机系统中多个页表的方法
    • US07886127B2
    • 2011-02-08
    • US12345866
    • 2008-12-30
    • Xiaoxin ChenAlberto J. Munoz
    • Xiaoxin ChenAlberto J. Munoz
    • G06F12/08G06F12/10
    • G06F12/1036G06F12/109
    • A virtual memory system implementing the invention provides concurrent access to translations for virtual addresses from multiple address spaces. One embodiment of the invention is implemented in a virtual computer system, in which a virtual machine monitor supports a virtual machine. In this embodiment, the invention provides concurrent access to translations for virtual addresses from the respective address spaces of both the virtual machine monitor and the virtual machine. Multiple page tables contain the translations for the multiple address spaces. Information about an operating state of the computer system, as well as an address space identifier, are used to determine whether, and under what circumstances, an attempted memory access is permissible. If the attempted memory access is permissible, the address space identifier is also used to determine which of the multiple page tables contains the translation for the attempted memory access.
    • 实现本发明的虚拟存储器系统提供对来自多个地址空间的虚拟地址的翻译的并发访问。 本发明的一个实施例在虚拟计算机系统中实现,其中虚拟机监视器支持虚拟机。 在本实施例中,本发明提供了从虚拟机监视器和虚拟机的相应地址空间对虚拟地址的翻译的并发访问。 多页表包含多个地址空间的翻译。 关于计算机系统的操作状态的信息以及地址空间标识符被用于确定在什么情况下是否允许尝试的存储器访问。 如果尝试的内存访问是允许的,那么地址空间标识符也用于确定哪个多个页表包含尝试的内存访问的转换。
    • 10. 发明申请
    • METHODS FOR ACCESSING MULTIPLE PAGE TABLES IN A COMPUTER SYSTEM
    • 在计算机系统中访问多个页表的方法
    • US20090106524A1
    • 2009-04-23
    • US12345866
    • 2008-12-30
    • Xiaoxin ChenAlberto J. Munoz
    • Xiaoxin ChenAlberto J. Munoz
    • G06F12/06
    • G06F12/1036G06F12/109
    • A virtual memory system implementing the invention provides concurrent access to translations for virtual addresses from multiple address spaces. One embodiment of the invention is implemented in a virtual computer system, in which a virtual machine monitor supports a virtual machine. In this embodiment, the invention provides concurrent access to translations for virtual addresses from the respective address spaces of both the virtual machine monitor and the virtual machine. Multiple page tables contain the translations for the multiple address spaces. Information about an operating state of the computer system, as well as an address space identifier, are used to determine whether, and under what circumstances, an attempted memory access is permissible. If the attempted memory access is permissible, the address space identifier is also used to determine which of the multiple page tables contains the translation for the attempted memory access.
    • 实现本发明的虚拟存储器系统提供对来自多个地址空间的虚拟地址的翻译的并发访问。 本发明的一个实施例在虚拟计算机系统中实现,其中虚拟机监视器支持虚拟机。 在本实施例中,本发明提供了从虚拟机监视器和虚拟机的相应地址空间对虚拟地址的翻译的并发访问。 多页表包含多个地址空间的翻译。 关于计算机系统的操作状态的信息以及地址空间标识符被用于确定在什么情况下是否允许尝试的存储器访问。 如果尝试的内存访问是允许的,那么地址空间标识符也用于确定哪个多个页表包含尝试的内存访问的转换。