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    • 5. 发明授权
    • Multiprocessor graphics system
    • 多处理器图形系统
    • US5841444A
    • 1998-11-24
    • US823041
    • 1997-03-21
    • Byung-in MunKil-su Eo
    • Byung-in MunKil-su Eo
    • G06F3/153G06F15/16G06F15/167G06T1/20G06T15/00G09G5/393
    • G06F3/1438G06F3/1446G06T1/20
    • A multiprocessor graphics system having a pixel link architecture, includes: 1) a plurality of sub-graphics systems each of which assigned to each of a plurality of sub-screens provided by sectioning a display screen; and 2) a ring network for connecting the plurality of sub-graphics systems. Each of the sub-graphics systems includes a geometry engine, a raster engine, a local frame buffer and a pixel distributor. An interconnection network bottleneck between the raster engine and frame buffer is removed and a conventional memory system can be used by reducing the number of data transmissions between the raster engine and frame buffer while maintaining image parallelism and object parallelism.
    • 具有像素链路结构的多处理器图形系统包括:1)多个子图形系统,每个子图形系统分配给通过划分显示屏幕而提供的多个子屏幕中的每一个; 和2)用于连接所述多个子图形系统的环形网络。 每个子图形系统包括几何引擎,光栅引擎,本地帧缓冲器和像素分配器。 除去栅格引擎和帧缓冲器之间的互连网络瓶颈,并且通过减少光栅引擎和帧缓冲器之间的数据传输的数量,同时保持图像并行性和对象并行性,可以使用常规的存储器系统。
    • 6. 发明授权
    • Element generator for dither matrix and a dithering apparatus using the
same
    • 用于抖动矩阵的元件发生器和使用其的抖动装置
    • US5495346A
    • 1996-02-27
    • US271631
    • 1994-07-07
    • Byung-kyun ChoiKil-su EoDae-hyun Jin
    • Byung-kyun ChoiKil-su EoDae-hyun Jin
    • H04N1/409G06F7/32G06T5/00H04N1/405H04N1/41H03M1/12G09G3/20H03K19/00H04N1/40
    • H04N1/405
    • An element generator for a dither matrix comprises a logic device which receives a row address and a column address and performs a logic operation thereon so as to produce a dither element corresponding to the row address and the column address, which is implemented at low cost and has an advantage in that the processing speed is increased. The dithering apparatus comprises a dither-matrix element generator, a comparator, an adder and a selector. The comparator compares the output of the dither-matrix element generator with lower-bit data of the original image data. The adder adds a predetermined number to upper-bit data of the original image data. The selector selects one between the upper-bit data and the adder output, in accordance with the output of the comparator, so as to produce the selected one as the dithered image data. Dithering is thereby performed via hardware, which leads to an increased processing speed.
    • 用于抖动矩阵的元件发生器包括接收行地址和列地址并在其上执行逻辑运算的逻辑器件,以便产生对应于以低成本实现的行地址和列地址的抖动元件,并且 具有加工速度快的优点。 抖动装置包括抖动矩阵元件发生器,比较器,加法器和选择器。 比较器将抖动矩阵元素发生器的输出与原始图像数据的低位数据进行比较。 加法器将预定数量加到原始图像数据的高位数据上。 选择器根据比较器的输出,选择高位数据和加法器输出之间的一个,以产生所选择的抖动图像数据。 从而通过硬件执行抖动,从而提高处理速度。