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1. 发明授权

US07859882B2 Resistive memory device and method of writing data 有权
标题翻译：电阻式存储器件及数据写入方法
公开(公告)号：US07859882B2
公开(公告)日：2010-12-28
申请号：US11844511
申请日：2007-08-24
申请人： Woo-yeong Cho , Du-eung Kim , Sang-beom Kang
发明人： Woo-yeong Cho , Du-eung Kim , Sang-beom Kang
IPC分类号： G11C11/00
CPC分类号： G11C8/14 , G11C13/00 , G11C13/0023 , G11C13/0028 , G11C13/0069 , G11C2213/79
摘要： A resistive memory device is provided. The resistive memory device includes word lines arranged in M rows, bit lines arranged in N columns, local source lines arranged in M/2 rows, and resistive memory cells arranged in M rows and N columns. Each of the resistive memory cells includes a resistance variable element having a first electrode connected to a corresponding bit line, and a cell transistor having a first terminal connected to a second electrode of the resistance variable element, a second terminal connected to a corresponding local source line, and a control terminal connected to a corresponding word line. The local source line is commonly connected to the second terminals of the cell transistors of the two neighboring rows.
摘要翻译：提供了一种电阻式存储器件。电阻式存储装置包括排列成M行的字线，以N列排列的位线，以M / 2行排列的局部源极线以及布置成M行N列的电阻存储单元。每个电阻存储单元包括电阻可变元件，电阻可变元件具有连接到对应的位线的第一电极，以及单元晶体管，其具有连接到电阻可变元件的第二电极的第一端子，连接到相应的本地源极的第二端子线路和连接到相应字线的控制终端。本地源极线通常连接到两个相邻行的单元晶体管的第二端子。

2. 发明授权

US07457151B2 Phase change random access memory (PRAM) device having variable drive voltages 有权
标题翻译：具有可变驱动电压的相变随机存取存储器（PRAM）装置
公开(公告)号：US07457151B2
公开(公告)日：2008-11-25
申请号：US11319601
申请日：2005-12-29
申请人： Woo-yeong Cho , Du-eung Kim , Sang-beom Kang , Choong-keun Kwak
发明人： Woo-yeong Cho , Du-eung Kim , Sang-beom Kang , Choong-keun Kwak
IPC分类号： G11C11/00
CPC分类号： G11C13/0038 , G11C5/145 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/009
摘要： A phase change memory device of one aspect includes a memory array including a plurality of phase change memory cells, a write boosting circuit, and a write driver. The write boosting circuit boosts a first voltage and outputs a first control voltage in response to a control signal in a first operation mode, and boosts the first voltage and outputs a second control voltage in response to the control signal in a second operation mode and a third operation mode. The write driver is driven by the first control voltage in the first operation mode and writes data to a selected memory cell of the memory array.
摘要翻译：一个方面的相变存储器件包括包括多个相变存储单元，写升压电路和写驱动器的存储器阵列。写升压电路响应于第一操作模式中的控制信号而升高第一电压并输出第一控制电压，并且在第二操作模式中响应于控制信号升高第一电压并输出第二控制电压，并且第三操作模式。写入驱动器由第一操作模式中的第一控制电压驱动，并将数据写入存储器阵列的所选存储单元。

3. 发明申请

US20070014150A1 Phase change random access memory (PRAM) device having variable drive voltages 有权
标题翻译：具有可变驱动电压的相变随机存取存储器（PRAM）装置
公开(公告)号：US20070014150A1
公开(公告)日：2007-01-18
申请号：US11319601
申请日：2005-12-29
申请人： Woo-yeong Cho , Du-eung Kim , Sang-beom Kang , Choong-keun Kwak
发明人： Woo-yeong Cho , Du-eung Kim , Sang-beom Kang , Choong-keun Kwak
IPC分类号： G11C11/00 , G11C8/00
CPC分类号： G11C13/0038 , G11C5/145 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/009
摘要： A phase change memory device of one aspect includes a memory array including a plurality of phase change memory cells, a write boosting circuit, and a write driver. The write boosting circuit boosts a first voltage and outputs a first control voltage in response to a control signal in a first operation mode, and boosts the first voltage and outputs a second control voltage in response to the control signal in a second operation mode and a third operation mode. The write driver is driven by the first control voltage in the first operation mode and writes data to a selected memory cell of the memory array.
摘要翻译：一个方面的相变存储器件包括包括多个相变存储单元，写升压电路和写驱动器的存储器阵列。写升压电路升压第一电压并响应于第一操作模式中的控制信号输出第一控制电压，并且在第二操作模式中响应于控制信号升高第一电压并输出第二控制电压，并且第三操作模式。写入驱动器由第一操作模式中的第一控制电压驱动，并将数据写入存储器阵列的所选存储单元。

4. 发明授权

US07843716B2 Nonvolatile memory device having memory and reference cells 有权
标题翻译：具有存储器和参考单元的非易失性存储器件
公开(公告)号：US07843716B2
公开(公告)日：2010-11-30
申请号：US12031085
申请日：2008-02-14
申请人： Sang-beom Kang , Woo-yeong Cho , Hyung-rok Oh , Joon-min Park
发明人： Sang-beom Kang , Woo-yeong Cho , Hyung-rok Oh , Joon-min Park
IPC分类号： G11C5/02
CPC分类号： G11C7/067 , G11C5/025 , G11C5/04 , G11C7/062 , G11C8/10 , G11C8/14 , G11C11/16 , G11C13/00 , G11C13/0004 , G11C13/0028 , G11C13/004 , G11C2013/0054 , G11C2207/063 , G11C2213/71 , G11C2213/72
摘要： A nonvolatile memory device includes a stack-type memory cell array, a selection circuit and a read circuit. The memory cell array includes multiple memory cell layers and a reference cell layer, which are vertically laminated. Each of the memory cell layers includes multiple nonvolatile memory cells for storing data, and the reference cell layer includes multiple reference cells for storing reference data. The selection circuit selects a nonvolatile memory cell from the memory cell layers and at least one reference cell, corresponding to the selected nonvolatile memory cell, from the reference cell layer. The read circuit supplies a read bias to the selected nonvolatile memory cell and the selected reference cell corresponding to the selected nonvolatile memory cell, and reads data from the selected nonvolatile memory cell.
摘要翻译：非易失性存储器件包括堆叠型存储单元阵列，选择电路和读取电路。存储单元阵列包括垂直层叠的多个存储单元层和参考单元层。每个存储单元层包括用于存储数据的多个非易失性存储单元，参考单元层包括用于存储参考数据的多个参考单元。选择电路从参考单元层从存储单元层和对应于所选择的非易失性存储单元的至少一个参考单元选择非易失性存储单元。读取电路向所选择的非易失性存储单元和与所选择的非易失性存储单元相对应的所选择的参考单元提供读偏置，并从所选择的非易失性存储单元读取数据。

5. 发明授权

US08136017B2 Multi-layer semiconductor memory device comprising error checking and correction (ECC) engine and related ECC method 有权
标题翻译：多层半导体存储器件包括纠错（ECC）引擎和相关的ECC方法
公开(公告)号：US08136017B2
公开(公告)日：2012-03-13
申请号：US12036414
申请日：2008-02-25
申请人： Hyung-rok Oh , Sang-beom Kang , Woo-yeong Cho , Joon-min Park
发明人： Hyung-rok Oh , Sang-beom Kang , Woo-yeong Cho , Joon-min Park
IPC分类号： G11C29/00
CPC分类号： G06F11/1008 , G11C5/02
摘要： Embodiments of the invention provide a multi-layer semiconductor memory device and a related error checking and correction (ECC) method. The multi-layer semiconductor memory device includes first and second memory cell array layers, wherein the first memory cell array layer stores first payload data. The multi-layer semiconductor memory device also includes an ECC engine selectively connected to the second memory cell array layer and configured to receive the first payload data, generate first parity data corresponding to the first payload data, and store the first parity data exclusively in the second memory cell array layer.
摘要翻译：本发明的实施例提供一种多层半导体存储器件和相关的错误校正和校正（ECC）方法。多层半导体存储器件包括第一和第二存储单元阵列层，其中第一存储单元阵列层存储第一有效载荷数据。多层半导体存储器件还包括选择性地连接到第二存储单元阵列层并被配置为接收第一有效载荷数据的ECC引擎，生成与第一有效载荷数据相对应的第一奇偶校验数据，并将第一奇偶校验数据专门存储在第二存储单元阵列层。

6. 发明申请

US20080144356A1 NONVOLATILE MEMORY DEVICES HAVING MULTI-FILAMENT VARIABLE RESISTIVITY MEMORY CELLS THEREIN 失效
标题翻译：具有多层可变电阻率存储器电池的非易失性存储器件
公开(公告)号：US20080144356A1
公开(公告)日：2008-06-19
申请号：US11945420
申请日：2007-11-27
申请人： Hyung-rok Oh , Sang-beom Kang , Woo-yeong Cho
发明人： Hyung-rok Oh , Sang-beom Kang , Woo-yeong Cho
IPC分类号： G11C11/00
CPC分类号： G11C8/10 , G11C13/0007 , G11C13/0069 , G11C2013/0083 , G11C2013/0088 , G11C2013/009 , G11C2013/0092 , G11C2213/31 , G11C2213/32 , G11C2213/79
摘要： There is provided a resistive memory device, the device including: a plurality of word lines and a plurality of bit lines arranged such that the word lines intersect the bit lines; a plurality of resistive memory cells each having a variable resistive material coupled between the corresponding word line and the corresponding bit line and an access element; selecting circuits selecting one of the plurality of resistive memory cells; and a filament-forming circuit supplying a filament-forming voltage to the selected resistive memory cell through the bit line coupled to the selected resistive memory cell while increasing the filament-forming voltage from a predetermined voltage level until filaments having a predetermined thickness are formed in the variable resistive material of the selected resistive memory cell.
摘要翻译：提供了一种电阻式存储器件，该器件包括：多个字线和多个位线，其布置成使得字线与位线相交; 每个具有耦合在对应的字线和对应的位线之间的可变电阻材料的电阻性存储单元和一个存取元件; 选择所述多个电阻性存储单元之一的选择电路; 以及丝线形成电路，其通过耦合到所选择的电阻性存储单元的位线向所选择的电阻性存储单元提供丝状形成电压，同时从预定电压电平增加灯丝形成电压，直到形成具有预定厚度的灯丝所选择的电阻性存储单元的可变电阻材料。

7. 发明授权

US07190607B2 Phase-change memory element driver circuits using measurement to control current and methods of controlling drive current of phase-change memory elements using measurement 失效
标题翻译：使用测量来控制电流的相变存储元件驱动电路和使用测量来控制相变存储元件的驱动电流的方法
公开(公告)号：US07190607B2
公开(公告)日：2007-03-13
申请号：US11092456
申请日：2005-03-29
申请人： Woo-yeong Cho , Sang-beom Kang
发明人： Woo-yeong Cho , Sang-beom Kang
IPC分类号： G11C11/00
CPC分类号： G11C13/0004 , G11C13/0064 , G11C13/0069 , G11C2013/0078 , G11C2213/79
摘要： Programming phase-change memory devices and driver circuits for programming phase-change memory devices are provided that control an amount of current supplied to a phase-change material of the phase-change memory device based on a measure of resistance of the phase-change material during programming of the phase-change memory device. Such control may be based on detected voltage or current. The amount of current supplied to the phase-change material may be increased until the measured voltage level changes with respect to a reference voltage value and the current maintained constant if the measured voltage level has changed with respect to the reference voltage value. The change of the measured voltage level with respect to the reference voltage may be the measured voltage level falling below the reference voltage value.
摘要翻译：提供用于编程相变存储器件的编程相变存储器件和驱动器电路，其基于相变材料的电阻的测量来控制提供给相变存储器件的相变材料的电流量在相变存储器件的编程期间。这种控制可以基于检测到的电压或电流。提供给相变材料的电流量可以增加，直到测量的电压电平相对于参考电压值改变，并且如果测量的电压电平相对于参考电压值发生变化，则电流保持恒定。相对于参考电压的测量电压电平的变化可以是测量的电压电平低于参考电压值。

8. 发明授权

US07924639B2 Nonvolatile memory device using resistance material 有权
标题翻译：使用电阻材料的非易失性存储器件
公开(公告)号：US07924639B2
公开(公告)日：2011-04-12
申请号：US12031115
申请日：2008-02-14
申请人： Joon-min Park , Sang-beom Kang , Woo-yeong Cho , Hyung-rok Oh
发明人： Joon-min Park , Sang-beom Kang , Woo-yeong Cho , Hyung-rok Oh
IPC分类号： G11C7/00 , G11C29/00
CPC分类号： G11C13/0007 , G11C5/025 , G11C29/787 , G11C29/808 , G11C29/846 , G11C2213/31 , G11C2213/71 , G11C2213/72
摘要： The present invention provides a nonvolatile memory device that uses a resistance material. The nonvolatile memory device includes: a stacked memory cell array having a plurality of memory cell layers stacked in a vertical direction, the stacked memory cell array having at least one memory cell group and at least one redundancy memory cell group; and a repair control circuit coupled to the stacked memory cell array, the repair control circuit configured to repair a defective one of the at least one memory cell group with a selected one of the at least one redundancy memory cell group. The features that enable repair improve the fabrication yield of the nonvolatile memory device.
摘要翻译：本发明提供一种使用电阻材料的非易失性存储器件。非易失性存储器件包括：堆叠存储单元阵列，具有沿垂直方向堆叠的多个存储单元层，所述堆叠存储单元阵列具有至少一个存储单元组和至少一个冗余存储单元组; 以及修复控制电路，其耦合到所述堆叠的存储单元阵列，所述修复控制电路被配置为用所述至少一个冗余存储器单元组中的所选择的一个来修复所述至少一个存储单元组中的有缺陷的一个。能够修复的特征提高了非易失性存储器件的制造成品率。

9. 发明申请

US20050281073A1 Phase-change memory element driver circuits using measurement to control current and methods of controlling drive current of phase-change memory elements using measurement 失效
标题翻译：使用测量来控制电流的相变存储元件驱动电路和使用测量来控制相变存储元件的驱动电流的方法
公开(公告)号：US20050281073A1
公开(公告)日：2005-12-22
申请号：US11092456
申请日：2005-03-29
申请人： Woo-yeong Cho , Sang-beom Kang
发明人： Woo-yeong Cho , Sang-beom Kang
IPC分类号： G11C13/02 , G11C11/00 , G11C16/02
CPC分类号： G11C13/0004 , G11C13/0064 , G11C13/0069 , G11C2013/0078 , G11C2213/79
摘要： Programming phase-change memory devices and driver circuits for programming phase-change memory devices are provided that control an amount of current supplied to a phase-change material of the phase-change memory device based on a measure of resistance of the phase-change material during programming of the phase-change memory device. Such control may be based on detected voltage or current. The amount of current supplied to the phase-change material may be increased until the measured voltage level changes with respect to a reference voltage value and the current maintained constant if the measured voltage level has changed with respect to the reference voltage value. The change of the measured voltage level with respect to the reference voltage may be the measured voltage level falling below the reference voltage value.
摘要翻译：提供用于编程相变存储器件的编程相变存储器件和驱动器电路，其基于相变材料的电阻的测量来控制提供给相变存储器件的相变材料的电流量在相变存储器件的编程期间。这种控制可以基于检测到的电压或电流。提供给相变材料的电流量可以增加，直到测量的电压电平相对于参考电压值改变，并且如果测量的电压电平相对于参考电压值发生变化，则电流保持恒定。相对于参考电压的测量电压电平的变化可以是测量的电压电平低于参考电压值。

10. 发明申请

US20110170332A1 Methods of Driving Nonvolatile Memory Devices that Utilize Read/Write Merge Circuits 审中-公开
标题翻译：驱动使用读/写合并电路的非易失性存储器件的方法
公开(公告)号：US20110170332A1
公开(公告)日：2011-07-14
申请号：US13011188
申请日：2011-01-21
申请人： Hyung-rok Oh , Sang-beom Kang , Woo-yeong Cho , Joon-min Park
发明人： Hyung-rok Oh , Sang-beom Kang , Woo-yeong Cho , Joon-min Park
IPC分类号： G11C11/00 , G11C7/00
CPC分类号： G11C7/12 , G11C5/145 , G11C8/18 , G11C13/0004 , G11C13/0007 , G11C13/0026 , G11C13/003 , G11C2213/31 , G11C2213/72 , G11C2213/74 , G11C2213/76 , G11C2213/79
摘要： An integrated circuit memory device includes an array of nonvolatile memory cells (e.g., variable resistance cells) having a first plurality of lines electrically coupled to memory cells therein. A read/write control circuit is provided. The read/write control circuit includes a read/write merge circuit and a column selection circuit. The read/write control circuit, which is configured to drive a selected one of the first plurality of lines with unequal write and read voltages during respective write and read operations, includes a compensating unit. This compensating unit is configured to provide a read compensation current to the selected one of the first plurality of lines circuit during the read operation.
摘要翻译：集成电路存储器件包括具有电耦合到其中的存储器单元的第一多个线的非易失性存储器单元阵列（例如，可变电阻单元）。提供读/写控制电路。读/写控制电路包括读/写合并电路和列选择电路。被配置为在相应的写入和读取操作期间以不相等的写入和读取电压驱动所述第一多个线路中的所选择的一个线路的所述读取/写入控制电路包括补偿单元。该补偿单元被配置为在读取操作期间向第一多个线路电路中的所选择的一个电路提供读取补偿电流。

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