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1. 发明申请

US20100318946A1 VARIOUS METHODS AND APPARATUSES FOR ESTIMATING CHARACTERISTICS OF AN ELECTRONIC SYSTEMS DESIGN 有权
标题翻译：用于估计电子系统设计特性的各种方法和装置
公开(公告)号：US20100318946A1
公开(公告)日：2010-12-16
申请号：US12729509
申请日：2010-03-23
申请人： Stephen Hamilton , Ian Andrew Swarbrick , Scott Carlton Evans , Wolf-Dietrich Weber , Jay S. Tomlinson
发明人： Stephen Hamilton , Ian Andrew Swarbrick , Scott Carlton Evans , Wolf-Dietrich Weber , Jay S. Tomlinson
IPC分类号： G06F17/50
CPC分类号： G06F17/5045 , G06F17/50 , G06F2217/78 , G06F2217/84
摘要： Methods and apparatuses are described for an Intellectual Property (IP) Generator for estimating timing, area, and power characteristics of an electronic system design. The IP Generator receives a user-supplied file having data describing a configuration of an IP design having multiple levels of hierarchy. The IP Generator also receives user-supplied technology parameters and data-flow information. The IP generator correlates estimated timing, area, and power characteristics for each IP sub component based on the user supplied technology parameters, data-flow information and configuration parameters. The IP generator reports the timing, area, and power estimates to a user via a graphic user interface prior to a transformation of a Register Transfer Level (RTL) design into the gate-level circuit design.
摘要翻译：描述了用于估计电子系统设计的时间，面积和功率特性的知识产权（IP）发生器的方法和装置。 IP生成器接收用户提供的文件，该文件具有描述具有多层次结构的IP设计的配置的数据。 IP生成器还接收用户提供的技术参数和数据流信息。 IP生成器根据用户提供的技术参数，数据流信息和配置参数，关联每个IP子组件的估计时序，面积和功率特性。在将寄存器传输级别（RTL）设计转换为门级电路设计之前，IP生成器通过图形用户界面向用户报告定时，面积和功率估计。

2. 发明授权

US08024697B2 Various methods and apparatuses for estimating characteristics of an electronic systems design 有权
标题翻译：用于估计电子系统设计特性的各种方法和装置
公开(公告)号：US08024697B2
公开(公告)日：2011-09-20
申请号：US12729509
申请日：2010-03-23
申请人： Stephen Hamilton , Ian Andrew Swarbrick , Scott Carlton Evans , Wolf-Dietrich Weber , Jay S. Tomlinson
发明人： Stephen Hamilton , Ian Andrew Swarbrick , Scott Carlton Evans , Wolf-Dietrich Weber , Jay S. Tomlinson
IPC分类号： G06F17/50 , G06F9/455 , G06F11/22
CPC分类号： G06F17/5045 , G06F17/50 , G06F2217/78 , G06F2217/84
摘要： Methods and apparatuses are described for an Intellectual Property (IP) Generator for estimating timing, area, and power characteristics of an electronic system design. The IP Generator receives a user-supplied file having data describing a configuration of an IP design having multiple levels of hierarchy. The IP Generator also receives user-supplied technology parameters and data-flow information. The IP generator correlates estimated timing, area, and power characteristics for each IP sub component based on the user supplied technology parameters, data-flow information and configuration parameters. The IP generator reports the timing, area, and power estimates to a user via a graphic user interface prior to a transformation of a Register Transfer Level (RTL) design into the gate-level circuit design.
摘要翻译：描述了用于估计电子系统设计的时间，面积和功率特性的知识产权（IP）发生器的方法和装置。 IP生成器接收用户提供的文件，该文件具有描述具有多层次结构的IP设计的配置的数据。 IP生成器还接收用户提供的技术参数和数据流信息。 IP生成器根据用户提供的技术参数，数据流信息和配置参数，关联每个IP子组件的估计时序，面积和功率特性。在将寄存器传输级别（RTL）设计转换为门级电路设计之前，IP生成器通过图形用户界面向用户报告定时，面积和功率估计。

3. 发明授权

US07149829B2 Various methods and apparatuses for arbitration among blocks of functionality 有权
标题翻译：用于在功能块之间进行仲裁的各种方法和装置
公开(公告)号：US07149829B2
公开(公告)日：2006-12-12
申请号：US10418370
申请日：2003-04-18
申请人： Wolf-Dietrich Weber , Ian Andrew Swarbrick , Jay S. Tomlinson
发明人： Wolf-Dietrich Weber , Ian Andrew Swarbrick , Jay S. Tomlinson
IPC分类号： G06F12/00
CPC分类号： G06F13/364 , G06F9/526 , G06F2209/522
摘要： Various methods and apparatuses are described in which an arbitration controller cooperates with arbitration logic. The arbitration controller has a plurality of inputs that receive one or more transactions from a plurality of blocks of functionality. The arbitration controller arbitrates requests for access to a shared resource amongst the plurality of blocks of functionality by implementing an arbitration policy. The arbitration policy groups the transactions from the plurality of blocks of functionality into global groups of transactions for servicing by that shared resource. All of the transactions in a first global group are serviced by that shared resource prior to servicing transactions in a next global group of transactions. The arbitration logic facilitates the arbitration policy. The arbitration logic includes cascaded arbitration units that hierarchically arbitrate for the shared resource. The topology of the functional blocks supplying the transactions to the inputs into the arbitration controller is capable of varying independently of the arbitration policy achieved by the collection of arbitration units.
摘要翻译：描述了各种方法和装置，其中仲裁控制器与仲裁逻辑协作。仲裁控制器具有从多个功能块接收一个或多个事务的多个输入。仲裁控制器通过实施仲裁政策来仲裁多个功能块之间对共享资源的访问请求。仲裁策略将来自多个功能块的交易分组为全局交易组，以供该共享资源进行服务。第一个全球组中的所有交易在该下一个全球交易组中为交易提供服务之前由该共享资源提供服务。仲裁逻辑有助于仲裁政策。仲裁逻辑包括级联仲裁用于共享资源的级联仲裁单元。将交易提供给仲裁控制器的输入的功能块的拓扑能够独立于通过收集仲裁单元实现的仲裁策略而变化。

4. 发明授权

US07694249B2 Various methods and apparatuses for estimating characteristics of an electronic system's design 有权
标题翻译：用于估计电子系统设计特征的各种方法和装置
公开(公告)号：US07694249B2
公开(公告)日：2010-04-06
申请号：US11398036
申请日：2006-04-04
申请人： Stephen Hamilton , Ian Andrew Swarbrick , Scott Carlton Evans , Wolf-Dietrich Weber , Jay S. Tomlinson
发明人： Stephen Hamilton , Ian Andrew Swarbrick , Scott Carlton Evans , Wolf-Dietrich Weber , Jay S. Tomlinson
IPC分类号： G06F17/50 , G06F9/45
CPC分类号： G06F17/5045 , G06F17/50 , G06F2217/78 , G06F2217/84
摘要： Methods and apparatuses are described for an Intellectual Property (IP) Generator for estimating timing, area, and power characteristics of an electronic system design. The IP Generator receives a user-supplied file having data describing a configuration of an IP design having multiple levels of hierarchy. The IP Generator also receives user-supplied technology parameters and data-flow information. The IP generator correlates estimated timing, area, and power characteristics for each IP sub component based on the user supplied technology parameters, data-flow information and configuration parameters. The IP generator reports the timing, area, and power estimates to a user via a graphic user interface prior to a transformation of a Register Transfer Level (RTL) design into the gate-level circuit design.
摘要翻译：描述了用于估计电子系统设计的时间，面积和功率特性的知识产权（IP）发生器的方法和装置。 IP生成器接收用户提供的文件，该文件具有描述具有多层次结构的IP设计的配置的数据。 IP生成器还接收用户提供的技术参数和数据流信息。 IP生成器根据用户提供的技术参数，数据流信息和配置参数，关联每个IP子组件的估计时序，面积和功率特性。在将寄存器传输级别（RTL）设计转换为门级电路设计之前，IP生成器通过图形用户界面向用户报告定时，面积和功率估计。

5. 发明授权

US07165094B2 Communications system and method with non-blocking shared interface 有权
标题翻译：具有非阻塞共享接口的通信系统和方法
公开(公告)号：US07165094B2
公开(公告)日：2007-01-16
申请号：US09802405
申请日：2001-03-09
申请人： Wolf-Dietrich Weber , Richard Aras , Lisa A. Robinson , Geert P. Rosseel , Jay S. Tomlinson , Drew E. Wingard
发明人： Wolf-Dietrich Weber , Richard Aras , Lisa A. Robinson , Geert P. Rosseel , Jay S. Tomlinson , Drew E. Wingard
IPC分类号： G06F15/16
CPC分类号： G06F13/14 , G06F9/54
摘要： A communication system. One embodiment includes at least two functional blocks, wherein an first functional block communicates with a second functional block by establishing a connection. A connection is a logical state in which data may pass between the first functional block and the second functional block. One embodiment includes a bus coupled to each of the functional blocks and configured to carry a plurality of signals. The plurality of signals includes a thread identifier that indicates a transaction stream that the data transfer is part of and a busy signal identified by the thread identifier. The busy signal is issued by the target functional block when resources will be unavailable to perform a transfer.
摘要翻译：通讯系统一个实施例包括至少两个功能块，其中第一功能块通过建立连接与第二功能块通信。连接是数据可以在第一功能块和第二功能块之间通过的逻辑状态。一个实施例包括耦合到每个功能块并被配置为承载多个信号的总线。多个信号包括指示数据传输是其中一部分的事务流的线程标识符和由线程标识符标识的忙信号。当资源不可用时执行传输，目标功能块发出忙信号。

6. 发明授权

US06785753B2 Method and apparatus for response modes in pipelined environment 有权
标题翻译：流水线环境中的响应模式的方法和装置
公开(公告)号：US06785753B2
公开(公告)日：2004-08-31
申请号：US09872126
申请日：2001-06-01
申请人： Wolf-Dietrich Weber , Jay S. Tomlinson , Drew E. Wingard
发明人： Wolf-Dietrich Weber , Jay S. Tomlinson , Drew E. Wingard
IPC分类号： G06F1342
CPC分类号： G06F13/4226
摘要： A pipelined network is disclosed which provides for at least one mode to control the state of a response flag and when the target device is unable to respond to an initiator device request.
摘要翻译：公开了一种流水线网络，其提供至少一种模式来控制响应标志的状态，并且当目标设备不能响应发起者设备请求时。

7. 发明授权

US08949646B1 Data center load monitoring for utilizing an access power amount based on a projected peak power usage and a monitored power usage 有权
标题翻译：数据中心负载监测，用于根据预计的峰值功率利用率和受监视的功率利用率来利用接入功率量
公开(公告)号：US08949646B1
公开(公告)日：2015-02-03
申请号：US12134970
申请日：2008-06-06
申请人： Wolf-Dietrich Weber , Xiaobo Fan , Luiz Andre Barroso
发明人： Wolf-Dietrich Weber , Xiaobo Fan , Luiz Andre Barroso
IPC分类号： G06F1/32 , G06F1/26
CPC分类号： G06F17/5009 , G06F1/00 , G06F1/3206 , G06F9/5094 , Y02D10/22
摘要： A method of monitoring power load of a data center includes monitoring a power usage of a cluster of the data center, monitoring a power usage of a power distribution unit (PDU) of the data center, and monitoring a power usage of at least one of a rack of the data center or a computer within a rack of the data center.
摘要翻译：一种监视数据中心的电力负荷的方法，包括监视数据中心的集群的电力使用情况，监视数据中心的电力分配单元（PDU）的电力使用情况，以及监视数据中心中的至少一个数据中心的机架或数据中心机架内的计算机。

8. 发明授权

US08645722B1 Computer and data center load determination 有权
标题翻译：计算机和数据中心负载确定
公开(公告)号：US08645722B1
公开(公告)日：2014-02-04
申请号：US13101077
申请日：2011-05-04
申请人： Wolf-Dietrich Weber , Xiaobo Fan , Luiz Andre Barroso
发明人： Wolf-Dietrich Weber , Xiaobo Fan , Luiz Andre Barroso
IPC分类号： G06F1/00
CPC分类号： G06F17/5009 , G06F1/00 , G06F1/3206 , G06F9/5094 , Y02D10/22
摘要： A method for use in deploying computers into a data center includes calculating in a computer an expected peak power draw for a plurality of computers. The expected peak power draw for the plurality of computers is less than a sum of individual expected peak power draws for each computer from the plurality of computers.
摘要翻译：用于将计算机部署到数据中心中的方法包括在计算机中计算多个计算机的预期峰值功率消耗。多个计算机的预期峰值功率消耗小于来自多个计算机的每台计算机的单个预期峰值功率的总和。

9. 发明授权

US08595515B1 Powering a data center 有权
标题翻译：为数据中心供电
公开(公告)号：US08595515B1
公开(公告)日：2013-11-26
申请号：US12134971
申请日：2008-06-06
申请人： Wolf-Dietrich Weber , Xiaobo Fan , Luiz Andre Barroso
发明人： Wolf-Dietrich Weber , Xiaobo Fan , Luiz Andre Barroso
IPC分类号： G06F1/00 , G06F1/32
CPC分类号： G06F17/5009 , G06F1/00 , G06F1/3206 , G06F9/5094 , Y02D10/22
摘要： A data center includes a power distribution network having a power capacity, and a plurality of computers drawing power from the power distribution network. Each of the computers has a peak power draw. The power capacity is less than a maximum power draw defined by summing the peak power draw from each of the plurality of computers.
摘要翻译：数据中心包括具有电力容量的配电网络和从配电网络抽取电力的多个计算机。每个计算机都具有峰值功率。功率容量小于通过将来自多个计算机中的每一个的峰值功率消耗相加而定义的最大功率消耗。

10. 发明授权

US07660932B2 Composing on-chip interconnects with configurable interfaces 有权
标题翻译：组合片上互连与可配置接口
公开(公告)号：US07660932B2
公开(公告)日：2010-02-09
申请号：US12022912
申请日：2008-01-30
申请人： Chien Chun Chou , Wolf-Dietrich Weber , Drew E. Wingard
发明人： Chien Chun Chou , Wolf-Dietrich Weber , Drew E. Wingard
IPC分类号： G06F13/00
CPC分类号： H04L69/18 , G06F15/7825
摘要： Embodiments of apparatuses, systems, and methods are described for a machine-readable medium having instructions stored thereon, which, when executed by a machine, to cause the machine to generate a representation of an apparatus. The apparatus includes a bridge agent, a first interconnect, and a second interconnect. The bridge agent is configured by bridge control signals to control transmission of a communication between the first interconnect and the second interconnect. The representation may be a sequence of instructions written in a programming language to mimic in a computer simulation environment attributes derived from a projected fabricated hardware instance of the apparatus.
摘要翻译：对于具有存储在其上的指令的机器可读介质描述了装置，系统和方法的实施例，当由机器执行时，该机器可读介质使机器产生装置的表示。该装置包括桥接器，第一互连和第二互连。桥接代理由桥控制信号配置，以控制第一互连和第二互连之间的通信的传输。该表示可以是以编程语言编写的指令序列，以在计算机模拟环境中模仿从该装置的投影制造的硬件实例导出的属性。

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