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1. 发明申请

US20050093615A1 High voltage generation and regulation system for digital multilevel nonvolatile memory 有权
公开(公告)号：US20050093615A1
公开(公告)日：2005-05-05
申请号：US10990786
申请日：2004-11-16
申请人： William Saiki , Hieu Tran , Sakhawat Khan
发明人： William Saiki , Hieu Tran , Sakhawat Khan
IPC分类号： G11C16/30 , H02M3/07 , H03B1/00
CPC分类号： H02M3/07 , G11C16/30
摘要： A high voltage generator provides high voltage signals with different regulated voltage levels. A charge pump generates the high voltage, and includes a quadrature phase forward and backward Vt-canceling high-voltage self-biasing charge pump with a powerup-assist diode. A high voltage series regulator generates the high voltage supply levels, and includes slew rate enhancement and trimmable diode regulation. A nested loop regulator eliminates shunt regulation.

2. 发明申请

US20050024956A1 Column redundancy for digital multilevel nonvolatile memory 有权
标题翻译：数字多级非易失性存储器的列冗余
公开(公告)号：US20050024956A1
公开(公告)日：2005-02-03
申请号：US10628979
申请日：2003-07-28
申请人： Hieu Tran , Sakhawat Khan , William Saiki , George Korsh
发明人： Hieu Tran , Sakhawat Khan , William Saiki , George Korsh
IPC分类号： G11C7/00 , G11C11/56 , G11C29/00 , G11C29/50
CPC分类号： G11C29/50 , G11C11/5621 , G11C16/04 , G11C29/027 , G11C29/50004 , G11C29/82 , G11C2029/0409
摘要： A digital multilevel bit memory array system comprises regular memory arrays and redundant memory arrays. A regular y-driver corresponds to each memory array to read or write contents to a multilevel bit memory cell and compare the read cell content to reference voltage levels to determine the data stored in the corresponding memory cell. Likewise, similar functions are performed by the redundant y-driver circuit for the redundant memory array. During the verification of the contents of the memory cell, if the read voltage is outside a certain margin requirement for a level of the reference voltage, a signal is generated in real time so that data from the bad y-driver is not output and data from the redundant y-driver corresponding to the redundant memory array is read out. The memory array system may also include a fractional multilevel redundancy.
摘要翻译：数字多电平位存储器阵列系统包括常规存储器阵列和冗余存储器阵列。常规y驱动器对应于每个存储器阵列以将内容读取或写入多级位存储器单元，并将读取的单元内容与参考电压电平进行比较，以确定存储在相应存储器单元中的数据。类似的功能由冗余的y驱动电路执行，用于冗余存储器阵列。在验证存储单元的内容期间，如果读取电压超出参考电压电平的一定余量要求，则实时生成信号，以便不输出来自不良y驱动器的数据和数据从对应于冗余存储器阵列的冗余y驱动器读出。存储器阵列系统还可以包括分数多级冗余。

3. 发明申请

US20050088221A1 High voltage generation and regulation system for digital multilevel nonvolatile memory 有权
公开(公告)号：US20050088221A1
公开(公告)日：2005-04-28
申请号：US10991301
申请日：2004-11-16
申请人： William Saiki , Hieu Tran , Sakhawat Khan
发明人： William Saiki , Hieu Tran , Sakhawat Khan
IPC分类号： G11C16/30 , H02M3/07 , G05F3/02
CPC分类号： H02M3/07 , G11C16/30
摘要： A high voltage generator provides high voltage signals with different regulated voltage levels. A charge pump generates the high voltage, and includes a quadrature phase forward and backward Vt-canceling high-voltage self-biasing charge pump with a powerup-assist diode. A high voltage series regulator generates the high voltage supply levels, and includes slew rate enhancement and trimmable diode regulation. A nested loop regulator eliminates shunt regulation.

4. 发明申请

US20070159904A1 Wide dynamic range and high speed voltage mode sensing for a multilevel digital non-volatile memory 有权
标题翻译：用于多电平数字非易失性存储器的宽动态范围和高速电压模式感测
公开(公告)号：US20070159904A1
公开(公告)日：2007-07-12
申请号：US11726913
申请日：2007-03-22
申请人： Hieu Tran , Sakhawat Khan
发明人： Hieu Tran , Sakhawat Khan
IPC分类号： G11C7/02
CPC分类号： G11C16/10 , G11C11/5621 , G11C11/5628 , G11C11/5635 , G11C11/5642 , G11C11/5678 , G11C13/0004 , G11C16/08 , G11C16/24 , G11C16/28 , G11C27/005 , G11C2211/5634
摘要： A high speed voltage mode sensing is provided for a digital multibit non-volatile memory integrated system. An embodiment has a local source follower stage followed by a high speed common source stage. Another embodiment has a local source follower stage followed by a high speed source follower stage. Another embodiment has a common source stage followed by a source follower. An auto zeroing scheme is used. A capacitor sensing scheme is used. Multilevel parallel operation is described.
摘要翻译：为数字多位非易失性存储器集成系统提供高速电压模式感测。一个实施例具有本地源跟随器阶段，之后是高速公共源级。另一个实施例具有本地源极跟随器级，之后是高速源极跟随器级。另一个实施例具有公共源级，之后是源跟随器。使用自动归零方案。使用电容感测方案。描述多级并行操作。

5. 发明申请

US20060123280A1 Test circuit and method for multilevel cell flash memory 有权
公开(公告)号：US20060123280A1
公开(公告)日：2006-06-08
申请号：US10991702
申请日：2004-11-17
申请人： Hieu Tran , Anh Ly , Sang Nguyen , Vishal Sarin , Hung Nguyen , William Saiki , Loc Hoang
发明人： Hieu Tran , Anh Ly , Sang Nguyen , Vishal Sarin , Hung Nguyen , William Saiki , Loc Hoang
IPC分类号： G11C29/00
CPC分类号： G11C11/5621 , G11C16/04 , G11C29/50 , G11C29/50004
摘要： A test device and method may be used to detect voltage, current or signals of a digital multilevel memory cell system or to test operation or performance by applying inputted voltages, currents or signals to the memory cell system.

6. 发明申请

US20060072363A1 High speed and high precision sensing for digital multilevel non-volatile memory system 有权
公开(公告)号：US20060072363A1
公开(公告)日：2006-04-06
申请号：US11283195
申请日：2005-11-18
申请人： Hieu Tran , Jack Frayer , William Saiki , Michael Briner
发明人： Hieu Tran , Jack Frayer , William Saiki , Michael Briner
IPC分类号： G11C7/02
CPC分类号： G11C11/5642 , G11C7/06 , G11C16/28
摘要： A digital multilevel non-volatile memory includes a massive sensing system that includes a plurality of sense amplifiers disposed adjacent subarrays of memory cells. The sense amplifier includes a high speed load, a wide output range intermediate stage and a low impedance output driver. The high speed load provides high speed sensing. The wide output range provides a sensing margin at high speed on the comparison node. The low impedance output driver drives a heavy noisy load of a differential comparator. A precharge circuit coupled to the input and output of the sense amplifier increases the speed of sensing. A differential comparator has an architecture that includes analog bootstrap. A reference sense amplifier has the same architecture as the differential amplifier to reduce errors in offset. The reference differential amplifier also includes a signal multiplexing for detecting the contents of redundant cells and reference cells.

7. 发明申请

US20060017084A1 Integrated semiconductor metal-insulator-semiconductor capacitor 审中-公开
标题翻译：集成半导体金属绝缘体 - 半导体电容器
公开(公告)号：US20060017084A1
公开(公告)日：2006-01-26
申请号：US10897045
申请日：2004-07-22
申请人： Feng Gao , Changyuan Chen , Vishal Sarin , William Saiki , Hieu Tran , Dana Lee
发明人： Feng Gao , Changyuan Chen , Vishal Sarin , William Saiki , Hieu Tran , Dana Lee
IPC分类号： H01L29/76
CPC分类号： H01L27/0805 , H01L27/0811 , H01L29/94
摘要： An integrated MIS capacitor has two substantially identical MIS capacitors. A first capacitor comprises a first region of a first conductivity type adjacent to a channel region of the first conductivity type in a semiconductor substrate. The semiconductor substrate has a second conductivity type. A gate electrode is insulated and spaced apart from the channel region of the first capacitor. The second capacitor is substantially identical to the first capacitor and is formed in the same semiconductor substrate. The gate electrode of the first capacitor is electrically connected to the first region of the second capacitor and the gate electrode of the second capacitor is electrically connected to the first region of the first capacitor. In this manner, the capacitors are connected in an anti-parallel configuration. A capacitor which has high capacitance densities, low process complexity, ambipolar operation, low voltage and temperature coefficient, low external parasitic resistance and capacitance and good matching characteristics for use in analog designs that can be integrated with existing semiconductor processes results.
摘要翻译：集成的MIS电容器具有两个基本相同的MIS电容器。第一电容器包括在半导体衬底中与第一导电类型的沟道区相邻的第一导电类型的第一区域。半导体衬底具有第二导电类型。栅电极与第一电容器的沟道区隔离并隔开。第二电容器基本上与第一电容器相同，并且形成在相同的半导体衬底中。第一电容器的栅电极电连接到第二电容器的第一区域，并且第二电容器的栅极电连接到第一电容器的第一区域。以这种方式，电容器以反并联配置连接。具有高电容密度，低工艺复杂性，双极性操作，低电压和温度系数，低外部寄生电阻和电容以及用于可与现有半导体工艺结合的模拟设计的良好匹配特性的电容器。

8. 发明申请

US20070274658A1 LOOPBACK DEVICE UTILIZING BEND INSENSITIVE OPTICAL FIBER 有权
标题翻译：使用弯曲敏感光纤的环绕设备
公开(公告)号：US20070274658A1
公开(公告)日：2007-11-29
申请号：US11406190
申请日：2006-04-18
申请人： Micah Isenhour , Christopher Lewallen , James Luther , Thomas Theuerkorn , Hieu Tran
发明人： Micah Isenhour , Christopher Lewallen , James Luther , Thomas Theuerkorn , Hieu Tran
IPC分类号： G02B6/00
CPC分类号： G02B6/4465 , G02B6/4475
摘要： A loopback device utilizing bend insensitive optical fiber to facilitate deployment of a connectorized fiber optic distribution cable through small-diameter conduit. A loopback device utilizing bend insensitive optical fiber for use within an optical network to route optical signals transmitted downstream along one or more optical fibers back upstream along the same or other optical fibers for the purpose of the determining the integrity of the downstream and upstream optical paths from a single upstream location. A loopback device including one or more bend insensitive optical fibers, a multi-fiber loopback ferrule and a dust cap for sealing engaging a connector plug attached to a distribution cable or a tether of a pre-engineered distribution cable assembly prior to installation of the distribution cable.
摘要翻译：一种使用弯曲不敏感光纤的环回装置，以便于通过小直径导管部署连接的光纤配线。一种使用弯曲不敏感光纤在光网络内使用的环回装置，用于将沿着一根或多根光纤的下行传输的光信号沿相同或其它光纤向上游传送，以确定下游和上游光路的完整性从单个上游位置。一种环回装置，包括一个或多个弯曲不敏感光纤，多光纤环回套圈和防尘盖，用于在安装分布之前密封连接到分配电缆或预设计布局电缆组件的系绳的连接器插头电缆。

9. 发明申请

US20070120599A1 Multi-operational amplifier system 有权
标题翻译：多运算放大器系统
公开(公告)号：US20070120599A1
公开(公告)日：2007-05-31
申请号：US11652719
申请日：2007-01-11
申请人： Hieu Tran , Anh Ly , Sang Nguyen , Vishal Sarin
发明人： Hieu Tran , Anh Ly , Sang Nguyen , Vishal Sarin
IPC分类号： H03F3/00
CPC分类号： H03F3/45192 , H03F3/211 , H03F3/45183 , H03F3/45475 , H03F3/72 , H03F2203/21109 , H03F2203/21145 , H03F2203/45138 , H03F2203/45288 , H03F2203/45541 , H03F2203/45618 , H03F2203/45626 , H03F2203/45722 , H03F2203/45728 , H03F2203/7206 , H03F2203/7215
摘要： A multi-operational amplifier system comprises a plurality of operational amplifiers and a controller to configure the plurality of operational amplifiers. The operational amplifiers may be selectively configured to operate individually or in combination with other of the operational amplifiers. The operational amplifiers may have different common node inputs. In one aspect, the different inputs may be selected from groups of PMOS, N-type NMOS and NZ NMOS inputs. The operational amplifiers may include the different inputs that are arranged as differential pairs.
摘要翻译：多运算放大器系统包括多个运算放大器和用于配置多个运算放大器的控制器。运算放大器可以被选择性地配置成单独操作或与其他运算放大器组合运行。运算放大器可能具有不同的公共节点输入。在一个方面，可以从PMOS，N型NMOS和NZ NMOS输入的组中选择不同的输入。运算放大器可以包括被布置为差分对的不同输入。

10. 发明申请

US20060202741A1 Fast start charge pump for voltage regulators 有权
标题翻译：用于稳压器的快速启动电荷泵
公开(公告)号：US20060202741A1
公开(公告)日：2006-09-14
申请号：US11080067
申请日：2005-03-14
申请人： Hieu Tran , Sang Nguyen , Anh Ly , Hung Nguyen , Wingfu Lau , Nasrin Jaffari , Thuan Vu , Vishal Sarin , Loc Hoang
发明人： Hieu Tran , Sang Nguyen , Anh Ly , Hung Nguyen , Wingfu Lau , Nasrin Jaffari , Thuan Vu , Vishal Sarin , Loc Hoang
IPC分类号： G05F1/10
CPC分类号： H02M3/07 , H02M1/36 , H02M1/44
摘要： A digital multilevel memory system includes a charge pump and a voltage regulator for generating regulated high voltages for various memory operations. The charge pump may include a plurality of boost circuits to boost the output of the charge pump during a fast start up. Afterwards, the boost circuits are disabled to allow the charge pump to generate high voltages without boosting. The boost circuits may be successively enabled to boost the voltage. The boost circuits may be loadless. The voltage regulator may operate in an open loop and may include a resistive divider as a reference voltage for regulating the high voltage from the charge pump. The charge pump may include spread spectrum pump clocking to reduce electromagnetic inference for capacitor or inductor on-chip charge pumping.
摘要翻译：数字多电平存储器系统包括电荷泵和用于产生用于各种存储器操作的调节高电压的电压调节器。电荷泵可以包括多个升压电路，以在快速启动期间升高电荷泵的输出。之后，升压电路被禁止，使电荷泵产生高电压而不加速。升压电路可以被连续地使能以升高电压。升压电路可以是无负载的。电压调节器可以在开环中工作，并且可以包括电阻分压器作为用于调节来自电荷泵的高电压的参考电压。电荷泵可以包括扩频泵时钟，以减少用于电容器或电感器片上电荷泵浦的电磁推理。

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