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    • 4. 发明授权
    • Link integrity duality for network devices in cold power state
    • 网络设备在冷电状态下的链路完整性二元性
    • US06981164B2
    • 2005-12-27
    • US09760752
    • 2001-01-17
    • William R. BullmanMatthew HenryRyan S. HolmqvistSteven E. Strauss
    • William R. BullmanMatthew HenryRyan S. HolmqvistSteven E. Strauss
    • G06F1/32G06F1/26H04L12/10H04L12/28G06F1/28G06F1/30
    • H04L12/10
    • A data-based software type link integrity module is implemented separately in hardware (e.g., using physical gates, using a microcontroller, etc.) and separated from core CPU functionality in a network device, such that the link integrity module may remain powered in a cold power mode (e.g., when core functionality is powered down). The separately powered data-based link integrity module is powered by an auxiliary backup power source. Thus, when in a power down mode (e.g., when in an ACPI defined D3 type cold state) a minimal power source may be used to power the separate link integrity module separate from the power source to the core network device functionality. The separately powered data-based link integrity module may be redundant to a software driver type data-based link integrity module implemented in core memory and enabled or disabled as desired. Alternatively, the separately powered data-based link integrity module may be in lei of the otherwise conventional software driver implemented in core memory and permanently enabled.
    • 基于数据的软件类型链路完整性模块在硬件中单独实现(例如,使用物理门,使用微控制器等)并与网络设备中的核心CPU功能分离,使得链路完整性模块可以保持为 冷电源模式(例如,当核心功能关闭时)。 单独供电的基于数据的链路完整性模块由辅助备用电源供电。 因此,当处于断电模式时(例如,当处于ACPI定义的D3型冷态时),可以使用最小功率源来将分离的链路完整性模块与电源分离到核心网络设备功能。 单独供电的基于数据的链路完整性模块对于在核心存储器中实现并且根据需要启用或禁用的基于软件驱动器类型的基于数据的链路完整性模块可能是冗余的。 或者,单独供电的基于数据的链路完整性模块可以是在核心存储器中实现并且永久启用的另外常规的软件驱动器。
    • 5. 发明授权
    • Controlled latency with dynamically limited queue depth based on history and latency estimation
    • 基于历史和延迟估计的具有动态有限队列深度的受控延迟
    • US06738386B1
    • 2004-05-18
    • US09569311
    • 2000-05-11
    • Ryan S. Holmqvist
    • Ryan S. Holmqvist
    • H04L1256
    • H04L47/2441H04L47/10H04L47/2416H04L47/283H04L47/30H04L49/90
    • A priority history module monitors the past history of data packets submitted to the hardware queue with respect to two or more priority levels. The priority queuing module may use any suitable arbitration or other algorithm to order the submission of data packets of varying priorities from the various software data queues, as is otherwise conventional, particularly when data packets of all types of priorities are currently waiting for submission to the transmit data queue. However, when an absence of a particular priority level occurs (e.g., when no highest priority data packets are waiting for submission), then latency of the transmit data queue is adaptively balanced with throughput of the transmit data queue, in accordance with the principles of the present invention. Latency of the data packets currently in the relevant data queue may be estimated to further qualify the adaptively adjusted limit to the data queue.
    • 优先级历史模块监视相对于两个或更多个优先级别提交给硬件队列的数据包的过去历史。 优先级排队模块可以使用任何合适的仲裁或其他算法来对来自各种软件数据队列的不同优先级的数据分组的提交进行排序,如其他常规的,特别是当所有类型的优先级的数据分组当前正在等待提交给 传输数据队列。 然而,当没有发生特定优先级时(例如,当没有最高优先级的数据分组正在等待提交时),则发送数据队列的等待时间根据发送数据队列的吞吐量自适应地平衡, 本发明。 可以估计当前在相关数据队列中的数据分组的延迟,以进一步限定对数据队列的自适应调整的限制。