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1. 发明授权

US5767543A Ferroelectric semiconductor device having a layered ferroelectric structure 失效
标题翻译：具有分层铁电结构的铁电半导体器件
公开(公告)号：US5767543A
公开(公告)日：1998-06-16
申请号：US714715
申请日：1996-09-16
申请人： William J. Ooms , Daniel S. Marshall , Jerald A. Hallmark
发明人： William J. Ooms , Daniel S. Marshall , Jerald A. Hallmark
IPC分类号： H01L21/02 , H01L21/285 , H01L21/314 , H01L21/316 , H01L29/51 , H01L29/788 , G11C11/22
CPC分类号： H01L28/56 , H01L21/2855 , H01L21/28556 , H01L21/31691 , H01L29/516
摘要： A layered bismuth ferroelectric structure (12) and a method for forming the bismuth layered ferroelectric structure (12). A monolayer (12A) of bismuth is formed in intimate contact with a single crystalline semiconductor material (11). A layered ferroelectric material (12) is grown on the monolayer (12A) of bismuth such that the monolayer (12A) of bismuth becomes a part of the layered ferroelectric material (12). The ferroelectric material (12) forms a layered ferroelectric material which is not a pure perovskite, wherein the crystalline structure at the interface between the single crystalline semiconductor material (11) and the monolayer (12A) of bismuth are substantially the same.
摘要翻译：层状铋强电介质结构（12）和形成铋层状铁电体结构（12）的方法。形成与单晶半导体材料（11）紧密接触的铋单层（12A）。在铋的单层（12A）上生长分层的铁电材料（12），使得铋的单层（12A）成为层状铁电体（12）的一部分。铁电材料（12）形成不是纯钙钛矿的层状铁电体材料，其中在单晶半导体材料（11）和铋单层（12A）之间的界面处的晶体结构基本上相同。

2. 发明授权

US06367261B1 Thermoelectric power generator and method of generating thermoelectric power in a steam power cycle utilizing latent steam heat 失效
标题翻译：热电发电机及利用潜热蒸汽在蒸汽动力循环中产生热电功率的方法
公开(公告)号：US06367261B1
公开(公告)日：2002-04-09
申请号：US09703072
申请日：2000-10-30
申请人： Daniel S. Marshall , Jerald A. Hallmark , William J. Ooms
发明人： Daniel S. Marshall , Jerald A. Hallmark , William J. Ooms
IPC分类号： F01K1700
CPC分类号： H01L35/00 , F01K9/00
摘要： A thermoelectric power generator and method of generating thermoelectric power in a steam power cycle utilizing latent steam heat including a condenser, a heat source, such as steam, and at least one thermoelectric module. The condenser includes a plurality of condenser tubes each having included therein a heat extractor. The heat source is in communication with the condenser and is characterized as providing thermal energy to the condenser. The at least one thermoelectric module, including a plurality of thermoelectric elements, is positioned in communication with at least one of the plurality of condenser tubes so that thermal energy flows through the thermoelectric elements thereby generating electrical power.
摘要翻译：一种热电发电机和利用包括冷凝器，热源（例如蒸汽）和至少一个热电模块的潜热蒸汽热在蒸汽动力循环中产生热电功率的方法。冷凝器包括多个冷凝管，每个冷凝管每个都包括一个散热器。热源与冷凝器连通，其特征在于向冷凝器提供热能。包括多个热电元件的至少一个热电模块被定位成与多个冷凝器管中的至少一个连通，使得热能流过热电元件从而产生电力。

3. 发明授权

US6097047A Ferroelectric semiconductor device, and ferroelectric semiconductor substrate 失效
标题翻译：铁电半导体器件和铁电半导体衬底
公开(公告)号：US6097047A
公开(公告)日：2000-08-01
申请号：US70063
申请日：1998-04-30
申请人： William J. Ooms , Jerald A. Hallmark , Daniel S. Marshall
发明人： William J. Ooms , Jerald A. Hallmark , Daniel S. Marshall
IPC分类号： H01L21/336 , H01L21/8234 , H01L29/10 , H01L29/78 , H01L29/786
CPC分类号： H01L29/66772 , H01L21/8234 , H01L29/1079 , H01L29/78391 , H01L29/78603 , H01L29/78645
摘要： A ferroelectric semiconductor device (10) and a method of manufacturing the ferroelectric semiconductor device (10). The ferroelectric semiconductor device (10) is manufactured from a substrate (11) that has a layer (14) of ferroelectric material sandwiched between a substrate (13) and a layer (16) of silicon. A gate structure (24) is formed on the layer (16) of silicon. A source region is formed in a portion of the layer (16) of silicon adjacent one side of the gate structure (24) and a drain region is formed in a portion of the layer (16) of silicon adjacent an opposing side of the gate structure (24).
摘要翻译：铁电半导体器件（10）和制造铁电半导体器件（10）的方法。铁电半导体装置（10）由具有夹在基板（13）和硅层（16）之间的铁电材料层（14）的基板（11）制成。在硅的层（16）上形成栅极结构（24）。源极区域形成在与栅极结构（24）的一侧相邻的硅的层（16）的一部分中，并且漏极区域形成在邻近栅极的相对侧的硅层（16）的一部分中结构（24）。

4. 发明授权

US06262461B1 Method and apparatus for creating a voltage threshold in a FET 失效
标题翻译：用于在FET中产生电压阈值的方法和装置
公开(公告)号：US06262461B1
公开(公告)日：2001-07-17
申请号：US09102105
申请日：1998-06-22
申请人： Daniel S. Marshall , William J. Ooms , Jerald A. Hallmark , Yang Wang
发明人： Daniel S. Marshall , William J. Ooms , Jerald A. Hallmark , Yang Wang
IPC分类号： H01L31119
CPC分类号： H01L29/66568 , H01L29/4975 , H01L29/517 , H01L29/78 , H01L29/7838
摘要： A method of fabricating a field effect transistor including doping a continuous blanket layer in a semiconductor substrate structure adjacent the surface to include a source area and a drain area spaced from the source area. A high dielectric constant insulator layer is positioned on the surface of the semiconductor substrate structure overlying the continuous blanket layer to define a gate area between the source and drain areas. A gate contact on the insulator layer is selected to provide a work function difference that depletes the doped layer beneath the insulator layer. Further, the doped layer depth and dosage are designed such that the doped layer is depleted beneath the insulator layer by the selected work function difference of the gate contact and the semiconductor substrate.
摘要翻译：一种制造场效应晶体管的方法，包括在邻近表面的半导体衬底结构中掺杂连续覆盖层，以包括与源极区域间隔开的源极区域和漏极区域。高介电常数绝缘体层位于覆盖连续覆盖层的半导体衬底结构的表面上，以限定源区和漏区之间的栅极区。选择绝缘体层上的栅极接触以提供消耗绝缘体层下方的掺杂层的功函数差异。此外，掺杂层深度和剂量被设计成使得掺杂层通过栅极接触和半导体衬底的选择的功函数差耗尽在绝缘体层之下。

5. 发明授权

US6025735A Programmable switch matrix and method of programming 失效
标题翻译：可编程开关矩阵和编程方法
公开(公告)号：US6025735A
公开(公告)日：2000-02-15
申请号：US772735
申请日：1996-12-23
申请人： Robert M. Gardner , Jerald A. Hallmark , Daniel S. Marshall , William J. Ooms
发明人： Robert M. Gardner , Jerald A. Hallmark , Daniel S. Marshall , William J. Ooms
IPC分类号： H03K19/173
CPC分类号： H03K19/17772 , H03K19/1736 , H03K19/17748 , H03K19/17756
摘要： A switch network (22) in a Field Programmable Gate Array (FPGA) which operates as a combination of a programming transistor (34) and a ferroelectric transistor (32). The programming transistor (34) is selected to transfer a polarizing voltage to a gate terminal of the ferroelectric transistor (32) for programming the ferroelectric transistor (32) in an on-state. The ferroelectric transistor (32) functions as a nonvolatile latch and pass device to provide the electrical interconnect path that links multiple Configurable Logic Blocks (CLBs). The programming transistor (34) is selected to transfer a depolarizing voltage to the gate terminal of the ferroelectric transistor (32) for programming the ferroelectric transistor (32) in an off-state.
摘要翻译：现场可编程门阵列（FPGA）中的开关网络（22），其作为编程晶体管（34）和铁电晶体管（32）的组合工作。编程晶体管（34）被选择为将极化电压传递到铁电晶体管（32）的栅极端子，用于将铁电晶体管（32）编程为导通状态。铁电晶体管（32）用作非易失性锁存和通过装置，以提供链接多个可配置逻辑块（CLB）的电互连路径。编程晶体管（34）被选择为将去极化电压传递到铁电晶体管（32）的栅极端子，用于将铁电晶体管（32）编程为截止状态。

6. 发明授权

US5888296A Method for making a ferroelectric semiconductor device and a layered structure 失效
标题翻译：制造铁电半导体器件和分层结构的方法
公开(公告)号：US5888296A
公开(公告)日：1999-03-30
申请号：US956622
申请日：1997-09-29
申请人： William J. Ooms , Daniel S. Marshall , Jerald A. Hallmark
发明人： William J. Ooms , Daniel S. Marshall , Jerald A. Hallmark
IPC分类号： H01L21/02 , H01L21/285 , H01L21/314 , H01L21/316 , H01L29/51 , C30B23/00
CPC分类号： H01L28/56 , H01L21/2855 , H01L21/28556 , H01L21/31691 , H01L29/516
摘要： A layered bismuth ferroelectric structure (12) and a method for forming the bismuth layered ferroelectric structure (12). A monolayer (12A) of bismuth is formed in intimate contact with a single crystalline semiconductor material (11). A layered ferroelectric material (12) is grown on the monolayer (12A) of bismuth such that the monolayer (12A) of bismuth becomes a part of the layered ferroelectric material (12). The ferroelectric material (12) forms a layered ferroelectric material which is not a pure perovskite, wherein the crystalline structure at the interface between the single crystalline semiconductor material (11) and the monolayer (12A) of bismuth are substantially the same.
摘要翻译：层状铋铁电体结构（12）和形成铋层状铁电体结构（12）的方法。形成与单晶半导体材料（11）紧密接触的铋单层（12A）。在铋的单层（12A）上生长分层的铁电材料（12），使得铋的单层（12A）成为层状铁电体（12）的一部分。铁电材料（12）形成不是纯钙钛矿的层状铁电体材料，其中在单晶半导体材料（11）和铋单层（12A）之间的界面处的晶体结构基本上相同。

7. 发明授权

US5846847A Method of manufacturing a ferroelectric device 失效
标题翻译：制造铁电体元件的方法
公开(公告)号：US5846847A
公开(公告)日：1998-12-08
申请号：US743769
申请日：1996-11-07
申请人： William J. Ooms , Jerald A. Hallmark , Daniel S. Marshall
发明人： William J. Ooms , Jerald A. Hallmark , Daniel S. Marshall
IPC分类号： H01L21/336 , H01L21/8234 , H01L29/10 , H01L29/78 , H01L29/786 , H01G7/06 , H01L21/8239
CPC分类号： H01L29/66772 , H01L21/8234 , H01L29/1079 , H01L29/78391 , H01L29/78603 , H01L29/78645
摘要： A ferroelectric semiconductor device (10) and a method of manufacturing the ferroelectric semiconductor device (10). The ferroelectric semiconductor device (10) is manufactured from a substrate (11) that has a layer (14) of ferroelectric material sandwiched between a substrate (13) and a layer (16) of silicon. A gate structure (24) is formed on the layer (16) of silicon. A source region is formed in a portion of the layer (16) of silicon adjacent one side of the gate structure (24) and a drain region is formed in a portion of the layer (16) of silicon adjacent an opposing side of the gate structure (24).
摘要翻译：铁电半导体器件（10）和制造铁电半导体器件（10）的方法。铁电半导体装置（10）由具有夹在基板（13）和硅层（16）之间的铁电材料层（14）的基板（11）制成。在硅的层（16）上形成栅极结构（24）。源极区域形成在与栅极结构（24）的一侧相邻的硅的层（16）的一部分中，并且漏极区域形成在邻近栅极的相对侧的硅层（16）的一部分中结构（24）。

8. 发明授权

US06472278B1 Method and apparatus for creating a voltage threshold in a FET 失效
标题翻译：用于在FET中产生电压阈值的方法和装置
公开(公告)号：US06472278B1
公开(公告)日：2002-10-29
申请号：US09679184
申请日：2000-10-04
申请人： Daniel S. Marshall , William J. Ooms , Jerald A. Hallmark , Yang Wang
发明人： Daniel S. Marshall , William J. Ooms , Jerald A. Hallmark , Yang Wang
IPC分类号： H01L21336
CPC分类号： H01L29/66568 , H01L29/4975 , H01L29/517 , H01L29/78 , H01L29/7838
摘要： A method of fabricating a field effect transistor including doping a continuous blanket layer in a semiconductor substrate structure adjacent the surface to include a source area and a drain area spaced from the source area. A high dielectric constant insulator layer is positioned on the surface of the semiconductor substrate structure overlying the continuous blanket layer to define a gate area between the source and drain areas. A gate contact on the insulator layer is selected to provide a work function difference that depletes the doped layer beneath the insulator layer. Further, the doped layer depth and dosage are designed such that the doped layer is depleted beneath the insulator layer by the selected work function difference of the gate contact and the semiconductor substrate.
摘要翻译：一种制造场效应晶体管的方法，包括在邻近表面的半导体衬底结构中掺杂连续覆盖层，以包括与源极区域间隔开的源极区域和漏极区域。高介电常数绝缘体层位于覆盖连续覆盖层的半导体衬底结构的表面上，以限定源区和漏区之间的栅极区。选择绝缘体层上的栅极接触以提供消耗绝缘体层下方的掺杂层的功函数差异。此外，掺杂层深度和剂量被设计成使得掺杂层通过栅极接触和半导体衬底的选择的功函数差耗尽在绝缘体层之下。

9. 发明授权

US06262462B1 Enhanced dielectric constant gate insulator 失效
标题翻译：增强介电常数栅绝缘子
公开(公告)号：US06262462B1
公开(公告)日：2001-07-17
申请号：US09102191
申请日：1998-06-22
申请人： Daniel S. Marshall , Jerald A. Hallmark , William J. Ooms
发明人： Daniel S. Marshall , Jerald A. Hallmark , William J. Ooms
IPC分类号： H01L2976
CPC分类号： H01L21/28194 , H01L21/31604 , H01L29/511 , H01L29/516 , H01L29/517
摘要： A field effect transistor with an enhanced dielectric constant gate insulator including spaced apart source and drain terminals positioned on a substrate structure so as to define a gate area therebetween. A layer of laterally strained, enhanced dielectric constant dielectric material is epitaxially grown on the substrate structure in the gate area, and a gate metal is positioned on the layer of dielectric material to form a gate terminal in the gate area.
摘要翻译：具有增强的介电常数栅极绝缘体的场效应晶体管，其包括位于衬底结构上的间隔开的源极和漏极端子，以便在它们之间限定栅极区域。在栅极区域中的衬底结构上外延生长横向应变的增强介电常数介电材料层，并且栅极金属位于电介质材料层上以在栅极区域中形成栅极端子。

10. 发明授权

US6020213A Method for making ferroelectric semiconductor device 失效
标题翻译：制造铁电半导体器件的方法
公开(公告)号：US6020213A
公开(公告)日：2000-02-01
申请号：US69244
申请日：1998-04-29
申请人： William J. Ooms , Jerald A. Hallmark , Daniel S. Marshall
发明人： William J. Ooms , Jerald A. Hallmark , Daniel S. Marshall
IPC分类号： H01L29/78 , H01L21/00
CPC分类号： H01L29/78391
摘要： A ferroelectric semiconductor device (10) and a method of manufacturing the ferroelectric semiconductor device (10). The ferroelectric semiconductor device (10) has a layer (13) of ferroelectric material disposed on a semiconductor substrate (11) and a gate electrode (17) formed on a portion (26) of the layer (13) of ferroelectric material. The portion (26) of the layer (13) of ferroelectric material sandwiched between a semiconductor substrate (11) and a gate electrode (17) retains its ferroelectric activity. The portions (21, 22) of the layer (13) of ferroelectric material adjacent the portion (26) are damaged and thereby rendered ferroelectrically inactive. A source contact (31) and a drain contact (32) are formed through the damaged portions (21, 22) of the layer (13) of ferroelectric material.
摘要翻译：铁电半导体器件（10）和制造铁电半导体器件（10）的方法。铁电半导体装置（10）具有设置在半导体基板（11）上的铁电体层（13）和形成在铁电体层（13）的部分（26）上的栅电极（17）。夹在半导体衬底（11）和栅电极（17）之间的铁电材料层（13）的部分（26）保持其铁电活性。邻近部分（26）的铁电材料层（13）的部分（21,22）被损坏，从而变成铁电非活性的。通过铁电材料层（13）的损坏部分（21,22）形成源极触点（31）和漏极触点（32）。

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