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1. 发明授权

US6020755A Hybrid programmable gate arrays 失效
标题翻译：混合可编程门阵列
公开(公告)号：US6020755A
公开(公告)日：2000-02-01
申请号：US938550
申请日：1997-09-26
申请人： William B. Andrews , Barry K. Britton , Thomas J. Hickey , Ronald T. Modo , Ho T. Nguyen , Lorraine L. Schadt , Satwant Singh
发明人： William B. Andrews , Barry K. Britton , Thomas J. Hickey , Ronald T. Modo , Ho T. Nguyen , Lorraine L. Schadt , Satwant Singh
IPC分类号： H01L21/82 , H03K19/177
CPC分类号： H03K19/17796 , H03K19/17732
摘要： A single integrated circuit (IC) having one or more regions of mask-programmed device (MPD) logic for implementing permanent functions and one or more regions of field-programmable gate-array (FPGA) logic for implementing user-specified functions. The FPGA-type logic provides programming flexibility, while the MPD-type logic provides size, speed, functionality, and dollar cost advantages. In one embodiment, a hybrid IC has an array of programmable logic cells (PLCs) implemented using FPGA-type logic, an application-specific block (ASB) implemented using MPD-type logic, and a ring of pads. Fast interface switch hierarchy (FISH) cells provide the interface between the PLC array and the pads, between the PLC array and the ASB, and between the ASB and the pad ring. Muxes in the FISH cells can be programmed to cause the FISH cells to operate either (1) as programmable interface cells (PICs) that provide a direct interface between the PLC array and the pad ring or (2) as ASB-interface cells (AICs) that (a) provide interfaces between the PLC array and the ASB and (b) control interfaces between the ASB and the pad ring.
摘要翻译：具有用于实现永久功能的一个或多个屏蔽编程设备（MPD）逻辑区域的单个集成电路（IC）和用于实现用户指定功能的现场可编程门阵列（FPGA）逻辑的一个或多个区域。 FPGA型逻辑提供编程灵活性，而MPD型逻辑提供了大小，速度，功能和美元成本优势。在一个实施例中，混合IC具有使用FPGA类型逻辑实现的可编程逻辑单元阵列（PLC）阵列，使用MPD型逻辑实现的特定应用块（ASB）和一个垫环阵列。快速接口交换层次（FISH）单元提供PLC阵列与PLC之间，PLC阵列与ASB之间以及ASB与焊盘环之间的接口。可以对FISH单元中的复用器进行编程，以使FISH单元（1）作为可编程接口单元（PIC）来操作，这些可编程接口单元（PIC）可在PLC阵列和焊盘环之间提供直接接口，或（2）作为ASB接口单元（AIC））（a）提供PLC阵列和ASB之间的接口，（b）控制ASB和焊盘环之间的接口。

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