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    • 1. 发明授权
    • Liquid crystal display device, and method of driving liquid crystal display device
    • 液晶显示装置及驱动液晶显示装置的方法
    • US08723786B2
    • 2014-05-13
    • US12760284
    • 2010-04-14
    • Takeya TakeuchiWerapong JarupoonpholTomohiko SatoYoshitoshi Kida
    • Takeya TakeuchiWerapong JarupoonpholTomohiko SatoYoshitoshi Kida
    • G09G3/36
    • G09G3/3655G09G3/3614G09G2300/0426G09G2320/0209G09G2330/021
    • The present invention provides a liquid crystal display device including: a pixel array including a plurality of scanning lines arranged in rows, a plurality of signal lines arranged in columns, a plurality of liquid crystal elements arranged in a matrix corresponding to an intersection of each scanning line and each signal line, and a plurality of common connection lines arranged one by one corresponding to the liquid crystal elements of each line; a scanning line drive circuit; a signal line drive circuit; and a common connection line drive circuit electrically separating, from each other, one or a plurality of common connection lines (first common connection lines), and a plurality of common connection lines (second common connection lines), and electrically connecting the plurality of second common connection lines to each other to independently drive the first common connection line and the second connection lines from each other.
    • 本发明提供一种液晶显示装置,包括:像素阵列,包括排列成行的多条扫描线,多列排列的信号线,多个液晶元件排列成与每个扫描的交点相对应的矩阵 线和每个信号线,以及与每行的液晶元件对应地排列的多个公共连接线; 扫描线驱动电路; 信号线驱动电路; 以及公共连接线驱动电路,其将一个或多个公共连接线(第一公共连接线)和多个公共连接线(第二公共连接线)彼此电分离,并且电连接所述多个第二 公共连接线彼此独立地驱动第一公共连接线和第二连接线彼此。
    • 2. 发明授权
    • Delay circuit, semiconductor control circuit, display device and electronic device
    • 延迟电路,半导体控制电路,显示设备和电子设备
    • US08054104B2
    • 2011-11-08
    • US13064219
    • 2011-03-11
    • Werapong JarupoonpholYoshitoshi Kida
    • Werapong JarupoonpholYoshitoshi Kida
    • H03K5/00
    • H03K5/133H03K5/04H03K5/135H03K19/00361H03K19/00384
    • Disclosed herein is a delay circuit for performing one of a charge and a discharge in two stages, and delaying a signal, the delay circuit including an output section configured to output a delayed signal; two power supplies; and a delay inverter; wherein the delay inverter has a first transistor and a second transistor of an identical channel type for one of a first charge and a first discharge, the first transistor and the second transistor being connected in series with each other between the output section and one power supply, and the delay inverter has a third transistor of a different channel type from the first transistor and the second transistor for one of a second charge and a second discharge, the third transistor being connected in parallel with one of the first transistor and the second transistor.
    • 这里公开了一种延迟电路,用于两级执行充电和放电中的一种,并延迟信号,该延迟电路包括被配置为输出延迟信号的输出部分; 两个电源; 和延时逆变器; 其中所述延迟反相器具有用于第一电荷和第一放电之一的相同沟道类型的第一晶体管和第二晶体管,所述第一晶体管和所述第二晶体管在所述输出部分和一个电源之间彼此串联连接 延迟反相器具有与第一晶体管不同的沟道类型的第三晶体管和用于第二电荷和第二放电之一的第二晶体管,第三晶体管与第一晶体管和第二晶体管中的一个并联连接 。
    • 4. 发明授权
    • Delay circuit, semiconductor control circuit, display device, and electronic device
    • 延迟电路,半导体控制电路,显示装置和电子设备
    • US07956663B2
    • 2011-06-07
    • US12222860
    • 2008-08-18
    • Werapong JarupoonpholYoshitoshi Kida
    • Werapong JarupoonpholYoshitoshi Kida
    • H03H11/26
    • H03K5/133H03K5/04H03K5/135H03K19/00361H03K19/00384
    • Disclosed herein is a delay circuit for performing one of a charge and a discharge in two stages, and delaying a signal, the delay circuit including an output section configured to output a delayed signal; two power supplies; and a delay inverter; wherein the delay inverter has a first transistor and a second transistor of an identical channel type for one of a first charge and a first discharge, the first transistor and the second transistor being connected in series with each other between the output section and one power supply, and the delay inverter has a third transistor of a different channel type from the first transistor and the second transistor for one of a second charge and a second discharge, the third transistor being connected in parallel with one of the first transistor and the second transistor.
    • 这里公开了一种延迟电路,用于两级执行充电和放电中的一种,并延迟信号,该延迟电路包括被配置为输出延迟信号的输出部分; 两个电源; 和延时逆变器; 其中所述延迟反相器具有用于第一电荷和第一放电之一的相同沟道类型的第一晶体管和第二晶体管,所述第一晶体管和所述第二晶体管在所述输出部分和一个电源之间彼此串联连接 延迟反相器具有与第一晶体管不同的沟道类型的第三晶体管和用于第二电荷和第二放电之一的第二晶体管,第三晶体管与第一晶体管和第二晶体管中的一个并联连接 。
    • 6. 发明申请
    • Delay circuit, semiconductor control circuit, display device, and electronic device
    • 延迟电路,半导体控制电路,显示设备和电子设备
    • US20090058488A1
    • 2009-03-05
    • US12222860
    • 2008-08-18
    • Werapong JarupoonpholYoshitoshi Kida
    • Werapong JarupoonpholYoshitoshi Kida
    • H03H11/26
    • H03K5/133H03K5/04H03K5/135H03K19/00361H03K19/00384
    • Disclosed herein is a delay circuit for performing one of a charge and a discharge in two stages, and delaying a signal, the delay circuit including an output section configured to output a delayed signal; two power supplies; and a delay inverter; wherein the delay inverter has a first transistor and a second transistor of an identical channel type for one of a first charge and a first discharge, the first transistor and the second transistor being connected in series with each other between the output section and one power supply, and the delay inverter has a third transistor of a different channel type from the first transistor and the second transistor for one of a second charge and a second discharge, the third transistor being connected in parallel with one of the first transistor and the second transistor.
    • 这里公开了一种延迟电路,用于两级执行充电和放电中的一种,并延迟信号,该延迟电路包括被配置为输出延迟信号的输出部分; 两个电源; 和延时逆变器; 其中所述延迟反相器具有用于第一电荷和第一放电之一的相同沟道类型的第一晶体管和第二晶体管,所述第一晶体管和所述第二晶体管在所述输出部分和一个电源之间彼此串联连接 延迟反相器具有与第一晶体管不同的沟道类型的第三晶体管和用于第二电荷和第二放电之一的第二晶体管,第三晶体管与第一晶体管和第二晶体管中的一个并联连接 。
    • 9. 发明授权
    • Liquid crystal display device with common connection line voltage adjusted in a holding period for an improved performance
    • 具有公共连接线电压的液晶显示装置在保持期间进行调整,以提高性能
    • US08466867B2
    • 2013-06-18
    • US12828432
    • 2010-07-01
    • Werapong JarupoonpholTakeya TakeuchiTomohiko Sato
    • Werapong JarupoonpholTakeya TakeuchiTomohiko Sato
    • G09G3/36
    • G09G3/3655G09G3/3614G09G2310/08G09G2320/0247
    • A liquid crystal display device is provided, which may reduce flicker in all display gray levels. The liquid crystal display device includes a scan line drive circuit, a signal line drive circuit and a common connection line drive circuit. The common connection line drive circuit applies a voltage, the voltage having polarity opposite to polarity of the signal line, to a common connection line corresponding to a liquid crystal element as a selection object in a write period for writing into the liquid crystal element as a selection object, and applies one or multiple voltages, each voltage having a value different from a center value between an upper limit value and a lower limit value of voltages applied to the common connection lines in the write period, to the common connection lines in a holding period after writing into the liquid crystal element as a selection object is performed.
    • 提供了一种可以减少所有显示灰度级闪烁的液晶显示装置。 液晶显示装置包括扫描线驱动电路,信号线驱动电路和公共连接线驱动电路。 公共连接线路驱动电路将与极性相反的电压作为选择对象施加到与液晶元件对应的公共连接线上,该写入期间写入液晶元件为 选择对象,并且施加一个或多个电压,每个电压具有不同于在写入周期中施加到公共连接线的电压的上限值和下限值之间的中心值的值到一个或多个电压中的公共连接线 写入作为选择对象的液晶元件之后的保持期间被执行。
    • 10. 发明申请
    • LIQUID CRYSTAL DISPLAY DEVICE
    • 液晶显示装置
    • US20110007060A1
    • 2011-01-13
    • US12828432
    • 2010-07-01
    • Werapong JarupoonpholTakeya TakeuchiTomohiko Sato
    • Werapong JarupoonpholTakeya TakeuchiTomohiko Sato
    • G09G5/00
    • G09G3/3655G09G3/3614G09G2310/08G09G2320/0247
    • A liquid crystal display device is provided, which may reduce flicker in all display gray levels. The liquid crystal display device includes a scan line drive circuit, a signal line drive circuit and a common connection line drive circuit. The common connection line drive circuit applies a voltage, the voltage having polarity opposite to polarity of the signal line, to a common connection line corresponding to a liquid crystal element as a selection object in a write period for writing into the liquid crystal element as a selection object, and applies one or multiple voltages, each voltage having a value different from a center value between an upper limit value and a lower limit value of voltages applied to the common connection lines in the write period, to the common connection lines in a holding period after writing into the liquid crystal element as a selection object is performed.
    • 提供了一种可以减少所有显示灰度级闪烁的液晶显示装置。 液晶显示装置包括扫描线驱动电路,信号线驱动电路和公共连接线驱动电路。 公共连接线路驱动电路将与极性相反的电压作为选择对象施加到与液晶元件对应的公共连接线上,该写入期间写入液晶元件为 选择对象,并且施加一个或多个电压,每个电压具有不同于在写入周期中施加到公共连接线的电压的上限值和下限值之间的中心值的值到一个或多个电压中的公共连接线 写入作为选择对象的液晶元件之后的保持期间被执行。