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1. 发明授权

US6055190A Device and method for suppressing bit line column leakage during erase verification of a memory cell 有权
标题翻译：用于在存储器单元的擦除验证期间抑制位线列泄漏的装置和方法
公开(公告)号：US6055190A
公开(公告)日：2000-04-25
申请号：US268557
申请日：1999-03-15
申请人： Wenpin Lu , Ying-Che Lo , Ming-Jye Chiou , Mam-Tsung Wang
发明人： Wenpin Lu , Ying-Che Lo , Ming-Jye Chiou , Mam-Tsung Wang
IPC分类号： G11C16/34 , G11C16/06
CPC分类号： G11C16/3445 , G11C16/344
摘要： A device and method of operation for an improved erase-verify device in which the non-selected cells, within a bit line column of an array of cells, remain inactive. Only the active cell is verified with minimum bit line column leakage associated with the operation of erase verification. Erase verification for a memory array is achieved by applying a source voltage (generally positive) to the common source line associated with a column of cells in the array. This will raise the threshold voltages of the cells (through the body effect of the semiconductor device) to a level higher than the predetermined minimum erased threshold voltage. The non-selected wordlines are coupled to a reference level below the threshold level of the cell (e.g. ground), and the selected wordline is coupled to a positive voltage which is a function of the source voltage. The source voltage is also added to the drain source voltage. The source voltage thereby serves as a feedback input to both the wordline and bit line inputs. Thereafter, a fixed drain-to-source bias is applied to the selected bit line column to conduct current for verification of the cell. The source voltage feedback allows the wordline voltage to be adjusted so that read current through the selected cell can be maintained at a desired level. Using this approach, the bit line column leakage caused by over-erased cells can be effectively suppressed, and an accurate verification result can be achieved.
摘要翻译：一种用于改进的擦除验证装置的装置和操作方法，其中在单元阵列的位线列内的未选择的单元保持不活动。只有活动单元格被验证与擦除验证的操作相关联的最小位线列泄漏。对存储器阵列的擦除验证是通过将源电压（通常为正）施加到与阵列中的一列单元相关联的公共源极线来实现的。这将使电池的阈值电压（通过半导体器件的本体效应）升高到高于预定的最小擦除阈值电压的电平。未选择的字线被耦合到低于单元的阈值电平（例如接地）的参考电平，并且所选择的字线耦合到作为源电压的函数的正电压。源极电压也被加到漏源电压上。因此，源电压用作对字线和位线输入的反馈输入。此后，将固定的漏极 - 源极偏压施加到所选择的位线列，以传导电流以验证电池。源电压反馈允许调节字线电压，使得通过所选择的单元的读取电流可以保持在期望的水平。利用这种方法，可以有效地抑制由过度擦除的单元引起的位线列泄漏，并且可以实现准确的验证结果。

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