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    • 1. 发明申请
    • DATA BUS SYSTEM, ITS ENCODER/DECODER AND ENCODING/DECODING METHOD
    • 数据总线系统,其编码器/解码器和编码/解码方法
    • US20120204082A1
    • 2012-08-09
    • US13446565
    • 2012-04-13
    • Wen Bo ShenChao-Jun LiuYi GeQiang Liu
    • Wen Bo ShenChao-Jun LiuYi GeQiang Liu
    • H03M13/00G06F11/08
    • G06F11/10
    • The present application relates to a data bus system, its encoder/decoder and encoding/decoding method. The data bus encoder comprises: a bus-invert encoder for generating encoded data and invert-indication information by performing bus-invert encoding on data according to a predetermined bus-invert encoding scheme; a virtual bit-group generator for converting the invert-indication information into a virtual bit-group according to a predetermined code mapping; and an error-checking-and-correction encoder for generating an error-checking-and-correction code for a virtual word according to a predetermined error-checking-and-correction encoding scheme, wherein the number of error-checking bits is more than the number of error-correction bits at least by one in the predetermined error-checking-and-correction encoding scheme, and the virtual word includes the data to be output, the virtual bit-group corresponding to the data, and at least one padding bit of a fixed value, which is configured as required by the error-checking-and-correction encoding scheme.
    • 本申请涉及数据总线系统,其编码器/解码器和编码/解码方法。 数据总线编码器包括:总线反转编码器,用于通过根据预定的总线反转编码方案对数据执行总线反转编码来产生编码数据和反转指示信息; 虚拟位组生成器,用于根据预定的代码映射将反转指示信息转换为虚拟位组; 以及用于根据预定的错误检查和校正编码方案为虚拟字生成错误校验码的纠错编码器,其中错误校验位的数目大于 在预定的错误校验和校正编码方案中至少一个纠错位的数量,虚拟字包括要输出的数据,对应于数据的虚拟位组,以及至少一个填充 位,其被配置为由错误校验和校正编码方案所要求的。
    • 2. 发明授权
    • Data bus system, its encoder/decoder and encoding/decoding method
    • 数据总线系统,其编码器/解码器和编码/解码方法
    • US08181101B2
    • 2012-05-15
    • US12363128
    • 2009-01-30
    • Wen Bo ShenChao-Jun LiuYi GeQiang Liu
    • Wen Bo ShenChao-Jun LiuYi GeQiang Liu
    • H03L1/00
    • G06F11/10
    • The present application relates to a data bus system, its encoder/decoder and encoding/decoding method. The data bus encoder comprises: a bus-invert encoder for generating encoded data and invert-indication information by performing bus-invert encoding on data according to a predetermined bus-invert encoding scheme; a virtual bit-group generator for converting the invert-indication information into a virtual bit-group according to a predetermined code mapping; and an error-checking-and-correction encoder for generating an error-checking-and-correction code for a virtual word according to a predetermined error-checking-and-correction encoding scheme, wherein the number of error-checking bits is more than the number of error-correction bits at least by one in the predetermined error-checking-and-correction encoding scheme, the mapping is such that the Hamming distance between any possible value of the virtual bit-group and a reference virtual bit-group which cannot be converted into under the mapping is a fixed value, and not greater than the number of error-correction bits of the error-checking-and-correction encoding scheme, and the virtual word includes the data to be output, the virtual bit-group corresponding to the data, and at least one padding bit of a fixed value, which is configured as required by the error-checking-and-correction encoding scheme.
    • 本申请涉及数据总线系统,其编码器/解码器和编码/解码方法。 数据总线编码器包括:总线反转编码器,用于通过根据预定的总线反转编码方案对数据执行总线反转编码来产生编码数据和反转指示信息; 虚拟位组生成器,用于根据预定的代码映射将反转指示信息转换为虚拟位组; 以及用于根据预定的错误检查和校正编码方案为虚拟字生成错误校验码的纠错编码器,其中错误校验位的数目大于 在预定的错误校验和校正编码方案中至少一个纠错位的数量,映射使得虚拟位组的任何可能值和参考虚拟位组之间的汉明距离,其中 不能转换成映射为固定值,并且不大于错误校验和校正编码方案的纠错位数,虚拟字包括要输出的数据,虚拟位 - 对应于数据的组,以及被配置为由错误校验和校正编码方案所要求的固定值的至少一个填充位。
    • 3. 发明申请
    • DATA BUS SYSTEM, ITS ENCODER/DECODER AND ENCODING/DECODING METHOD
    • 数据总线系统,其编码器/解码器和编码/解码方法
    • US20090193319A1
    • 2009-07-30
    • US12363128
    • 2009-01-30
    • Wen Bo ShenChao-Jun LiuYi GeQiang Liu
    • Wen Bo ShenChao-Jun LiuYi GeQiang Liu
    • H03M13/13G06F11/10
    • G06F11/10
    • The present application relates to a data bus system, its encoder/decoder and encoding/decoding method. The data bus encoder comprises: a bus-invert encoder for generating encoded data and invert-indication information by performing bus-invert encoding on data according to a predetermined bus-invert encoding scheme; a virtual bit-group generator for converting the invert-indication information into a virtual bit-group according to a predetermined code mapping; and an error-checking-and-correction encoder for generating an error-checking-and-correction code for a virtual word according to a predetermined error-checking-and-correction encoding scheme, wherein the number of error-checking bits is more than the number of error-correction bits at least by one in the predetermined error-checking-and-correction encoding scheme, the mapping is such that the Hamming distance between any possible value of the virtual bit-group and a reference virtual bit-group which cannot be converted into under the mapping is a fixed value, and not greater than the number of error-correction bits of the error-checking-and-correction encoding scheme, and the virtual word includes the data to be output, the virtual bit-group corresponding to the data, and at least one padding bit of a fixed value, which is configured as required by the error-checking-and-correction encoding scheme.
    • 本申请涉及数据总线系统,其编码器/解码器和编码/解码方法。 数据总线编码器包括:总线反转编码器,用于通过根据预定的总线反转编码方案对数据执行总线反转编码来产生编码数据和反转指示信息; 虚拟位组生成器,用于根据预定的代码映射将反转指示信息转换为虚拟位组; 以及用于根据预定的错误检查和校正编码方案为虚拟字生成错误校验码的纠错编码器,其中错误校验位的数目大于 在预定的错误校验和校正编码方案中至少一个纠错位的数量,映射使得虚拟位组的任何可能值和参考虚拟位组之间的汉明距离,其中 不能转换成映射为固定值,并且不大于错误校验和校正编码方案的纠错位数,虚拟字包括要输出的数据,虚拟位 - 对应于数据的组,以及被配置为由错误校验和校正编码方案所要求的固定值的至少一个填充位。
    • 4. 发明授权
    • Data bus system, its encoder/decoder and encoding/decoding method
    • 数据总线系统,其编码器/解码器和编码/解码方式
    • US08418047B2
    • 2013-04-09
    • US13446565
    • 2012-04-13
    • Wen Bo ShenChao-Jun LiuYi GeeQiang Liu
    • Wen Bo ShenChao-Jun LiuYi GeeQiang Liu
    • H04L1/00
    • G06F11/10
    • The present application relates to a data bus system, its encoder/decoder and encoding/decoding method. The data bus encoder comprises: a bus-invert encoder for generating encoded data and invert-indication information by performing bus-invert encoding on data according to a predetermined bus-invert encoding scheme; a virtual bit-group generator for converting the invert-indication information into a virtual bit-group according to a predetermined code mapping; and an error-checking-and-correction encoder for generating an error-checking-and-correction code for a virtual word according to a predetermined error-checking-and-correction encoding scheme, wherein the number of error-checking bits is more than the number of error-correction bits at least by one in the predetermined error-checking-and-correction encoding scheme, and the virtual word includes the data to be output, the virtual bit-group corresponding to the data, and at least one padding bit of a fixed value, which is configured as required by the error-checking-and-correction encoding scheme.
    • 本申请涉及数据总线系统,其编码器/解码器和编码/解码方法。 数据总线编码器包括:总线反转编码器,用于通过根据预定的总线反转编码方案对数据执行总线反转编码来产生编码数据和反转指示信息; 虚拟位组生成器,用于根据预定的代码映射将反转指示信息转换为虚拟位组; 以及用于根据预定的错误检查和校正编码方案为虚拟字生成错误校验码的纠错编码器,其中错误校验位的数目大于 在预定的错误校验和校正编码方案中至少一个纠错位的数量,虚拟字包括要输出的数据,对应于数据的虚拟位组,以及至少一个填充 位,其被配置为由错误校验和校正编码方案所要求的。