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    • 1. 发明授权
    • Reflective type liquid crystal panel and pixel structure thereof
    • 反射型液晶面板及其像素结构
    • US07388624B2
    • 2008-06-17
    • US11164024
    • 2005-11-08
    • Wei-Hsiao ChenHon-Yuan LeoCheng-Chi YenYao-Jen Tsai
    • Wei-Hsiao ChenHon-Yuan LeoCheng-Chi YenYao-Jen Tsai
    • G02F1/1335G02F1/1333
    • G02F1/136213G02F1/133553
    • A reflective type liquid crystal panel including a substrate, an array of transistors, capacitors, metal patterns, conductive walls, reflective pixel electrodes, an opposite substrate, and a liquid crystal layer is provided. The transistors and the capacitors are disposed on the substrate, and the capacitors are surrounding drain terminals of the corresponding transistors respectively. The metal patterns cover the corresponding transistors and overlap the corresponding capacitors respectively, and the metal patterns are electrically connected to the corresponding drain terminals respectively. The conductive walls surround the corresponding transistors and are connected between the corresponding metal patterns and the corresponding capacitors respectively. The reflective pixel electrodes are disposed over the corresponding metal patterns and electrically connected to the corresponding drain terminals respectively. The opposite substrate has a transparent electrode layer thereon, and the liquid crystal layer is disposed between the transparent electrode layer and the reflective pixel electrodes.
    • 提供了包括基板,晶体管阵列,电容器,金属图案,导电壁,反射像素电极,相对基板和液晶层的反射型液晶面板。 晶体管和电容器设置在衬底上,并且电容器分别是相应晶体管的周围的漏极端子。 金属图案分别覆盖对应的晶体管并与相应的电容器重叠,并且金属图案分别电连接到相应的漏极端子。 导电壁围绕对应的晶体管,分别连接在相应的金属图案和相应的电容器之间。 反射像素电极设置在相应的金属图案上并分别电连接到相应的漏极端子。 相对基板上具有透明电极层,液晶层设置在透明电极层和反射像素电极之间。
    • 3. 发明申请
    • REFLECTIVE TYPE LIQUID CRYSTAL PANEL AND PIXEL STRUCTURE THEREOF
    • 反射型液晶面板及其像素结构
    • US20070103621A1
    • 2007-05-10
    • US11164024
    • 2005-11-08
    • Wei-Hsiao ChenHon-Yuan LeoCheng-Chi YenYao-Jen Tsai
    • Wei-Hsiao ChenHon-Yuan LeoCheng-Chi YenYao-Jen Tsai
    • G02F1/1335
    • G02F1/136213G02F1/133553
    • A reflective type liquid crystal panel including a substrate, an array of transistors, capacitors, metal patterns, conductive walls, reflective pixel electrodes, an opposite substrate, and a liquid crystal layer is provided. The transistors and the capacitors are disposed on the substrate, and the capacitors are surrounding drain terminals of the corresponding transistors respectively. The metal patterns cover the corresponding transistors and overlap the corresponding capacitors respectively, and the metal patterns are electrically connected to the corresponding drain terminals respectively. The conductive walls surround the corresponding transistors and are connected between the corresponding metal patterns and the corresponding capacitors respectively. The reflective pixel electrodes are disposed over the corresponding metal patterns and electrically connected to the corresponding drain terminals respectively. The opposite substrate has a transparent electrode layer thereon, and the liquid crystal layer is disposed between the transparent electrode layer and the reflective pixel electrodes.
    • 提供了包括基板,晶体管阵列,电容器,金属图案,导电壁,反射像素电极,相对基板和液晶层的反射型液晶面板。 晶体管和电容器设置在衬底上,并且电容器分别是相应晶体管的周围的漏极端子。 金属图案分别覆盖对应的晶体管并与相应的电容器重叠,并且金属图案分别电连接到相应的漏极端子。 导电壁围绕对应的晶体管,分别连接在相应的金属图案和相应的电容器之间。 反射像素电极设置在相应的金属图案上并分别电连接到相应的漏极端子。 相对基板上具有透明电极层,液晶层设置在透明电极层和反射像素电极之间。
    • 6. 发明申请
    • LIQUID CRYSTAL ON SILICON PANEL
    • 液晶面板上的液晶
    • US20090267877A1
    • 2009-10-29
    • US12111583
    • 2008-04-29
    • Cheng-Chi YenYih-Long TsengHon-Yuan LeoJu-Tien Cheng
    • Cheng-Chi YenYih-Long TsengHon-Yuan LeoJu-Tien Cheng
    • G09G3/36
    • G09G3/006G09G3/3648G09G3/3674G09G3/3685G09G2300/0426G09G2310/0297
    • The LCoS panel includes a display region, an odd and an even data drivers, and a data-line testing unit. The display region includes a plurality of pixel cells formed at each intersection of a plurality of scan lines and a plurality of data lines. The data lines include a plurality of odd data lines coupled to a plurality of first data channels of the odd data driver, and the data lines include a plurality of even data lines coupled to a plurality of second data channels of the even data driver. The odd and the even data drivers are arranged in a first side of the display region. The data-line testing unit is arranged in a second side of the display region opposite to the first side for selectively outputting a data-line testing signal corresponding to one of the data lines according to a data-line selecting signal.
    • LCoS面板包括显示区域,奇数和偶数数据驱动器以及数据线测试单元。 显示区域包括形成在多个扫描线和多条数据线的每个交叉处的多个像素单元。 数据线包括耦合到奇数数据驱动器的多个第一数据通道的多个奇数数据线,并且数据线包括耦合到偶数数据驱动器的多个第二数据通道的多个偶数数据线。 奇数和偶数数据驱动器被布置在显示区域的第一侧。 数据线测试单元布置在与第一侧相对的显示区域的第二侧,用于根据数据线选择信号有选择地输出与数据线之一相对应的数据线测试信号。
    • 7. 发明申请
    • CONNECTION TESTING APPARATUS AND METHOD AND CHIP USING THE SAME
    • 连接测试装置和使用它的方法和芯片
    • US20090079457A1
    • 2009-03-26
    • US11860754
    • 2007-09-25
    • Ju-Tien ChengYih-Long TsengHon-Yuan LeoCheng-Chi Yen
    • Ju-Tien ChengYih-Long TsengHon-Yuan LeoCheng-Chi Yen
    • G01R31/02
    • G01R31/2853G01R31/31717G01R31/318505G01R31/31905
    • A connection testing apparatus, a connection testing method, and a chip using the same are provided. The method can be used for testing connections between chips, so as to solve the problems that a conventional multi-chip connection test needs a plenty of test patterns, resulting in a long test time and a high test cost, and the condition of a connection failure is hard to be analyzed after a test failure. In the present invention, a voltage variation caused when an ESD element in a chip is conducted and a comparison circuits are used to determine whether a connection is correct. Furthermore, the test apparatus is built in the chip, so that the connection test may be accomplished quickly and efficiently. Once a connection failure occurs, the failed connection pin can also be found, so as to be favorable for engineering analysis and thereby effectively saving the test cost.
    • 提供了一种连接测试装置,连接测试方法以及使用它们的芯片。 该方法可用于测试芯片之间的连接,以解决常规多芯片连接测试需要大量测试模式的问题,导致测试时间长,测试成本高,连接条件 测试失败后,故障难以分析。 在本发明中,当芯片中的ESD元件被导通时引起的电压变化,并且使用比较电路来确定连接是否正确。 此外,测试装置内置在芯片中,使得连接测试可以快速有效地完成。 一旦发生连接故障,也可以找到故障连接引脚,从而有利于工程分析,从而有效节省测试成本。
    • 9. 发明授权
    • Connection testing apparatus and method and chip using the same
    • 连接测试仪器和方法与芯片采用相同
    • US07683607B2
    • 2010-03-23
    • US11860754
    • 2007-09-25
    • Ju-Tien ChengYih-Long TsengHon-Yuan LeoCheng-Chi Yen
    • Ju-Tien ChengYih-Long TsengHon-Yuan LeoCheng-Chi Yen
    • H01L23/58
    • G01R31/2853G01R31/31717G01R31/318505G01R31/31905
    • A connection testing apparatus, a connection testing method, and a chip using the same are provided. The method can be used for testing connections between chips, so as to solve the problems that a conventional multi-chip connection test needs a plenty of test patterns, resulting in a long test time and a high test cost, and the condition of a connection failure is hard to be analyzed after a test failure. In the present invention, a voltage variation caused when an ESD element in a chip is conducted and a comparison circuits are used to determine whether a connection is correct. Furthermore, the test apparatus is built in the chip, so that the connection test may be accomplished quickly and efficiently. Once a connection failure occurs, the failed connection pin can also be found, so as to be favorable for engineering analysis and thereby effectively saving the test cost.
    • 提供了一种连接测试装置,连接测试方法以及使用它们的芯片。 该方法可用于测试芯片之间的连接,以解决常规多芯片连接测试需要大量测试模式的问题,导致测试时间长,测试成本高,连接条件 测试失败后,故障难以分析。 在本发明中,当芯片中的ESD元件被导通时引起的电压变化,并且使用比较电路来确定连接是否正确。 此外,测试装置内置在芯片中,使得连接测试可以快速有效地完成。 一旦发生连接故障,也可以找到故障连接引脚,从而有利于工程分析,从而有效节省测试成本。