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1. 发明申请

US20100276658A1 Resistive Memory Structure with Buffer Layer 有权
标题翻译：具有缓冲层的电阻式存储器结构
公开(公告)号：US20100276658A1
公开(公告)日：2010-11-04
申请号：US12836304
申请日：2010-07-14
申请人： Wei-Chih Chien , Kuo-Pin Chang , Erh-Kun Lai , Kuang Yeu Hsieh
发明人： Wei-Chih Chien , Kuo-Pin Chang , Erh-Kun Lai , Kuang Yeu Hsieh
IPC分类号： H01L45/00
CPC分类号： H01L45/04 , H01L45/085 , H01L45/12 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148 , H01L45/1625 , H01L45/1633 , Y10S438/90
摘要： A memory device comprises first and second electrodes with a memory element and a buffer layer located between and electrically coupled to them. The memory element comprises one or more metal oxygen compounds. The buffer layer comprises at least one of an oxide and a nitride. Another memory device comprises first and second electrodes with a memory element and a buffer layer, having a thickness of less than 50 Å, located between and electrically coupled to them. The memory comprises one or more metal oxygen compounds. An example of a method of fabricating a memory device includes forming first and second electrodes. A memory, located between and electrically coupled to the first and the second electrodes, is formed; the memory comprises one or more metal oxygen compounds and the buffer layer comprises at least one of an oxide and a nitride.
摘要翻译：存储器件包括具有存储元件的第一和第二电极以及位于它们之间并与之电耦合的缓冲层。记忆元件包括一种或多种金属氧化合物。缓冲层包括氧化物和氮化物中的至少一种。另一个存储器件包括具有存储元件和缓冲层的第一和第二电极，其厚度小于50，位于它们之间并与之电耦合。记忆体包括一种或多种金属氧化合物。制造存储器件的方法的一个例子包括形成第一和第二电极。形成位于第一和第二电极之间并电耦合到第一和第二电极的存储器; 存储器包括一种或多种金属氧化合物，并且缓冲层包括氧化物和氮化物中的至少一种。

2. 发明申请

US20110189819A1 Resistive Memory Structure with Buffer Layer 审中-公开
标题翻译：具有缓冲层的电阻式存储器结构
公开(公告)号：US20110189819A1
公开(公告)日：2011-08-04
申请号：US13083450
申请日：2011-04-08
申请人： Wei-Chih Chien , Kuo-Pin Chang , Erh-Kun Lai , Kuang Yeu Hsieh
发明人： Wei-Chih Chien , Kuo-Pin Chang , Erh-Kun Lai , Kuang Yeu Hsieh
IPC分类号： H01L21/8239
CPC分类号： H01L45/04 , H01L45/085 , H01L45/12 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148 , H01L45/1625 , H01L45/1633 , Y10S438/90
摘要： A memory device comprises first and second electrodes with a memory element and a buffer layer located between and electrically coupled to them. The memory element comprises one or more metal oxygen compounds. The buffer layer comprises at least one of an oxide and a nitride. Another memory device comprises first and second electrodes with a memory element and a buffer layer, having a thickness of less than 50 Å, located between and electrically coupled to them. The memory comprises one or more metal oxygen compounds. An example of a method of fabricating a memory device includes forming first and second electrodes. A memory, located between and electrically coupled to the first and the second electrodes, is formed; the memory comprises one or more metal oxygen compounds and the buffer layer comprises at least one of an oxide and a nitride.
摘要翻译：存储器件包括具有存储元件的第一和第二电极以及位于它们之间并与之电耦合的缓冲层。记忆元件包括一种或多种金属氧化合物。缓冲层包括氧化物和氮化物中的至少一种。另一个存储器件包括具有存储元件和缓冲层的第一和第二电极，其厚度小于50，位于它们之间并与之电耦合。记忆体包括一种或多种金属氧化合物。制造存储器件的方法的一个例子包括形成第一和第二电极。形成位于第一和第二电极之间并电耦合到第一和第二电极的存储器; 存储器包括一种或多种金属氧化合物，并且缓冲层包括氧化物和氮化物中的至少一种。

3. 发明授权

US07943920B2 Resistive memory structure with buffer layer 有权
标题翻译：具有缓冲层的电阻式存储器结构
公开(公告)号：US07943920B2
公开(公告)日：2011-05-17
申请号：US12836304
申请日：2010-07-14
申请人： Wei-Chih Chien , Kuo-Pin Chang , Erh-Kun Lai , Kuang Yeu Hsieh
发明人： Wei-Chih Chien , Kuo-Pin Chang , Erh-Kun Lai , Kuang Yeu Hsieh
IPC分类号： H01L29/04
CPC分类号： H01L45/04 , H01L45/085 , H01L45/12 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148 , H01L45/1625 , H01L45/1633 , Y10S438/90
摘要： A memory device comprises first and second electrodes with a memory element and a buffer layer located between and electrically coupled to them. The memory element comprises one or more metal oxygen compounds. The buffer layer comprises at least one of an oxide and a nitride. Another memory device comprises first and second electrodes with a memory element and a buffer layer, having a thickness of less than 50 Å, located between and electrically coupled to them. The memory comprises one or more metal oxygen compounds. An example of a method of fabricating a memory device includes forming first and second electrodes. A memory, located between and electrically coupled to the first and the second electrodes, is formed; the memory comprises one or more metal oxygen compounds and the buffer layer comprises at least one of an oxide and a nitride.
摘要翻译：存储器件包括具有存储元件的第一和第二电极以及位于它们之间并与之电耦合的缓冲层。记忆元件包括一种或多种金属氧化合物。缓冲层包括氧化物和氮化物中的至少一种。另一个存储器件包括具有存储元件和缓冲层的第一和第二电极，其厚度小于50，位于它们之间并与之电耦合。记忆体包括一种或多种金属氧化合物。制造存储器件的方法的一个例子包括形成第一和第二电极。形成位于第一和第二电极之间并电耦合到第一和第二电极的存储器; 存储器包括一种或多种金属氧化合物，并且缓冲层包括氧化物和氮化物中的至少一种。

4. 发明授权

US07777215B2 Resistive memory structure with buffer layer 有权
标题翻译：具有缓冲层的电阻式存储器结构
公开(公告)号：US07777215B2
公开(公告)日：2010-08-17
申请号：US12176183
申请日：2008-07-18
申请人： Wei-Chih Chien , Kuo-Pin Chang , Erh-Kun Lai , Kuang Yeu Hsieh
发明人： Wei-Chih Chien , Kuo-Pin Chang , Erh-Kun Lai , Kuang Yeu Hsieh
IPC分类号： H01L47/00
CPC分类号： H01L45/04 , H01L45/085 , H01L45/12 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148 , H01L45/1625 , H01L45/1633 , Y10S438/90
摘要： A memory device comprises first and second electrodes with a memory element and a buffer layer located between and electrically coupled to them. The memory element comprises one or more metal oxygen compounds. The buffer layer comprises at least one of an oxide and a nitride. Another memory device comprises first and second electrodes with a memory element and a buffer layer, having a thickness of less than 50 Å, located between and electrically coupled to them. The memory comprises one or more metal oxygen compounds. An example of a method of fabricating a memory device includes forming first and second electrodes. A memory, located between and electrically coupled to the first and the second electrodes, is formed; the memory comprises one or more metal oxygen compounds and the buffer layer comprises at least one of an oxide and a nitride.
摘要翻译：存储器件包括具有存储元件的第一和第二电极以及位于它们之间并与之电耦合的缓冲层。记忆元件包括一种或多种金属氧化合物。缓冲层包括氧化物和氮化物中的至少一种。另一个存储器件包括具有存储元件和缓冲层的第一和第二电极，其厚度小于50，位于它们之间并与之电耦合。记忆体包括一种或多种金属氧化合物。制造存储器件的方法的一个例子包括形成第一和第二电极。形成位于第一和第二电极之间并电耦合到第一和第二电极的存储器; 存储器包括一种或多种金属氧化合物，并且缓冲层包括氧化物和氮化物中的至少一种。

5. 发明申请

US20090020740A1 RESISTIVE MEMORY STRUCTURE WITH BUFFER LAYER 有权
标题翻译：电阻记忆结构与缓冲层
公开(公告)号：US20090020740A1
公开(公告)日：2009-01-22
申请号：US12176183
申请日：2008-07-18
申请人： Wei-Chih CHIEN , Kuo-Pin Chang , Erh-Kun Lai , Kuang Yeu Hsieh
发明人： Wei-Chih CHIEN , Kuo-Pin Chang , Erh-Kun Lai , Kuang Yeu Hsieh
IPC分类号： H01L47/00 , H01L21/00
CPC分类号： H01L45/04 , H01L45/085 , H01L45/12 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148 , H01L45/1625 , H01L45/1633 , Y10S438/90
摘要： A memory device comprises first and second electrodes with a memory element and a buffer layer located between and electrically coupled to them. The memory element comprises one or more metal oxygen compounds. The buffer layer comprises at least one of an oxide and a nitride. Another memory device comprises first and second electrodes with a memory element and a buffer layer, having a thickness of less than 50 Å, located between and electrically coupled to them. The memory comprises one or more metal oxygen compounds. An example of a method of fabricating a memory device includes forming first and second electrodes. A memory, located between and electrically coupled to the first and the second electrodes, is formed; the memory comprises one or more metal oxygen compounds and the buffer layer comprises at least one of an oxide and a nitride.
摘要翻译：存储器件包括具有存储元件的第一和第二电极以及位于它们之间并与之电耦合的缓冲层。记忆元件包括一种或多种金属氧化合物。缓冲层包括氧化物和氮化物中的至少一种。另一个存储器件包括具有存储元件和缓冲层的第一和第二电极，其厚度小于50，位于它们之间并与之电耦合。记忆体包括一种或多种金属氧化合物。制造存储器件的方法的一个例子包括形成第一和第二电极。形成位于第一和第二电极之间并电耦合到第一和第二电极的存储器; 存储器包括一种或多种金属氧化合物，并且缓冲层包括氧化物和氮化物中的至少一种。

6. 发明授权

US09018615B2 Resistor random access memory structure having a defined small area of electrical contact 有权
标题翻译：电阻随机存取存储器结构具有限定的小的电接触面积
公开(公告)号：US09018615B2
公开(公告)日：2015-04-28
申请号：US11833563
申请日：2007-08-03
申请人： Erh-Kun Lai , ChiaHua Ho , Kuang Yeu Hsieh
发明人： Erh-Kun Lai , ChiaHua Ho , Kuang Yeu Hsieh
IPC分类号： H01L47/00 , H01L45/00
CPC分类号： H01L45/16 , H01L45/06 , H01L45/1233 , H01L45/1273 , H01L45/144
摘要： A memory cell device, of the type that includes a memory material switchable between electrical property states by application of energy, includes first and second electrodes, a plug of memory material (such as phase change material) which is in electrical contact with the second electrode, and an electrically conductive film which is supported by a dielectric form and which is in electrical contact with the first electrode and with the memory material plug. The dielectric form is wider near the first electrode, and is narrower near the phase change plug. The area of contact of the conductive film with the phase change plug is defined in part by the geometry of the dielectric form over which the conductive film is formed. Also, methods for making the device include steps of constructing a dielectric form over a first electrode, and forming a conductive film over the dielectric form.
摘要翻译：包括能够通过施加能量在电性能状态之间切换的存储材料的存储单元装置包括第一和第二电极，与第二电极电接触的存储材料（例如相变材料）插头以及由电介质形式支撑并与第一电极和记忆材料塞电接触的导电膜。电介质形式在第一电极附近较宽，在相变插头附近较窄。导电膜与相变插塞的接触面积部分地由形成导电膜的电介质形状的几何形状限定。此外，制造该器件的方法包括在第一电极上构建电介质形式，以及在电介质形式上形成导电膜的步骤。

7. 发明授权

US08587983B2 Resistance random access memory structure for enhanced retention 有权
标题翻译：电阻随机存取存储器结构，增强保留
公开(公告)号：US08587983B2
公开(公告)日：2013-11-19
申请号：US13281266
申请日：2011-10-25
申请人： ChiaHua Ho , Erh-Kun Lai , Kuang Yeu Hsieh
发明人： ChiaHua Ho , Erh-Kun Lai , Kuang Yeu Hsieh
IPC分类号： H01L45/00
CPC分类号： H01L45/1608 , H01L45/04 , H01L45/06 , H01L45/12 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/1625
摘要： A bistable resistance random access memory is described for enhancing the data retention in a resistance random access memory member. A dielectric member, e.g. the bottom dielectric member, underlies the resistance random access memory member which improves the SET/RESET window in the retention of information. The deposition of the bottom dielectric member is carried out by a plasma-enhanced chemical vapor deposition or by high-density-plasma chemical vapor deposition. One suitable material for constructing the bottom dielectric member is a silicon oxide. The bistable resistance random access memory includes a bottom dielectric member disposed between a resistance random access member and a bottom electrode or bottom contact plug. Additional layers including a bit line, a top contact plug, and a top electrode disposed over the top surface of the resistance random access memory member. Sides of the top electrode and the resistance random access memory member are substantially aligned with each other.
摘要翻译：描述了双稳态电阻随机存取存储器，用于增强电阻随机存取存储器件中的数据保持。电介质构件，例如底部电介质构件位于电阻随机存取存储器构件的下方，其改善了保留信息中的SET / RESET窗口。底部电介质构件的沉积通过等离子体增强化学气相沉积或通过高密度 - 等离子体化学气相沉积来进行。用于构造底部电介质构件的一种合适的材料是氧化硅。双稳态随机存取存储器包括设置在电阻随机存取构件和底部电极或底部接触插塞之间的底部电介质构件。附加层包括位线，顶部接触插塞和设置在电阻随机存取存储器构件顶表面上的顶部电极。顶部电极和电阻随机存取存储器构件的侧面基本上彼此对准。

8. 发明授权

US08324681B2 Stacked non-volatile memory device and methods for fabricating the same 有权
标题翻译：堆叠的非易失性存储器件及其制造方法
公开(公告)号：US08324681B2
公开(公告)日：2012-12-04
申请号：US13162386
申请日：2011-06-16
申请人： Erh-Kun Lai , Hang-Ting Lue , Kuang Yeu Hsieh
发明人： Erh-Kun Lai , Hang-Ting Lue , Kuang Yeu Hsieh
IPC分类号： H01L29/792
CPC分类号： H01L21/28282 , H01L21/8221 , H01L21/84 , H01L27/0688 , H01L27/115 , H01L27/11568 , H01L27/11578 , H01L27/1203 , H01L29/792
摘要： A stacked non-volatile memory device comprises a plurality of bit line and word line layers stacked on top of each other. The bit line layers comprise a plurality of bit lines that can be formed using advanced processing techniques making fabrication of the device efficient and cost effective. The device can be configured for NAND operation.
摘要翻译：堆叠的非易失性存储器件包括堆叠在彼此顶部的多个位线和字线层。位线层包括多个位线，其可以使用先进的处理技术形成，从而使器件的制造成本高效且成本有效。该器件可以配置为NAND操作。

9. 发明申请

US20120037876A1 Resistance Random Access Memory Structure for Enhanced Retention 有权
标题翻译：电阻随机存取存储结构，用于增强保留
公开(公告)号：US20120037876A1
公开(公告)日：2012-02-16
申请号：US13281266
申请日：2011-10-25
申请人： ChiaHua Ho , Erh-Kun Lai , Kuang Yeu Hsieh
发明人： ChiaHua Ho , Erh-Kun Lai , Kuang Yeu Hsieh
IPC分类号： H01L45/00
CPC分类号： H01L45/1608 , H01L45/04 , H01L45/06 , H01L45/12 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/1625
摘要： A bistable resistance random access memory is described for enhancing the data retention in a resistance random access memory member. A dielectric member, e.g. the bottom dielectric member, underlies the resistance random access memory member which improves the SET/RESET window in the retention of information. The deposition of the bottom dielectric member is carried out by a plasma-enhanced chemical vapor deposition or by high-density-plasma chemical vapor deposition. One suitable material for constructing the bottom dielectric member is a silicon oxide. The bistable resistance random access memory includes a bottom dielectric member disposed between a resistance random access member and a bottom electrode or bottom contact plug. Additional layers including a bit line, a top contact plug, and a top electrode disposed over the top surface of the resistance random access memory member. Sides of the top electrode and the resistance random access memory member are substantially aligned with each other.
摘要翻译：描述了双稳态电阻随机存取存储器，用于增强电阻随机存取存储器件中的数据保持。电介质构件，例如底部介电构件位于电阻随机存取存储器构件的下方，其改善了保持信息中的SET / RESET窗口。底部电介质构件的沉积通过等离子体增强化学气相沉积或通过高密度 - 等离子体化学气相沉积来进行。用于构造底部电介质构件的一种合适的材料是氧化硅。双稳态随机存取存储器包括设置在电阻随机存取构件和底部电极或底部接触插塞之间的底部电介质构件。附加层包括位线，顶部接触插塞和设置在电阻随机存取存储器构件顶表面上的顶部电极。顶部电极和电阻随机存取存储器构件的侧面基本上彼此对准。

10. 发明授权

US08110429B2 Bridge resistance random access memory device and method with a singular contact structure 有权
标题翻译：桥接电阻随机存取存储器件及具有单一接触结构的方法
公开(公告)号：US08110429B2
公开(公告)日：2012-02-07
申请号：US12558401
申请日：2009-10-02
申请人： ChiaHua Ho , Erh-Kun Lai , Kuang Yeu Hsieh
发明人： ChiaHua Ho , Erh-Kun Lai , Kuang Yeu Hsieh
IPC分类号： H01L21/00 , H01L45/00 , H01L21/441
CPC分类号： H01L45/04 , H01L27/2436 , H01L45/06 , H01L45/1226 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/16
摘要： A resistance random access memory in a bridge structure is disclosed that comprises a contact structure where first and second electrodes are located within the contact structure. The first electrode has a circumferential extending shape, such as an annular shape, surrounding an inner wall of the contact structure. The second electrode is located within an interior of the circumferential extending shape and separated from the first electrode by an insulating material. A resistance memory bridge is in contact with an edge surface of the first and second electrodes. The first electrode in the contact structure is connected to a transistor and the second electrode in the contact structure is connected to a bit line. A bit line is connected to the second electrode by a self-aligning process.
摘要翻译：公开了一种桥结构中的电阻随机存取存储器，其包括其中第一和第二电极位于接触结构内的接触结构。第一电极具有围绕接触结构的内壁的周向延伸形状，例如环形形状。第二电极位于周向延伸形状的内部，并通过绝缘材料与第一电极分离。电阻记忆桥与第一和第二电极的边缘表面接触。接触结构中的第一电极连接到晶体管，并且接触结构中的第二电极连接到位线。位线通过自对准工艺连接到第二电极。

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