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1. 发明授权

US07436219B2 Level shifter circuit 有权
标题翻译：电平移位电路
公开(公告)号：US07436219B2
公开(公告)日：2008-10-14
申请号：US11462998
申请日：2006-08-07
申请人： Wei-Chieh Chen , Kai-Ming Liu , Chen-Hsien Han , Wei-Yang Ou , Sung-En Liu
发明人： Wei-Chieh Chen , Kai-Ming Liu , Chen-Hsien Han , Wei-Yang Ou , Sung-En Liu
IPC分类号： H03K19/0175
CPC分类号： H03K19/018521 , H03M1/76
摘要： A level shifter circuit includes: K level shifter units for receiving K input signals having a first voltage level range and outputting K output signals having a second voltage level range, wherein the second voltage level range is greater than the first voltage level range. Each level shifter unit is utilized to output an output signal at an output end and includes: a first switch, coupled between the output end and a first voltage source for controlling the electrical connection between the first voltage source and the output end according to an input signal; and (K−1) second switches, connected in parallel between the output end and a second voltage source, for respectively controlling its ON/OFF status according to (K−1) output signals except for the output signal. K is an integer.
摘要翻译：电平移位器电路包括：K个电平移位器单元，用于接收具有第一电压电平范围的K个输入信号，并输出具有第二电压电平范围的K个输出信号，其中第二电压电平范围大于第一电压电平范围。每个电平移位器单元用于在输出端输出输出信号，包括：第一开关，耦合在输出端和第一电压源之间，用于根据输入端控制第一电压源与输出端之间的电连接信号; 和（K-1）个第二开关，并联连接在输出端和第二电压源之间，用于分别根据（K-1）除了输出信号之外的输出信号来控制其ON / OFF状态。 K是一个整数。

2. 发明申请

US20080030253A1 LEVEL SHIFTER CIRCUIT 有权
标题翻译：水平更换电路
公开(公告)号：US20080030253A1
公开(公告)日：2008-02-07
申请号：US11462998
申请日：2006-08-07
申请人： Wei-Chieh Chen , Kai-Ming Liu , Chen-Hsien Han , Wei-Yang Ou , Sung-En Liu
发明人： Wei-Chieh Chen , Kai-Ming Liu , Chen-Hsien Han , Wei-Yang Ou , Sung-En Liu
IPC分类号： H03L5/00
CPC分类号： H03K19/018521 , H03M1/76
摘要： A level shifter circuit includes: K level shifter units for receiving K input signals having a first voltage level range and outputting K output signals having a second voltage level range, wherein the second voltage level range is greater than the first voltage level range. Each level shifter unit is utilized to output an output signal at an output end and includes: a first switch, coupled between the output end and a first voltage source for controlling the electrical connection between the first voltage source and the output end according to an input signal; and (K-1) second switches, connected in parallel between the output end and a second voltage source, for respectively controlling its ON/OFF status according to (K-1) output signals except for the output signal. K is an integer.
摘要翻译：电平移位器电路包括：K个电平移位器单元，用于接收具有第一电压电平范围的K个输入信号，并输出具有第二电压电平范围的K个输出信号，其中第二电压电平范围大于第一电压电平范围。每个电平移位器单元用于在输出端输出输出信号，包括：第一开关，耦合在输出端和第一电压源之间，用于根据输入端控制第一电压源与输出端之间的电连接信号; 和（K-1）个第二开关，并联连接在输出端和第二电压源之间，用于分别根据（K-1）除了输出信号之外的输出信号来控制其ON / OFF状态。 K是一个整数。

3. 发明申请

US20070296499A1 AMPLIFIER CIRCUIT HAVING A COMPENSATION CIRCUIT COUPLED TO AN OUTPUT NODE OF AN OPERATIONAL AMPLIFIER FOR IMPROVING LOOP STABILITY 审中-公开
标题翻译：具有与用于提高环路稳定性的操作放大器的输出节点相连的补偿电路的放大器电路
公开(公告)号：US20070296499A1
公开(公告)日：2007-12-27
申请号：US11423449
申请日：2006-06-11
申请人： Ming-Huang Liu , Kai-Ming Liu , Chen-Hsien Han , Meng-Yong Lin , Sung-En Liu , Chi-Mo Huang
发明人： Ming-Huang Liu , Kai-Ming Liu , Chen-Hsien Han , Meng-Yong Lin , Sung-En Liu , Chi-Mo Huang
IPC分类号： H03F3/45
CPC分类号： H03F3/45192 , H03F1/083 , H03F2200/153 , H03F2203/45302 , H03F2203/45466
摘要： An amplifier circuit includes an operational amplifier and a compensation circuit. The operational amplifier includes an amplifying stage for amplifying an input signal to generate an amplifying signal; and an output stage coupled to an output node of the amplifying stage for receiving the amplifying signal and generating an output signal according to the amplifying signal. The compensation circuit is coupled to the output stage and the amplifying stage for generating a compensation signal according to the output signal, and feeding the compensation signal back to the output node of the amplifying stage for compensating the amplifying signal.
摘要翻译：放大器电路包括运算放大器和补偿电路。运算放大器包括用于放大输入信号以产生放大信号的放大级; 以及耦合到放大级的输出节点的输出级，用于接收放大信号，并根据放大信号产生输出信号。补偿电路耦合到输出级和放大级，用于根据输出信号产生补偿信号，并将补偿信号送回放大级的输出节点，以补偿放大信号。

4. 发明申请

US20130239077A1 LVS Implementation for FinFET Design 有权
标题翻译： FinFET设计的LVS实现
公开(公告)号：US20130239077A1
公开(公告)日：2013-09-12
申请号：US13415648
申请日：2012-03-08
申请人： You-Jiun Wang , Kai-Ming Liu
发明人： You-Jiun Wang , Kai-Ming Liu
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , H01L29/66795
摘要： A method includes converting an active region in a layout of an integrated circuit into a fin-based structure that has a fin. The active region belongs to an integrated circuit device, and has a planar layout structure. The method further includes extracting a Resistance-Capacitance (RC) loading of the integrated circuit device using the parameters of the fin-based structure. The steps of converting and extracting are performed by a computer.
摘要翻译：一种方法包括将集成电路的布局中的有源区转换为具有鳍的鳍式结构。有源区属于集成电路器件，具有平面布局结构。该方法还包括使用鳍式结构的参数提取集成电路器件的电阻 - 电容（RC）负载。转换和提取的步骤由计算机执行。

5. 发明授权

US08631382B2 LVS implementation for FinFET design 有权
标题翻译： FinFET设计的LVS实现
公开(公告)号：US08631382B2
公开(公告)日：2014-01-14
申请号：US13415648
申请日：2012-03-08
申请人： You-Jiun Wang , Kai-Ming Liu
发明人： You-Jiun Wang , Kai-Ming Liu
IPC分类号： G06F11/22 , G06F17/50
CPC分类号： G06F17/5068 , H01L29/66795
摘要： A method includes converting an active region in a layout of an integrated circuit into a fin-based structure that has a fin. The active region belongs to an integrated circuit device, and has a planar layout structure. The method further includes extracting a Resistance-Capacitance (RC) loading of the integrated circuit device using the parameters of the fin-based structure. The steps of converting and extracting are performed by a computer.
摘要翻译：一种方法包括将集成电路的布局中的有源区转换为具有鳍的鳍式结构。有源区属于集成电路器件，具有平面布局结构。该方法还包括使用鳍式结构的参数提取集成电路器件的电阻 - 电容（RC）负载。转换和提取的步骤由计算机执行。

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