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1. 发明公开

US20240219995A1 CHARGE ISOLATION ARCHITECTURE IN VOLTAGE REGULATOR FOR IMPROVED BATTERY LIFE, RESPONSIVENESS AND REDUCED ACOUSTIC NOISE 审中-公开
公开(公告)号：US20240219995A1
公开(公告)日：2024-07-04
申请号：US18091207
申请日：2022-12-29
申请人： Wei Chang Tan , Chuen Ming Tan , Philip R. Lehwalder , Patrick K. Leung
发明人： Wei Chang Tan , Chuen Ming Tan , Philip R. Lehwalder , Patrick K. Leung
IPC分类号： G06F1/3296 , G05F1/575
CPC分类号： G06F1/3296 , G05F1/575
摘要： Embodiments herein relate to a voltage regulator (VR) circuit which reduces power consumption and latency when an associated system on a chip (SoC) or other processor transitions between active and idle states. The circuit includes bulk capacitors coupled to a power output rail of the VR, and switches which isolate the capacitors when the SoC is in the idle state. The capacitors maintain their charge so they do not have to be charged up in an idle to active state transition. In this transition, the voltage on the output power rail can be monitored and the switches can be turned on to remove the isolation when the voltage reaches a threshold level. A VR controller can subsequently provide a power good signal to the SoC to allow it to begin performing operations in the active state.

2. 发明授权

US07376854B2 System for enabling and disabling voltage regulator controller of electronic appliance according to a series of delay times assigned to voltage regulator controllers 有权
标题翻译：根据分配给电压调节器控制器的一系列延迟时间启用和禁用电子设备的电压调节器控制器的系统
公开(公告)号：US07376854B2
公开(公告)日：2008-05-20
申请号：US10816438
申请日：2004-03-31
申请人： Philip R. Lehwalder , Erik W. Peter
发明人： Philip R. Lehwalder , Erik W. Peter
IPC分类号： G06F1/26
CPC分类号： G06F1/26
摘要： In some embodiments, a method, apparatus and system for enabling and disabling voltage regulator controllers are generally presented. In this regard, a sequencer agent is introduced to selectively enable or disable the outputs of voltage regulator controllers in an electronic appliance based at least in part on settings stored in non-volatile memory. Other embodiments are discussed and claimed.
摘要翻译：在一些实施例中，通常呈现用于启用和禁用电压调节器控制器的方法，装置和系统。在这方面，引入定序器代理以至少部分地基于存储在非易失性存储器中的设置选择性地启用或禁用电子设备中的电压调节器控制器的输出。讨论和要求保护其他实施例。

3. 发明授权

US06839787B2 Method and apparatus for BIOS control of electrical device address/identification assignments 失效
标题翻译：用于电气设备地址/识别分配的BIOS控制的方法和装置
公开(公告)号：US06839787B2
公开(公告)日：2005-01-04
申请号：US10449530
申请日：2003-05-29
申请人： Philip R. Lehwalder , Brad A. Barmore
发明人： Philip R. Lehwalder , Brad A. Barmore
IPC分类号： G06F3/16 , G06F13/00 , H05K7/10
CPC分类号： G06F3/162
摘要： A method and device are provided for managing a group of electrical devices, e.g., coder/decoders (codecs) in a computer system, including enabling and disabling a primary electrical device. An address ID module assigns a primary address to designate one of the devices as a primary device. The primary device performs certain functions that are only performed by a single device. Other devices are designated as secondary devices. A signal control circuit receives a BIOS-controlled signal as an input, and outputs a presence signal indicating whether the original primary electrical device is enabled or disabled. If the original primary device is disabled, the address ID module designates one of the secondary devices as the new primary device, and the other secondary devices remain secondary. The new primary device performs certain functions of the original primary device.

4. 发明授权

US07124208B2 Method and apparatus for enumerating devices on a link 失效
标题翻译：用于枚举链路上的设备的方法和装置
公开(公告)号：US07124208B2
公开(公告)日：2006-10-17
申请号：US10417856
申请日：2003-04-17
申请人： Brent D. Chartrand , Philip R. Lehwalder , Alberto J. Martinez
发明人： Brent D. Chartrand , Philip R. Lehwalder , Alberto J. Martinez
IPC分类号： G06F3/00
CPC分类号： G06F3/162
摘要： Embodiments of the present invention provide for enumerating codecs on a link. A controller asserts a synchronization signal, and drives one or more control lines associated with selected codecs to a first state. The enumeration period is defined by a predefined number of clock periods after de-assertion of the synchronization signal. During the enumeration period, the controller drives the control lines of codecs that are supported to a second state. If the control line for a codec is not pulled to the second state during the enumeration period, that codec will act disabled, ignoring all inputs, and will not participate in any link activity, until the next reset, where it will again look for an assertion of its control line.
摘要翻译：本发明的实施例提供了在链路上枚举编解码器。控制器断言同步信号，并将与所选编解码器相关联的一个或多个控制线驱动到第一状态。枚举周期由同步信号解除断言之后的预定数量的时钟周期定义。在枚举期间，控制器将支持的编解码器的控制线驱动到第二状态。如果在枚举期间编解码器的控制线没有被拉到第二个状态，则该编解码器将被禁用，忽略所有输入，并且不会参与任何链接活动，直到下一次重置，在那里它将再次寻找一个断言其控制线。

5. 发明授权

US06609170B1 Method and apparatus for BIOS control of electrical device address/identification assignments 失效
公开(公告)号：US06609170B1
公开(公告)日：2003-08-19
申请号：US09474429
申请日：1999-12-29
申请人： Philip R. Lehwalder , Brad A. Barmore
发明人： Philip R. Lehwalder , Brad A. Barmore
IPC分类号： G06F1300
CPC分类号： G06F3/162
摘要： A method and device are provided for managing a group of electrical devices, e.g., coder/decoders (codecs) in a computer system, including enabling and disabling a primary electrical device. An address ID module assigns a primary address to designate one of the devices as a primary device. The primary device performs certain functions that are only performed by a single device. Other devices are designated as secondary devices. A signal control circuit receives a BIOS-controlled signal as an input, and outputs a presence signal indicating whether the original primary electrical device is enabled or disabled. If the original primary device is disabled, the address ID module designates one of the secondary devices as the new primary device, and the other secondary devices remain secondary. The new primary device performs certain functions of the original primary device.

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