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1. 发明授权

US08603890B2 Air gap isolation in non-volatile memory 有权
标题翻译：非易失性存储器中的气隙隔离
公开(公告)号：US08603890B2
公开(公告)日：2013-12-10
申请号：US13162475
申请日：2011-06-16
申请人： Vinod Robert Purayath , George Matamis , Eli Harari , Hiroyuki Kinoshita , Tuan Pham
发明人： Vinod Robert Purayath , George Matamis , Eli Harari , Hiroyuki Kinoshita , Tuan Pham
IPC分类号： H01L21/76
CPC分类号： H01L21/764 , H01L27/11521 , H01L27/11524 , H01L27/11568
摘要： Air gap isolation in non-volatile memory arrays and related fabrication processes are provided. Electrical isolation between adjacent active areas of a substrate can be provided, at least in part, by bit line air gaps that are elongated in a column direction between the active areas. At least one cap is formed over each isolation region, at least partially overlying air to provide an upper endpoint for the corresponding air gap. The caps may be formed at least partially along the sidewalls of adjacent charge storage regions. In various embodiments, selective growth processes are used to form capping strips over the isolation regions to define the air gaps. Word line air gaps that are elongated in a row direction between adjacent rows of storage elements are also provided.
摘要翻译：提供了非易失性存储器阵列中的气隙隔离和相关制造工艺。至少部分地可以通过在活动区域之间沿列方向延伸的位线空气间隙来提供衬底的相邻有源区域之间的电隔离。在每个隔离区域上形成至少一个盖，至少部分地覆盖空气以提供相应气隙的上端点。帽可以至少部分地沿着相邻的电荷存储区域的侧壁形成。在各种实施方案中，选择性生长过程用于在隔离区域上形成封盖条以限定气隙。还提供了在相邻行存储元件之间沿行方向延伸的字线气隙。

2. 发明申请

US20110309425A1 Air Gap Isolation In Non-Volatile Memory 有权
标题翻译：非易失性存储器中的空气间隙隔离
公开(公告)号：US20110309425A1
公开(公告)日：2011-12-22
申请号：US13162475
申请日：2011-06-16
申请人： Vinod Robert Purayath , George Matamis , Eli Harari , Hiroyuki Kinoshita , Tuan Pham
发明人： Vinod Robert Purayath , George Matamis , Eli Harari , Hiroyuki Kinoshita , Tuan Pham
IPC分类号： H01L29/788 , H01L21/764
CPC分类号： H01L21/764 , H01L27/11521 , H01L27/11524 , H01L27/11568
摘要： Air gap isolation in non-volatile memory arrays and related fabrication processes are provided. Electrical isolation between adjacent active areas of a substrate can be provided, at least in part, by bit line air gaps that are elongated in a column direction between the active areas. At least one cap is formed over each isolation region, at least partially overlying air to provide an upper endpoint for the corresponding air gap. The caps may be formed at least partially along the sidewalls of adjacent charge storage regions. In various embodiments, selective growth processes are used to form capping strips over the isolation regions to define the air gaps. Word line air gaps that are elongated in a row direction between adjacent rows of storage elements are also provided.
摘要翻译：提供了非易失性存储器阵列中的气隙隔离和相关制造工艺。至少部分地可以通过在活动区域之间沿列方向延伸的位线空气间隙来提供衬底的相邻有源区域之间的电隔离。在每个隔离区域上形成至少一个盖，至少部分地覆盖空气以提供相应气隙的上端点。帽可以至少部分地沿着相邻的电荷存储区域的侧壁形成。在各种实施方案中，选择性生长过程用于在隔离区域上形成封盖条以限定气隙。还提供了在相邻行存储元件之间沿行方向延伸的字线气隙。

3. 发明授权

US08546239B2 Methods of fabricating non-volatile memory with air gaps 有权
标题翻译：使用气隙制造非易失性存储器的方法
公开(公告)号：US08546239B2
公开(公告)日：2013-10-01
申请号：US13157178
申请日：2011-06-09
申请人： Eli Harari , Tuan Pham , Yupin Fong , Vinod Robert Purayath
发明人： Eli Harari , Tuan Pham , Yupin Fong , Vinod Robert Purayath
IPC分类号： H01L21/76
CPC分类号： H01L21/764 , H01L27/11521 , H01L27/11524 , H01L27/11568
摘要： Air gap isolation in non-volatile memory arrays and related fabrication processes are provided. Electrical isolation can be provided, at least in part, by bit line air gaps that are elongated in a column direction and/or word line air gaps that are elongated in a row direction. The bit line air gaps may be formed in the substrate, extending between adjacent active areas of the substrate, as well as above the substrate surface, extending between adjacent columns of non-volatile storage elements. The word line air gaps may be formed above the substrate surface, extending between adjacent rows of non-volatile storage elements.
摘要翻译：提供了非易失性存储器阵列中的气隙隔离和相关制造工艺。至少部分地可以通过在列方向上延伸的位线空气间隙和/或在行方向上延长的字线空气间隙来提供电隔离。位线气隙可以形成在衬底中，在衬底的相邻有效区域之间以及在衬底表面之上延伸，在相邻列的非易失性存储元件之间延伸。字线气隙可以形成在衬底表面之上，在相邻行的非易失性存储元件之间延伸。

4. 发明申请

US20110303967A1 Non-Volatile Memory With Air Gaps 有权
标题翻译：具有空气间隙的非易失性存储器
公开(公告)号：US20110303967A1
公开(公告)日：2011-12-15
申请号：US13157178
申请日：2011-06-09
申请人： Eli Harari , Tuan Pham , Yupin Fong , Vinod Robert Purayath
发明人： Eli Harari , Tuan Pham , Yupin Fong , Vinod Robert Purayath
IPC分类号： H01L29/788 , H01L21/764
CPC分类号： H01L21/764 , H01L27/11521 , H01L27/11524 , H01L27/11568
摘要： Air gap isolation in non-volatile memory arrays and related fabrication processes are provided. Electrical isolation can be provided, at least in part, by bit line air gaps that are elongated in a column direction and/or word line air gaps that are elongated in a row direction. The bit line air gaps may be formed in the substrate, extending between adjacent active areas of the substrate, as well as above the substrate surface, extending between adjacent columns of non-volatile storage elements. The word line air gaps may be formed above the substrate surface, extending between adjacent rows of non-volatile storage elements.
摘要翻译：提供了非易失性存储器阵列中的气隙隔离和相关制造工艺。至少部分地可以通过在列方向上延伸的位线空气间隙和/或在行方向上延长的字线空气间隙来提供电隔离。位线气隙可以形成在衬底中，在衬底的相邻有效区域之间以及在衬底表面之上延伸，在相邻列的非易失性存储元件之间延伸。字线气隙可以形成在衬底表面之上，在相邻行的非易失性存储元件之间延伸。

5. 发明申请

US20070250193A1 Dongle-based multimedia player 审中-公开
标题翻译：基于Dongle的多媒体播放器
公开(公告)号：US20070250193A1
公开(公告)日：2007-10-25
申请号：US11710988
申请日：2007-02-27
申请人： Moshe Raines , Dov Moran , Avraham Meir , Eli Harari , David Koren , Ran Carmeli
发明人： Moshe Raines , Dov Moran , Avraham Meir , Eli Harari , David Koren , Ran Carmeli
IPC分类号： G06F17/00
CPC分类号： H04N5/765 , H04N5/775
摘要： The present disclosure relates to a portable digital media player, and in particular to a portable digital media player device having specific mechanical properties. In some embodiments, the portable digital media player includes a device port that is configured as a supportive port. In some embodiments, the device port is a plug. In some embodiments, a volume ratio between a minimally circumscribing rectangular prism of the digital media player and a minimally circumscribing rectangular prism of the plug is at most 10:1, or at most 5:1. In some embodiments, a media system is provided where the digital media player is mated with the host presentation device. In some embodiments, the media system provides certain mechanical properties.
摘要翻译：本公开涉及便携式数字媒体播放器，特别涉及具有特定机械特性的便携式数字媒体播放器设备。在一些实施例中，便携式数字媒体播放器包括被配置为支持端口的设备端口。在一些实施例中，设备端口是插头。在一些实施例中，数字媒体播放器的最小限定的矩形棱镜和插头的最小限定的矩形棱镜之间的体积比至多为10：1或至多5：1。在一些实施例中，提供媒体系统，其中数字媒体播放器与主机呈现设备交配。在一些实施例中，介质系统提供某些机械特性。

6. 发明授权

US10121553B2 Capacitive-coupled non-volatile thin-film transistor NOR strings in three-dimensional arrays 有权
公开(公告)号：US10121553B2
公开(公告)日：2018-11-06
申请号：US15248420
申请日：2016-08-26
申请人： Eli Harari
发明人： Eli Harari
IPC分类号： G11C16/34 , G11C16/04 , G11C11/56 , H01L29/10 , H01L29/08 , H01L29/786 , H01L29/92 , H01L27/11582 , H01L21/28 , H01L29/66 , H01L29/792 , H01L27/11565
摘要： Multi-gate NOR flash thin-film transistor (TFT) string arrays are organized as three dimensional stacks of active strips. Each active strip includes a shared source sublayer and a shared drain sublayer that is connected to substrate circuits. Data storage in the active strip is provided by charge-storage elements between the active strip and a multiplicity of control gates provided by adjacent local word-lines. The parasitic capacitance of each active strip is used to eliminate hard-wire ground connection to the shared source making it a semi-floating, or virtual source. Pre-charge voltages temporarily supplied from the substrate through a single port per active strip provide the appropriate voltages on the source and drain required during read, program, program-inhibit and erase operations. TFTs on multiple active strips can be pre-charged separately and then read, programmed or erased together in a massively parallel operation.

7. 发明申请

US20180090219A1 MULTI-GATE NOR FLASH THIN-FILM TRANSISTOR STRINGS ARRANGED IN STACKED HORIZONTAL ACTIVE STRIPS WITH VERTICAL CONTROL GATES 审中-公开
公开(公告)号：US20180090219A1
公开(公告)日：2018-03-29
申请号：US15820337
申请日：2017-11-21
申请人： Eli Harari
发明人： Eli Harari
IPC分类号： G11C16/34 , H01L29/792 , G11C11/56 , H01L29/66 , H01L27/06 , H01L21/28 , G11C16/28 , G11C16/26 , G11C16/10 , G11C16/04
摘要： Multi-gate NOR flash thin-film transistor (TFT) string arrays (“multi-gate NOR string arrays”) are organized as stacks of horizontal active strips running parallel to the surface of a silicon substrate, with the TFTs in each stack being controlled by vertical local word-lines provided along one or both sidewalls of the stack of active strips. Each active strip includes at least a channel layer formed between two shared source or drain layers. Data storage in the TFTs of an active strip is provided by charge-storage elements provided between the active strip and the control gates provided by the adjacent local word-lines. Each active strip may provide TFTs that belong to one or two NOR strings, depending on whether one or both sides of the active strip are used.

8. 发明授权

US09842651B2 Three-dimensional vertical NOR flash thin film transistor strings 有权
公开(公告)号：US09842651B2
公开(公告)日：2017-12-12
申请号：US15343332
申请日：2016-11-04
申请人： Eli Harari
发明人： Eli Harari
IPC分类号： G11C16/04 , H01L23/528 , H01L27/1157 , G11C16/28 , H01L29/08 , H01L29/16 , H01L29/04 , H01L27/11582 , H01L29/06 , H01L29/786 , G11C16/10 , H01L29/10 , H01L29/51 , H01L21/28 , H01L29/66 , H01L21/02 , H01L21/3213 , H01L21/768 , H01L29/423 , H01L27/11565 , H01L27/11573 , G11C11/56 , G11C16/26 , G11C16/34 , H01L27/06 , H01L29/792
CPC分类号： G11C16/0466 , G11C11/5628 , G11C11/5635 , G11C16/0416 , G11C16/0483 , G11C16/0491 , G11C16/10 , G11C16/26 , G11C16/28 , G11C16/3427 , H01L21/02164 , H01L21/0217 , H01L21/02532 , H01L21/02595 , H01L21/28282 , H01L21/32133 , H01L21/76892 , H01L23/528 , H01L27/0688 , H01L27/11565 , H01L27/1157 , H01L27/11573 , H01L27/11582 , H01L28/00 , H01L29/04 , H01L29/0649 , H01L29/0847 , H01L29/1037 , H01L29/16 , H01L29/4234 , H01L29/513 , H01L29/518 , H01L29/6675 , H01L29/66833 , H01L29/78642 , H01L29/7926
摘要： A memory structure, includes (a) active columns of polysilicon formed above a semiconductor substrate, each active column extending vertically from the substrate and including a first heavily doped region, a second heavily doped region, and one or more lightly doped regions each adjacent both the first and second heavily doped region, wherein the active columns are arranged in a two-dimensional array extending in second and third directions parallel to the planar surface of the semiconductor substrate; (b) charge-trapping material provided over one or more surfaces of each active column; and (c) conductors each extending lengthwise along the third direction. The active columns, the charge-trapping material and the conductors together form a plurality of thin film transistors, with each thin film transistor formed by one of the conductors, a portion of the lightly doped region of an active column, the charge-trapping material between the portion of the lightly doped region and the conductor, and the first and second heavily doped regions. The thin film transistors associated with each active column are organized into one or more vertical NOR strings.

9. 发明申请

US20170092371A1 CAPACITIVE-COUPLED NON-VOLATILE THIN-FILM TRANSISTOR STRINGS IN THREE DIMENSIONAL ARRAYS 审中-公开
公开(公告)号：US20170092371A1
公开(公告)日：2017-03-30
申请号：US15248420
申请日：2016-08-26
申请人： Eli Harari
发明人： Eli Harari
IPC分类号： G11C16/34 , G11C11/56 , H01L29/92 , H01L29/10 , H01L29/08 , H01L29/786 , G11C16/04 , H01L27/115
CPC分类号： G11C16/3431 , G11C11/5628 , G11C11/5635 , G11C11/5642 , G11C16/0416 , G11C16/0466 , G11C16/0483 , G11C16/0491 , H01L21/28282 , H01L27/11565 , H01L27/11582 , H01L29/0847 , H01L29/1037 , H01L29/66833 , H01L29/78633 , H01L29/7926 , H01L29/92
摘要： Multi-gate NOR flash thin-film transistor (TFT) string arrays are organized as three dimensional stacks of active strips. Each active strip includes a shared source sublayer and a shared drain sublayer that is connected to substrate circuits. Data storage in the active strip is provided by charge-storage elements between the active strip and a multiplicity of control gates provided by adjacent local word-lines. The parasitic capacitance of each active strip is used to eliminate hard-wire ground connection to the shared source making it a semi-floating, or virtual source. Pre-charge voltages temporarily supplied from the substrate through a single port per active strip provide the appropriate voltages on the source and drain required during read, program, program-inhibit and erase operations. TFTs on multiple active strips can be pre-charged separately and then read, programmed or erased together in a massively parallel operation.

10. 发明授权

US10741264B2 Multi-gate nor flash thin-film transistor strings arranged in stacked horizontal active strips with vertical control gates 有权
公开(公告)号：US10741264B2
公开(公告)日：2020-08-11
申请号：US15820337
申请日：2017-11-21
申请人： Eli Harari
发明人： Eli Harari
IPC分类号： G11C16/34 , H01L21/28 , G11C16/04 , G11C16/10 , G11C16/26 , G11C16/28 , H01L29/66 , H01L27/06 , H01L29/792 , G11C11/56 , H01L27/11573 , H01L27/11582 , H01L27/11565
摘要： Multi-gate NOR flash thin-film transistor (TFT) string arrays (“multi-gate NOR string arrays”) are organized as stacks of horizontal active strips running parallel to the surface of a silicon substrate, with the TFTs in each stack being controlled by vertical local word-lines provided along one or both sidewalls of the stack of active strips. Each active strip includes at least a channel layer formed between two shared source or drain layers. Data storage in the TFTs of an active strip is provided by charge-storage elements provided between the active strip and the control gates provided by the adjacent local word-lines. Each active strip may provide TFTs that belong to one or two NOR strings, depending on whether one or both sides of the active strip are used.

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