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1. 发明授权

US07209366B2 Delivery regions for power, ground and I/O signal paths in an IC package 有权
标题翻译： IC封装中的电源，接地和I / O信号通路的交付区域
公开(公告)号：US07209366B2
公开(公告)日：2007-04-24
申请号：US10804800
申请日：2004-03-19
申请人： Victor Prokofiev , Cengiz A. Palanduz
发明人： Victor Prokofiev , Cengiz A. Palanduz
IPC分类号： H05K1/11
CPC分类号： H05K7/1092 , H01L23/50 , H01L2224/16 , H01L2924/01019 , H01L2924/10253 , H01L2924/15312 , H01L2924/19105 , H01L2924/3011 , H05K1/112 , H05K1/141 , H05K1/147 , H05K2201/09227 , H05K2201/094 , H05K2201/10325 , H05K2201/10689 , H05K2201/10734 , H01L2924/00
摘要： An integrated circuit (IC) package includes a chip carrier and a chip mounted to the chip carrier. The chip carrier has a centrally located power delivery region and a peripherally located input-output (I/O) delivery region disposed in partially surrounding relationship to the power delivery region. Power and ground paths are disposed in the power delivery region and I/O signal paths are disposed in the I/O delivery region.
摘要翻译：集成电路（IC）封装包括芯片载体和安装到芯片载体的芯片。芯片载体具有位于中心的电力输送区域和以与电力输送区域部分环绕的关系布置的外围定位的输入输出（I / O）输送区域。电源和接地路径设置在电力输送区域中，I / O信号路径设置在I / O传送区域中。

2. 发明申请

US20060143886A1 Forming a substrate core with embedded capacitor and structures formed thereby 有权
公开(公告)号：US20060143886A1
公开(公告)日：2006-07-06
申请号：US11027386
申请日：2004-12-30
申请人： Sriram Srinivasan , John Guzek , Cengiz Palanduz , Victor Prokofiev , Joel Auernheimer
发明人： Sriram Srinivasan , John Guzek , Cengiz Palanduz , Victor Prokofiev , Joel Auernheimer
IPC分类号： H01G7/00 , H01G4/20
CPC分类号： H05K1/162 , H01G4/10 , H01G4/1209 , H01G4/33 , H05K3/429 , H05K3/4611 , H05K2201/0175 , H05K2201/0179 , H05K2201/09309 , Y10T29/43 , Y10T29/49147 , Y10T29/49155 , Y10T29/49165
摘要： Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a substrate core by attaching a first dielectric layer to a second conductive layer of a thin film capacitor, and attaching a second dielectric layer to a first conductive layer of the thin film capacitor.

3. 发明申请

US20060065975A1 Input/output routing on an electronic device 有权
标题翻译：电子设备上的输入/输出路由
公开(公告)号：US20060065975A1
公开(公告)日：2006-03-30
申请号：US10955944
申请日：2004-09-30
申请人： Larry Mosley , Cengiz Palanduz , Victor Prokofiev
发明人： Larry Mosley , Cengiz Palanduz , Victor Prokofiev
IPC分类号： H01L23/34 , H01L23/29
CPC分类号： H01L23/50 , H01L23/49805 , H01L23/49822 , H01L2224/16225 , H01L2224/16235 , H01L2924/00011 , H01L2924/00014 , H01L2924/01019 , H01L2924/0102 , H01L2924/15311 , H01L2924/19106 , H05K1/0231 , H05K1/162 , H05K2201/0187 , H05K2201/10378 , H01L2224/0401
摘要： An electronic device includes a material having a first dielectric constant (K) value, and a material having a second dielectric constant (K) value. The first dielectric constant (K) value is lower than the second dielectric constant (K) value. The electronic device also includes input/output connection conductors for transmitting signals to and from a die. The input/output connection conductors are routed through the material of the interposer having the first dielectric constant. The electronic device also includes power connection conductors for delivering power to the die, and ground connection conductors. The power and ground connection conductors are routed through the material having the second dielectric constant.
摘要翻译：电子器件包括具有第一介电常数（K）值的材料和具有第二介电常数（K）值的材料。第一介电常数（K）值低于第二介电常数（K）值。电子设备还包括用于向模具传送信号和从模具传送信号的输入/输出连接导体。输入/输出连接导体通过具有第一介电常数的插入件的材料布线。电子设备还包括用于向模具输送功率的电力连接导体和接地连接导体。电源和接地连接导体穿过具有第二介电常数的材料。

4. 发明授权

US06809260B1 Apparatus and method for an integrated high-performance electrical interconnect 有权
标题翻译：集成高性能电气互连的装置和方法
公开(公告)号：US06809260B1
公开(公告)日：2004-10-26
申请号：US10667847
申请日：2003-09-22
申请人： Victor Prokofiev
发明人： Victor Prokofiev
IPC分类号： H05K702
CPC分类号： H05K1/141 , H05K1/145 , H05K3/3436 , H05K2201/10378 , H05K2201/10522 , H05K2201/10734
摘要： According to some embodiments, an integrated high-quality printed circuit board is provided. For example, a first integrated circuit device may be mounted on both a first printed circuit board and a second printed circuit board (e.g., a polyimide film having better dielectric characteristics as compared to the first board). A second integrated circuit device may be located remote from the first integrated circuit device and may also be mounted on both the first and second boards.
摘要翻译：根据一些实施例，提供集成的高质量印刷电路板。例如，第一集成电路器件可以安装在第一印刷电路板和第二印刷电路板（例如，与第一板相比具有更好的介电特性的聚酰亚胺膜）上。第二集成电路装置可以位于远离第一集成电路装置的位置，并且也可以安装在第一和第二板上。

5. 发明授权

US07372126B2 Organic substrates with embedded thin-film capacitors, methods of making same, and systems containing same 有权
标题翻译：具有嵌入式薄膜电容器的有机基板，其制造方法以及包含其的系统
公开(公告)号：US07372126B2
公开(公告)日：2008-05-13
申请号：US11096235
申请日：2005-03-31
申请人： John S. Guzek , Cengiz A. Palanduz , Victor Prokofiev
发明人： John S. Guzek , Cengiz A. Palanduz , Victor Prokofiev
IPC分类号： H01L29/00
CPC分类号： H01L23/49822 , H01G4/236 , H01G4/33 , H01L21/4857 , H01L23/50 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16 , H01L2924/00014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/15312 , H05K1/162 , H05K2201/09309 , H05K2201/09481 , H05K2201/09509 , H05K2201/09518 , H05K2201/09718 , Y10T29/435 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A thin-film capacitor assembly includes two plates that are accessed through deep and shallow vias. The thin-film capacitor assembly is able to be coupled with a spacer and an interposer. The thin-film capacitor assembly is also able to be stacked with a plurality of thin-film capacitor assemblies. The thin-film capacitor assembly is also part of computing system.
摘要翻译：薄膜电容器组件包括通过深和浅通孔访问的两个板。薄膜电容器组件能够与间隔件和插入件耦合。薄膜电容器组件也能够与多个薄膜电容器组件堆叠。薄膜电容器组件也是计算系统的一部分。

6. 发明申请

US20060146476A1 Forming a substrate core with embedded capacitor and structures formed thereby 有权
标题翻译：形成具有嵌入式电容器的基板芯和由此形成的结构
公开(公告)号：US20060146476A1
公开(公告)日：2006-07-06
申请号：US11218357
申请日：2005-09-02
申请人： Sriram Srinivasan , John Guzek , Cengiz Palanduz , Victor Prokofiev , Joel Auernheimer
发明人： Sriram Srinivasan , John Guzek , Cengiz Palanduz , Victor Prokofiev , Joel Auernheimer
IPC分类号： H01G4/228
CPC分类号： H05K1/162 , H01G4/10 , H01G4/1209 , H01G4/33 , H05K3/429 , H05K3/4611 , H05K2201/0175 , H05K2201/0179 , H05K2201/09309 , Y10T29/43 , Y10T29/49147 , Y10T29/49155 , Y10T29/49165
摘要： Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a substrate core by attaching a first dielectric layer to a second conductive layer of a thin film capacitor, and attaching a second dielectric layer to a first conductive layer of the thin film capacitor.
摘要翻译：描述形成微电子结构的方法。这些方法的实施例包括通过将第一电介质层附着到薄膜电容器的第二导电层并且将第二电介质层附接到薄膜电容器的第一导电层来形成衬底芯。

7. 发明申请

US20060043581A1 IC package with power and singal lines on opposing sides 有权
标题翻译： IC封装带有相对侧的电源和单线
公开(公告)号：US20060043581A1
公开(公告)日：2006-03-02
申请号：US10931917
申请日：2004-09-01
申请人： Victor Prokofiev
发明人： Victor Prokofiev
IPC分类号： H01L23/34 , H01L23/02 , H01L23/52
CPC分类号： H01L23/49838 , H01L23/49816 , H01L2224/16 , H01L2224/16225 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/01087 , H01L2924/1532 , H01L2924/15323 , H01L2924/1533 , H01L2924/16152 , H01L2924/16235 , H01L2924/16251 , H01L2924/3011 , H05K1/0203 , H05K1/0262 , H05K1/141 , H05K1/145 , H05K1/182 , H05K2201/066 , H05K2201/10477 , H05K2201/10734 , H01L2224/0401
摘要： A package for integrated circuits is described. The package has a package substrate with a land side and an opposite die side, a first set of low level signal connectors on the die side to connect to an IC to be carried by the package, and a second set of low level signal connectors on the die side to connect to external components. The package may have power connectors on the land side or a power supply attached to the land side. A heat spreader or cooler may be attached to the die side.
摘要翻译：描述了集成电路的封装。封装具有封装衬底，其具有焊盘侧和相对的裸片侧，裸片侧的第一组低电平信号连接器连接到要由封装承载的IC，以及第二组低电平信号连接器模具侧连接到外部组件。该包装可能在陆地上具有电源连接器或者连接到陆地侧的电源。散热器或冷却器可以附接到管芯侧。

8. 发明申请

US20060001149A1 Packaged substrate having variable width conductors and a variably spaced reference plane 审中-公开
标题翻译：封装衬底具有可变宽度的导体和可变间隔的参考平面
公开(公告)号：US20060001149A1
公开(公告)日：2006-01-05
申请号：US10883049
申请日：2004-06-30
申请人： Victor Prokofiev
发明人： Victor Prokofiev
IPC分类号： H01L23/48
CPC分类号： H01L23/49822 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A package substrate for a microelectronic die is described. The package substrate has first terminals in a small area and second terminals in a larger area with conductors connecting the first and second terminals. The conductors are fairly narrow near the first terminals so that they can fit next to one another near the first terminals and before fanning out to the second terminals. The reference plane next to the conductors forms a step so that a first surface of the reference plane is closer to the conductors where they are narrow, and a second portion of the reference plane surrounding the first portion is further from the conductors where they are wider. The capacitance created between a respective conductor and the reference plane remains relatively constant per unit length because the reference plane is closer to the conductor where the conductor is narrow and further from the conductor where the conductor is wider.
摘要翻译：描述了用于微电子管芯的封装衬底。封装衬底具有小面积的第一端子和具有连接第一和第二端子的导体的较大区域中的第二端子。导体在第一端子附近相当窄，使得它们可以在第一端子附近彼此相邻并且在扇形到第二端子之前。靠近导体的参考平面形成一个步骤，使得参考平面的第一表面更靠近导体，其中它们较窄，并且围绕第一部分的参考平面的第二部分远离导体，其中它们较宽。由于参考平面更靠导体导体较窄的导体，导体较宽的导体，所以在相应的导体与参考平面之间产生的电容保持相对恒定。

9. 发明申请

US20130007327A1 USING POWER DIVIDING MATCHING NODES TO OPTIMIZE INTERCONNECTS 审中-公开
标题翻译：使用功率分配匹配节点优化互连
公开(公告)号：US20130007327A1
公开(公告)日：2013-01-03
申请号：US13173959
申请日：2011-06-30
申请人： Victor Prokofiev
发明人： Victor Prokofiev
IPC分类号： G06F13/00
CPC分类号： G06F13/4086 , G06F1/26
摘要： Systems and methods of improving computing system interconnects may involve providing an upstream channel and a plurality of downstream channels. A passive matching node can be connected to the upstream channel and the downstream channels, wherein the matching node is configured to couple power between the upstream memory channel and the downstream channels. The matching node may also perform impedance matching as well as isolate two or more signals on the downstream channels from one another. In one example, the matching node includes a power divider/combiner.
摘要翻译：改进计算系统互连的系统和方法可以包括提供上行信道和多个下行信道。无源匹配节点可以连接到上游信道和下游信道，其中匹配节点被配置为在上游存储器信道和下行信道之间耦合电力。匹配节点还可以执行阻抗匹配以及将下游信道上的两个或更多个信号彼此隔离。在一个示例中，匹配节点包括功率分配器/组合器。

10. 发明申请

US20060220175A1 Organic substrates with embedded thin-film capacitors, methods of making same, and systems containing same 有权
公开(公告)号：US20060220175A1
公开(公告)日：2006-10-05
申请号：US11096235
申请日：2005-03-31
申请人： John Guzek , Cengiz Palanduz , Victor Prokofiev
发明人： John Guzek , Cengiz Palanduz , Victor Prokofiev
IPC分类号： H01L29/00
CPC分类号： H01L23/49822 , H01G4/236 , H01G4/33 , H01L21/4857 , H01L23/50 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16 , H01L2924/00014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/15312 , H05K1/162 , H05K2201/09309 , H05K2201/09481 , H05K2201/09509 , H05K2201/09518 , H05K2201/09718 , Y10T29/435 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A thin-film capacitor assembly includes two plates that are accessed through deep and shallow vias. The thin-film capacitor assembly is able to be coupled with a spacer and an interposer. The thin-film capacitor assembly is also able to be stacked with a plurality of thin-film capacitor assemblies. The thin-film capacitor assembly is also part of computing system.

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