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1. 发明专利

JP2011155437A Voice processing device and voice processing method 有权
标题翻译：语音处理设备和语音处理方法
公开(公告)号：JP2011155437A
公开(公告)日：2011-08-11
申请号：JP2010015074
申请日：2010-01-27
申请人： Victor Co Of Japan Ltd , 日本ビクター株式会社
发明人： WATANABE KENJI
IPC分类号： H03G3/30 , G10L19/00 , H03F1/30 , H03G3/20
摘要： PROBLEM TO BE SOLVED: To improve sound quality by suppressing a variation in sound volume and enhancing reproducibility in voice signal. SOLUTION: A voice processing device 120 has an accumulation device 152 accumulating an electric energy, a delay portion 158 delaying a detection signal which is a signal corresponding to an electric energy amount accumulated in the accumulation device to generate a control signal, a multiplication portion 150 multiplying the control signal by a voice signal inputted to the voice processing device, and an amplifier 154 receiving the electric energy accumulated in the accumulation device and amplifying the voice signal multiplied by the control signal via the multiplication portion. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：通过抑制音量的变化和提高语音信号的再现性来提高声音质量。解决方案：声音处理装置120具有蓄积电能的累积装置152，延迟部分158，延迟检测信号，该检测信号是与积累装置中积累的电能量相对应的信号，以产生控制信号; 乘法部分150将控制信号乘以输入到语音处理装置的语音信号，以及放大器154，接收积累在蓄电装置中的电能，并通过乘法部分放大与控制信号相乘的语音信号。版权所有（C）2011，JPO＆INPIT

2. 发明专利

JP2007088926A D-class amplifier 审中-公开
标题翻译： D级放大器
公开(公告)号：JP2007088926A
公开(公告)日：2007-04-05
申请号：JP2005276494
申请日：2005-09-22
申请人： Victor Co Of Japan Ltd , 日本ビクター株式会社
发明人： WATANABE KENJI
IPC分类号： H03F3/217
摘要： PROBLEM TO BE SOLVED: To provide a D-class amplifier comprising a through current reduction circuit. SOLUTION: A D-class amplifier 10 is an amplifier of pulse modulation output comprising push-pull type output stage switching transistors Q1, Q2 and includes a through current reduction circuit 9 including a no-signal input status detection means 7 for detecting a no-signal input status of an audio signal to be input, a zero input status of a digital signal such as a PCM signal or a no-signal input status that is a zero level status of an output volume position, and a dead time control means 8 for automatically controlling switching signals SH, SL output from an output stage driver circuit 2 so as to enlarge a dead time DT of the push-pull type output stage switching transistors Q1, Q2 rather than an ordinary dead time while the no-signal input status detecting means 7 detects said no-signal input status. A through current in no-signal inputting is reduced to suppress heating, and a power consumption loss is reduced. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种包括直通电流减少电路的D级放大器。解决方案：D级放大器10是包括推挽型输出级开关晶体管Q1，Q2的脉冲调制输出的放大器，并且包括通过电流减小电路9，其包括用于检测的无信号输入状态检测装置7 要输入的音频信号的无信号输入状态，诸如PCM信号的数字信号的零输入状态或作为输出音量位置的零电平状态的无信号输入状态，以及死区时间控制装置8，用于自动控制从输出级驱动电路2输出的开关信号SH，SL，以扩大推挽型输出级开关晶体管Q1，Q2的死区时间DT，而不是普通的死区时间，信号输入状态检测装置7检测所述无信号输入状态。降低了无信号输入的通电，抑制加热，降低功耗损失。版权所有（C）2007，JPO＆INPIT

3. 发明专利

JP2005328196A Overmodulation preventing circuit in pwm modulation 有权
标题翻译： PWM调制中的过流保护电路
公开(公告)号：JP2005328196A
公开(公告)日：2005-11-24
申请号：JP2004142781
申请日：2004-05-12
申请人： Victor Co Of Japan Ltd , 日本ビクター株式会社
发明人： WATANABE KENJI
IPC分类号： H03K7/08
摘要： PROBLEM TO BE SOLVED: To provide an overmodulation preventing circuit in a PWM modulation.
SOLUTION: The overmodulation preventing circuit 20 includes a maximum modulation factor pulse signal generating means 12 for comparing the level V
B of the triangular wave 3 of a PWM modulator 1 with a high voltage side voltage level V
H corresponding to the maximum modulation factor allowed at the high voltage side of a modulation factor 2 by a comparator Comp1, outputting a high voltage side maximum modulation factor pulse signal V
D synchronized with the triangular wave 3, comparing the level V
B of the triangular wave 3 with the low voltage side voltage level V
L corresponding to the maximum modulation factor allowed at the low voltage side of the modulation factor 2 by a comparator Comp2 and outputting the low voltage side maximum modulation factor pulse signal V
E synchronized with the triangular wave 3; and a maximum modulation factor pulse signal injection means 12 having an AND circuit 13 for outputting a pulse signal V
F of the AND of a PWM output signal 4 after the PWM modulation and the high voltage side maximum modulation factor pulse signal V
D and an OR circuit 15 for outputting the pulse signal V
G of the OR of the pulse signal V
F and the low voltage side maximum modulation factor pulse signal V
E as a PWM output signal 14.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供PWM调制中的过调制防止电路。过调制防止电路20包括最大调制因数脉冲信号发生装置12，用于将PWM调制器1的三角波3的电平V SB B / SBB与高电压侧电压电平进行比较通过比较器Comp1对应于在调制因子2的高压侧允许的最大调制度的V H ，输出高电压侧最大调制因数脉冲信号V SB < 与三角波3同步，将三角波3的电平V B 与对应于低电平下允许的最大调制度的低电压侧电压V SB> L 通过比较器Comp2调制因子2的电压侧，并输出与三角波3同步的低电压侧最大调制度脉冲信号V SB> E ; 以及具有AND电路13的最大调制因数脉冲信号注入装置12，用于输出PWM调制后的PWM输出信号4的AND与高电压侧最大调制系数的AND的脉冲信号V SB> 脉冲信号V D 和用于输出脉冲信号V F 的或的脉冲信号V SB 的OR电路15，侧最大调制因数脉冲信号V E 作为PWM输出信号14.版权所有：（C）2006，JPO＆NCIPI

4. 发明专利

JP2005252708A D-class amplifier 有权
标题翻译： D级放大器
公开(公告)号：JP2005252708A
公开(公告)日：2005-09-15
申请号：JP2004061057
申请日：2004-03-04
申请人： Victor Co Of Japan Ltd , 日本ビクター株式会社
发明人： WATANABE KENJI
IPC分类号： H03F3/217
摘要： PROBLEM TO BE SOLVED: To provide a D-class amplifier in which a distortion rate is improved, regardless of the magnitude of the output and that of the dead time.
SOLUTION: The D-class amplifier 10 is a half-bridge type D-class amplifier having a switching output stage, which is composed of a high-side MOS transistor Q1 and a low-side MOS transistor Q2 driven alternately by input pulses P1, P2, and a low-pass filter circuit LPF provided with a coil L1 and a capacitor C1, inserted in between the switching output end (A) of the switching output stage and a load speaker SPK. Especially, a forcible flyback generating circuit FFG1, in which a coil L2 and a capacitor C2 are connected in series, is connected between the switching output end (A) and grounding.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了提供其中失真率提高的D级放大器，不管输出的大小和死区时间的大小。解决方案：D级放大器10是具有开关输出级的半桥型D级放大器，该开关输出级由输入交替驱动的高侧MOS晶体管Q1和低侧MOS晶体管Q2组成脉冲P1，P2和设置有切换输出级的切换输出端（A）和负载扬声器SPK之间的线圈L1和电容器C1的低通滤波器电路LPF。特别地，其中线圈L2和电容器C2串联连接的强制回扫发生电路FFG1连接在开关输出端（A）和接地之间。版权所有（C）2005，JPO＆NCIPI

5. 发明专利

JP2004048333A Pwm modulation class d amplifier 审中-公开
公开(公告)号：JP2004048333A
公开(公告)日：2004-02-12
申请号：JP2002202440
申请日：2002-07-11
申请人： Victor Co Of Japan Ltd , 日本ビクター株式会社
发明人： WATANABE KENJI
IPC分类号： H03F3/217
摘要： PROBLEM TO BE SOLVED: To provide a PWM modulation class D amplifier whose performance is enhanced by suppressing potential variations of the GND and the power supply line.
SOLUTION: A three-channel digital audio amplifier 30 employing the class D amplifier adopting a PWM modulation system is configured such that three analog input signals 1, 2, 3 and three carrier signals D, E, F with different phases resulting from being phase shifted in advance are respectively given to the class D amplifier adopting the PWM modulation system comprising three sets of PWM modulation system class D amplifier units 10a, 10b, 10c, and a low pass filter 3 and a speaker being an output load 4 are connected to each channel, and phases of voltage waveforms at output points A, B, C of each PWM output rectangular wave PWM 2 of the output stage amplifiers 1, 2, 3 of each channel at no input are made different for avoiding mutual interference of drive currents among the channels to reduce potential variations at points GND 1, 2, 3 thereby reducing the mutual interference.
COPYRIGHT: (C)2004,JPO

6. 发明专利

JP2007067554A Class-d amplifier 有权
标题翻译： CLASS-D放大器
公开(公告)号：JP2007067554A
公开(公告)日：2007-03-15
申请号：JP2005248086
申请日：2005-08-29
申请人： Victor Co Of Japan Ltd , 日本ビクター株式会社
发明人： WATANABE KENJI
IPC分类号： H03F3/217
摘要： PROBLEM TO BE SOLVED: To provide a class-D amplifier adopting the feedback system wherein the distortion factor is enhanced by reducing the effect of a remaining carrier of a PWM modulation signal. SOLUTION: The class-D amplifier 20 includes: an operational amplifier for amplifying an audio signal Vin; a pulse width modulation circuit 5; an output stage switching transistor 9; a driver circuit 7 for receiving a pulse width modulation output signal VPWM to switch the output stage switching transistor 9; an output low pass filter 41; and a feedback loop 8 for feeding back an output signal Vout to an input of the operational amplifier 1, and the feedback loop 8 is configured such that a residual carrier reduction circuit 15 comprising: a sampling circuit 11 for sampling the output signal Vout with a clock frequency the same as that of the pulse width modulation circuit 5; and a low pass filter 14 for eliminating high frequency components of the output signal Vout is inserted to the feedback loop 8. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供采用反馈系统的D类放大器，其中通过减小PWM调制信号的剩余载波的影响来增强失真因子。解决方案：D类放大器20包括：用于放大音频信号Vin的运算放大器; 脉宽调制电路5; 输出级切换晶体管9; 用于接收脉冲宽度调制输出信号VPWM以切换输出级切换晶体管9的驱动电路7; 输出低通滤波器41; 以及用于将输出信号Vout反馈到运算放大器1的输入的反馈回路8，并且反馈回路8被配置为使得残余载波减少电路15包括：采样电路11，用于对输出信号Vout进行采样时钟频率与脉冲宽度调制电路5相同; 并且用于消除输出信号Vout的高频分量的低通滤波器14插入到反馈回路8中。（C）2007，JPO和INPIT

7. 发明专利

JP2005167470A D class amplifier 有权
标题翻译： D类放大器
公开(公告)号：JP2005167470A
公开(公告)日：2005-06-23
申请号：JP2003401414
申请日：2003-12-01
申请人： Victor Co Of Japan Ltd , 日本ビクター株式会社
发明人： WATANABE KENJI
IPC分类号： H03F1/32 , H03F3/217
摘要： PROBLEM TO BE SOLVED: To provide a class D amplifier in which distortion rate and efficiency are improved simultaneously.
SOLUTION: The class D amplifier comprising a high side MOS transistor Q1 and a low side MOS transistor Q2 at the switching output stage being driven with pulse input waves P1 and P2 is further provided with two coils L1 and L2 connected in series between the high side MOS transistor Q1 and the low side MOS transistor Q2, a diode D1 connected in parallel with the two coils L1 and L2 such that the anode is connected to the low side MOS transistor Q2 side and the cathode is connected to the high side MOS transistor Q1 side, and a capacitor C1 connected between the joint M of the coils L1 and L2 and the earth and constituting a low-pass filter LPF together with the coils L1 and L2 wherein the joint M serves as an output end in the circuitry and since through current is reduced at the time of switching, distortion rate and efficiency are improved.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供同步改善失真率和效率的D类放大器。解决方案：在由脉冲输入波P1和P2驱动的开关输出级的包括高侧MOS晶体管Q1和低侧MOS晶体管Q2的D类放大器还设置有串联连接的两个线圈L1和L2 高侧MOS晶体管Q1和低侧MOS晶体管Q2，与两个线圈L1和L2并联连接的二极管D1，使得阳极连接到低侧MOS晶体管Q2侧，阴极连接到高侧 MOS晶体管Q1侧和连接在线圈L1和L2的接头M与地之间并与线圈L1和L2一起构成低通滤波器LPF的电容器C1，其中接头M用作电路中的输出端并且由于在切换时通过电流减小，所以失真率和效率提高。版权所有（C）2005，JPO＆NCIPI

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