专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US6049843A System for data communication between disk adapter and disk cartridge drive where adapter controller assigns specific track to formatted data to be sent to drive 失效
标题翻译：用于磁盘适配器和磁盘盒驱动器之间数据通信的系统，其中适配器控制器将特定轨道分配给要发送到驱动器的格式化数据
公开(公告)号：US6049843A
公开(公告)日：2000-04-11
申请号：US59574
申请日：1998-04-14
申请人： Nobuhiko Akasaka , Shigeru Hashimoto , Tsuyoshi Niwata , Koken Yamamoto
发明人： Nobuhiko Akasaka , Shigeru Hashimoto , Tsuyoshi Niwata , Koken Yamamoto
IPC分类号： G06K19/077 , G06F3/06 , G06K17/00 , G11B19/02 , G06F13/12
CPC分类号： G11B19/02
摘要： A method of communication between an adapter and a drive improves the data processing efficiency of the adapter and data transfer efficiency between the adapter and the drive.The drive has a slot to receive a disk cartridge containing a disk and drives the cartridge. The adapter is shaped to be inserted into the slot of the drive. The adapter has a controller to transfer data between the adapter and the drive through the heads thereof. The controller formats data so that the formatted data may fit into at least part of a disk format having tracks and sectors handled by the drive. The controller assigns a specific one of the tracks to the formatted data and transmits the track with the data to the drive.
摘要翻译：适配器和驱动器之间的通信方法提高了适配器的数据处理效率和适配器与驱动器之间的数据传输效率。驱动器有一个插槽用于接收包含磁盘的磁盘盒并驱动磁带。适配器成形为插入驱动器的槽中。适配器具有控制器，用于通过其头部在适配器和驱动器之间传送数据。控制器格式化数据，使得格式化的数据可以适应于具有由驱动器处理的轨道和扇区的磁盘格式的至少一部分。控制器将特定的一个轨道分配给格式化的数据，并将具有数据的轨道发送到驱动器。

2. 发明授权

US06193162B1 Disk-cartridge-type adapter 失效
标题翻译：磁盘盒式适配器
公开(公告)号：US06193162B1
公开(公告)日：2001-02-27
申请号：US09055884
申请日：1998-04-07
申请人： Tsuyoshi Niwata , Shigeru Hashimoto , Nobuhiko Akasaka
发明人： Tsuyoshi Niwata , Shigeru Hashimoto , Nobuhiko Akasaka
IPC分类号： G06K1900
CPC分类号： G06K19/077
摘要： A disk-cartridge-type adapter is capable of preventing damage to a head of the adapter and a head of a disk cartridge drive into which the adapter is inserted, even if these heads are deviated from each other. The adapter is also capable of effectively using the functions of the disk cartridge drive. The head of the adapter has a gap width and a head length that are sufficiently large to cover a setting error between the heads of the adapter and disk cartridge drive. The head of the adapter is covered with protective films having grooves. The head of the adapter has reinforcing supports each having a hollow in which the head of the disk cartridge drive moves. The head and supports of the adapter have holes for passing a shaft fixed to the adapter. The diameter of the holes is greater than that of the shaft. The adapter has a write-protect mechanism and a double-density detecting mechanism. The adapter has a card slot provided with a stepped part, and a hole used to extract an IC card from the adapter. The adapter has a unit for sidewardly inserting and extracting a power source into and from the adapter. The adapter has heat radiation holes.
摘要翻译：磁盘盒式适配器能够防止适配器的头部和插入适配器的盘盒驱动器的头部的损坏，即使这些头部彼此偏离。适配器还能够有效地使用盘盒驱动器的功能。适配器的头部具有足够大的间隙宽度和头部长度，以覆盖适配器和盘盒驱动器的头部之间的设置误差。适配器的头部覆盖有具有凹槽的保护膜。适配器的头部具有每个具有中空部分的加强支撑件，其中盘盒驱动器的头部移动。适配器的头部和支撑件具有用于使固定到适配器的轴通过的孔。孔的直径大于轴的直径。适配器具有写保护机制和双密度检测机构。适配器具有设置有阶梯部分的卡槽，以及用于从适配器提取IC卡的孔。适配器具有用于将电源侧向插入和从适配器中提取的单元。适配器具有散热孔。

3. 发明授权

US06275873B1 System for data communication between disk adapter and disk cartridge drive where adapter controller sending busy signal to disk cartridge drive if adapter controller is unavailable 失效
标题翻译：磁盘适配器和磁盘盒驱动器之间的数据通信系统，如果适配器控制器不可用，适配器控制器将忙信号发送到磁盘盒驱动器
公开(公告)号：US06275873B1
公开(公告)日：2001-08-14
申请号：US09531896
申请日：2000-03-21
申请人： Nobuhiko Akasaka , Shigeru Hashimoto , Tsuyoshi Niwata , Koken Yamamoto
发明人： Nobuhiko Akasaka , Shigeru Hashimoto , Tsuyoshi Niwata , Koken Yamamoto
IPC分类号： G06F300
CPC分类号： G11B19/02
摘要： A method of communication between an adapter and a drive improves the data processing efficiency of the adapter and data transfer efficiency between the adapter and the drive. The drive has a slot to receive a disk cartridge containing a disk and drives the cartridge. The adapter is shaped to be inserted into the slot of the drive. The adapter has a controller to transfer data between the adapter and the drive through the heads thereof. The controller formats data so that the formatted data may fit into at least part of a disk format having tracks and sectors handled by the drive. The controller assigns a specific one of the tracks to the formatted data and transmits the track with the data to the drive.
摘要翻译：适配器和驱动器之间的通信方法提高了适配器和驱动器之间适配器的数据处理效率和数据传输效率。驱动器具有一个插槽，用于接收包含磁盘的磁盘盒并驱动磁带。适配器成形为插入驱动器的槽中。适配器具有控制器，用于通过其头部在适配器和驱动器之间传送数据。控制器格式化数据，使得格式化的数据可以适应于具有由驱动器处理的轨道和扇区的磁盘格式的至少一部分。控制器将特定的一个轨道分配给格式化的数据，并将具有数据的轨道发送到驱动器。

4. 发明授权

US6105864A Terminal device and terminal system 失效
标题翻译：终端设备和终端系统
公开(公告)号：US6105864A
公开(公告)日：2000-08-22
申请号：US972242
申请日：1997-11-18
申请人： Tomomi Shiobara , Shigeru Hashimoto , Koken Yamamoto , Nobuhiko Akasaka , Akiko Iwami
发明人： Tomomi Shiobara , Shigeru Hashimoto , Koken Yamamoto , Nobuhiko Akasaka , Akiko Iwami
IPC分类号： G09C1/00 , G06Q10/00 , G06Q20/00 , G06Q20/06 , G06Q20/30 , G06Q20/34 , G06Q20/36 , G06Q30/04 , G06Q30/06 , G06Q50/00 , G07F7/08 , G07G1/14 , G06F17/60
CPC分类号： G06Q20/20 , G06Q20/04 , G06Q20/202 , G06Q20/204 , G07G1/14
摘要： A terminal device and a terminal system which are adapted for electronic money, excellent in operability and easy in the management of the electronic money. The terminal device used in combination with a host server has a function receiving a predetermined amount of electronic money from the host server when running start is instructed, a function of receiving the electronic money of the amount of payment from an IC card of a customer when a goods is bought, a function of transferring the electronic money to the host server so that when the internal balance of the electronic money exceeds an upper limit value of the balance, the balance of electronic money reaches a lower limit value of the balance, a function of transferring all the internal amount of electronic money to the host server, and other functions.
摘要翻译：适用于电子货币的终端装置和终端系统，操作性优良，易于管理电子货币。与主机服务器组合使用的终端装置具有当指示运行开始时从主机服务器接收预定量的电子货币的功能，从客户IC卡接收付款金额的功能，购买商品，将电子货币转移到主机服务器的功能，使得当电子货币的内部余额超过余额的上限值时，电子货币的余额达到余额的下限值，将所有内部数量的电子货币转入主机服务器的功能等功能。

5. 发明授权

US07403582B2 Serial communication device 有权
标题翻译：串行通信设备
公开(公告)号：US07403582B2
公开(公告)日：2008-07-22
申请号：US10899072
申请日：2004-07-27
申请人： Nobuhiko Akasaka
发明人： Nobuhiko Akasaka
IPC分类号： H04L7/00
CPC分类号： H04L7/044 , H04L7/0331 , H04L25/068
摘要： The invention is a serial communication device for receiving serial data and sampling the serial data with synchronizing with communication clocks. The device has a clock generation unit for dividing a reference clock according to a predetermined dividing value, generating the communication clock each time the number of dividing value of the reference clock is generated, and generating a supplemental clock at any timing of the reference clock between adjacent communication clock; and a data decision circuit for receiving serial data, sampling 1-bit data at sampling timings including at least the adjacent communication clocks and the supplemental clock therebetween, and deciding the 1-bit data according to the decision by majority of the plurality of the sampling data which is sampled.
摘要翻译：本发明是用于接收串行数据并且与通信时钟同步地对串行数据进行采样的串行通信设备。该设备具有时钟生成单元，用于根据预定的分频值对参考时钟进行分频，每当生成基准时钟的分频值的数量时产生通信时钟，并且在参考时钟的任何定时产生补充时钟相邻通讯时钟; 以及数据判定电路，用于接收串行数据，以至少包括相邻通信时钟和其间的补充时钟的采样定时对1位数据进行采样，并根据多个采样中的多数决定来确定1位数据数据采样。

6. 发明申请

US20050160202A1 Direct memory access device 有权
公开(公告)号：US20050160202A1
公开(公告)日：2005-07-21
申请号：US11079136
申请日：2005-03-15
申请人： Norifumi Fukawa , Nobuhiko Akasaka , Koichi Yamamoto
发明人： Norifumi Fukawa , Nobuhiko Akasaka , Koichi Yamamoto
IPC分类号： G06F13/28 , G06F13/38
CPC分类号： G06F13/28
摘要： A direct memory access device is provided which includes: a designation unit for designating transfer modes, when receiving an instruction to transfer data, to perform byte transfers or word transfers for first and last data of the data and word transfers for all other data; and a transfer unit for performing a data transfer by direct memory access from a data transfer source to a data transfer destination by the designated transfer modes.

7. 发明授权

US07454650B2 Microcontroller having a system resource prescaler thereon 有权
标题翻译：其上具有系统资源预分频器的微控制器
公开(公告)号：US07454650B2
公开(公告)日：2008-11-18
申请号：US10790016
申请日：2004-03-02
申请人： Nobuhiko Akasaka
发明人： Nobuhiko Akasaka
IPC分类号： G06F1/10
CPC分类号： G06F15/7814
摘要： A microcontroller operating in synchronization with clock includes: an arithmetic unit operating in synchronization with the clock; an internal resource being connected to the arithmetic unit via a bus, and having at least a bus interface, and an internal circuit operating in synchronization with the clock; and a system resource prescaler which generates from the clock an operation permission signal denoting an operation permission state in m cycles out of n cycles of the clock (m=
摘要翻译：与时钟同步工作的微控制器包括：与时钟同步工作的算术单元; 内部资源经由总线连接到算术单元，并且至少具有总线接口和与时钟同步操作的内部电路; 以及系统资源预分频器，其从时钟生成表示在时钟的n个周期内的m个周期中的操作许可状态的操作许可信号（m =

8. 发明申请

US20050123069A1 Serial communication device 有权
标题翻译：串行通信设备
公开(公告)号：US20050123069A1
公开(公告)日：2005-06-09
申请号：US10899072
申请日：2004-07-27
申请人： Nobuhiko Akasaka
发明人： Nobuhiko Akasaka
IPC分类号： H04L25/08 , H03K9/00 , H04L7/033 , H04L7/04 , H04L25/06 , H04L25/40
CPC分类号： H04L7/044 , H04L7/0331 , H04L25/068
摘要： The invention is a serial communication device for receiving serial data and sampling the serial data with synchronizing with communication clocks. The device has a clock generation unit for dividing a reference clock according to a predetermined dividing value, generating the communication clock each time the number of dividing value of the reference clock is generated, and generating a supplemental clock at any timing of the reference clock between adjacent communication clock; and a data decision circuit for receiving serial data, sampling 1-bit data at sampling timings including at least the adjacent communication clocks and the supplemental clock therebetween, and deciding the 1-bit data according to the decision by majority of the plurality of the sampling data which is sampled.
摘要翻译：本发明是用于接收串行数据并且与通信时钟同步地对串行数据进行采样的串行通信设备。该设备具有时钟生成单元，用于根据预定的分频值对参考时钟进行分频，每当生成基准时钟的分频值的数量时产生通信时钟，并且在参考时钟的任何定时产生补充时钟相邻通讯时钟; 以及数据判定电路，用于接收串行数据，以至少包括相邻通信时钟和其间的补充时钟的采样定时对1位数据进行采样，并根据多个采样中的多数决定来确定1位数据数据采样。

9. 发明授权

US06883041B2 Direct memory access device 失效
标题翻译：直接存储器访问设备
公开(公告)号：US06883041B2
公开(公告)日：2005-04-19
申请号：US10354023
申请日：2003-01-30
申请人： Norifumi Fukawa , Nobuhiko Akasaka , Koichi Yamamoto
发明人： Norifumi Fukawa , Nobuhiko Akasaka , Koichi Yamamoto
IPC分类号： G06F13/28 , G06F13/38
CPC分类号： G06F13/28
摘要： A direct memory access device is provided which includes: a designation unit for designating transfer modes, when receiving an instruction to transfer data, to perform byte transfers or word transfers for first and last data of the data and word transfers for all other data; and a transfer unit for performing a data transfer by direct memory access from a data transfer source to a data transfer destination by the designated transfer modes.
摘要翻译：提供一种直接存储器访问装置，包括：指定传送模式的指定单元，当接收到传送数据的指令时，对数据的第一和最后数据进行字节传送或字传输以及所有其他数据的字传输; 以及传送单元，用于通过由指定的传送模式从数据传送源到数据传送目的地的直接存储器访问来执行数据传送。

10. 发明授权

US07489175B2 Clock supply circuit and method 有权
标题翻译：时钟供电电路及方法
公开(公告)号：US07489175B2
公开(公告)日：2009-02-10
申请号：US11391290
申请日：2006-03-29
申请人： Nobuhiko Akasaka
发明人： Nobuhiko Akasaka
IPC分类号： G06F1/04
CPC分类号： G06F1/04
摘要： An object is to provide a clock supply circuit capable of supplying a clock signal with a short oscillation stabilization waiting time. There is provided a clock supply circuit having a filter removing from a first clock signal pulses having a shorter pulse width than a threshold value and passing pulses having a longer pulse width than the threshold value to thereby output a second clock signal; and a divider dividing the second clock signal to thereby output a third clock signal.
摘要翻译：目的是提供一种能够提供具有短振荡稳定等待时间的时钟信号的时钟供应电路。提供了一种具有滤波器的滤波器的滤波器，其从第一时钟信号消除具有比阈值更短的脉冲宽度的脉冲，并且通过具有比阈值更长的脉冲宽度的脉冲，从而输出第二时钟信号; 以及除法器，对第二时钟信号进行分频，从而输出第三时钟信号。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式