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1. 发明申请

US20060199394A1 Etching solution, method of etching and printed wiring board 有权
标题翻译：蚀刻溶液，蚀刻方法和印刷线路板
公开(公告)号：US20060199394A1
公开(公告)日：2006-09-07
申请号：US10560421
申请日：2005-03-01
申请人： Tsunehisa Takahashi , Shigeki Sawa , Kazuhiko Matsui
发明人： Tsunehisa Takahashi , Shigeki Sawa , Kazuhiko Matsui
IPC分类号： C23F1/00 , C09K13/00 , H01L21/302
CPC分类号： C23F1/18 , C09K13/00 , C23F1/02 , C23F1/34 , H01L21/32134 , H05K3/064 , H05K3/067 , H05K3/383 , H05K2203/0597 , H05K2203/124
摘要： There is provided an etching solution comprised of a cupric chloride solution and a high-concentration triazole type compound added to the cupric chloride solution and capable of forming an etching-inhibiting coating. In a process of forming a circuit pattern by etching with the etching solution, an etching-inhibiting coating is selected formed on parts of a copper foil laid under the edge of an etching resist to effectively inhibit horizontal side-etching of the copper foil from the edge of the etching resist. Also, nonuniform irregularities formed on the side wall of the circuit pattern by the etching improves the adhesion between the circuit pattern and an insulating resin layer covering the circuit pattern.
摘要翻译：提供了由氯化铜溶液和加入到氯化铜溶液中的能够形成蚀刻抑制涂层的高浓度三唑型化合物组成的蚀刻溶液。在通过用蚀刻溶液蚀刻形成电路图案的过程中，在布置在抗蚀剂边缘的铜箔的部分上形成蚀刻抑制涂层，以有效地抑制铜箔的水平侧蚀边缘的抗蚀剂。此外，通过蚀刻形成在电路图案的侧壁上的不均匀的凹凸改善了电路图案和覆盖电路图案的绝缘树脂层之间的粘附。

2. 发明授权

US07357879B2 Etching solution, method of etching and printed wiring board 有权
标题翻译：蚀刻溶液，蚀刻方法和印刷线路板
公开(公告)号：US07357879B2
公开(公告)日：2008-04-15
申请号：US10560421
申请日：2005-03-01
申请人： Tsunehisa Takahashi , Shigeki Sawa , Kazuhiko Matsui
发明人： Tsunehisa Takahashi , Shigeki Sawa , Kazuhiko Matsui
IPC分类号： B44C1/22 , C03C15/00 , C03C25/68 , C23F1/00 , C25F3/00
CPC分类号： C23F1/18 , C09K13/00 , C23F1/02 , C23F1/34 , H01L21/32134 , H05K3/064 , H05K3/067 , H05K3/383 , H05K2203/0597 , H05K2203/124
摘要： There is provided an etching solution comprised of a cupric chloride solution and a high-concentration triazole type compound added to the cupric chloride solution and capable of forming an etching-inhibiting coating. In a process of forming a circuit pattern by etching with the etching solution, an etching-inhibiting coating is selected formed on parts of a copper foil laid under the edge of an etching resist to effectively inhibit horizontal side-etching of the copper foil from the edge of the etching resist. Also, nonuniform irregularities formed on the side wall of the circuit pattern by the etching improves the adhesion between the circuit pattern and an insulating resin layer covering the circuit pattern.
摘要翻译：提供了由氯化铜溶液和加入到氯化铜溶液中的能够形成蚀刻抑制涂层的高浓度三唑型化合物组成的蚀刻溶液。在通过用蚀刻溶液蚀刻形成电路图案的过程中，在布置在抗蚀剂边缘的铜箔的部分上形成蚀刻抑制涂层，以有效地抑制铜箔的水平侧蚀边缘的抗蚀剂。此外，通过蚀刻形成在电路图案的侧壁上的不均匀的凹凸改善了电路图案和覆盖电路图案的绝缘树脂层之间的粘附。

3. 发明授权

US4319930A Method for multi-stage washing 失效
标题翻译：多级清洗方法
公开(公告)号：US4319930A
公开(公告)日：1982-03-16
申请号：US134974
申请日：1980-03-28
申请人： Shunji Yano , Tsunehisa Takahashi
发明人： Shunji Yano , Tsunehisa Takahashi
IPC分类号： A47L15/24 , B08B3/02
CPC分类号： B08B3/022 , A47L15/241
摘要： In a multi-stage washing system comprising a plurality of washing tanks, fresh liquid is applied over a treated material at a front position in the zone of a furthermost tank, whereas in the tanks excluding a nearest tank, washing liquid is pumped from the individual washing tanks in an amount of more than that of the applied fresh liquid and applied over the treated material at a front position in the zones of individual adjacent washing tanks placed after said individual washing tanks in an amount of the applied fresh liquid and a rear position in the zones of said individual washing tanks in the remaining amount.
摘要翻译：在包括多个洗涤槽的多级洗涤系统中，将新鲜液体施加在处于最外层的区域的前部位置的处理材料上，而在不包括最近的罐的罐中，从个体泵送清洗液洗涤槽的数量大于所施加的新鲜液体的量，并且在所述单独的洗涤槽之后的各个相邻的洗涤槽的区域中的处于前处的材料上施加一定量的新鲜液体和后部位置在所述个别洗涤槽的区域中剩余量。

4. 发明授权

US6011222A Substrate for mounting electronic part 失效
标题翻译：用于安装电子部件的基板
公开(公告)号：US6011222A
公开(公告)日：2000-01-04
申请号：US766312
申请日：1996-12-13
申请人： Masataka Sekiya , Tsunehisa Takahashi , Akihiro Demura , Takuji Asai
发明人： Masataka Sekiya , Tsunehisa Takahashi , Akihiro Demura , Takuji Asai
IPC分类号： H01R4/02 , H01R12/34 , H05K1/18 , H01R9/09
CPC分类号： H01R12/585 , H01R12/58 , H01R4/02
摘要： A substrate for mounting an electronic part and a method for producing the same, which allows a conductive pin to be inserted and secured in a through hole without exerting any damage thereto. The substrate for mounting an electronic part is formed of a through hole piercing an insulating substrate and a conductive pin with its head inserted into the through hole. The head of the conductive pin is provided with a plurality of projections to its side wall, each projecting radially in 4 or more directions. Those projections form a plurality of pairs, each of which is extending in an opposite direction from an axial center of the head. Those projection pairs include a primary projection pair having a largest length and a secondary projection pair having a second largest length. The length of the primary projection pair is equal to or more than an inside diameter of the through hole. The length of the secondary projection pair is less than the inside diameter of the through hole,
摘要翻译：用于安装电子部件的基板及其制造方法，其允许导电销插入并固定在通孔中而不会对其造成任何损坏。用于安装电子部件的基板由贯穿绝缘基板的贯通孔和插入贯通孔的导电销形成。导电销的头部设置有多个突出部，其侧壁分别沿4个或更多个方向径向突出。这些突起形成多个对，每对成对，从头部的轴心向相反方向延伸。那些投影对包括具有最大长度的主投影对和具有第二最大长度的第二投影对。第一突起对的长度等于或大于通孔的内径。第二突起对的长度小于通孔的内径，

5. 发明授权

US06229101B1 Substrate for mounting electronic part 有权
标题翻译：用于安装电子部件的基板
公开(公告)号：US06229101B1
公开(公告)日：2001-05-08
申请号：US09329228
申请日：1999-06-10
申请人： Masataka Sekiya , Tsunehisa Takahashi , Akihiro Demura , Takuji Asai
发明人： Masataka Sekiya , Tsunehisa Takahashi , Akihiro Demura , Takuji Asai
IPC分类号： H05K118
CPC分类号： H01R12/585 , H01R4/02 , H01R12/58
摘要： A substrate for mounting an electronic part and a method for producing the same, which allows a conductive pin to be inserted and secured in a through hole without exerting any damage thereto. The substrate for mounting an electronic part is formed of a through hole piercing an insulating substrate and a conductive pin with its head inserted into the through hole. The head of the conductive pin is provided with a plurality of projections to its side wall, each projecting radially in 4 or more directions. Those projections form a plurality of pairs, each of which is extending in an opposite direction from an axial center of the head. Those projection pairs include a primary projection pair having a largest length and a secondary projection pair having a second largest length. The length of the primary projection pair is equal to or more than an inside diameter of the through hole. The length of the secondary projection pair is less than the inside diameter of the through hole.
摘要翻译：用于安装电子部件的基板及其制造方法，其允许导电销插入并固定在通孔中而不会对其造成任何损坏。用于安装电子部件的基板由贯穿绝缘基板的贯通孔和插入贯通孔的导电销形成。导电销的头部设置有多个突出部，其侧壁分别沿4个或更多个方向径向突出。这些突起形成多个对，每对成对，从头部的轴心向相反方向延伸。那些投影对包括具有最大长度的主投影对和具有第二最大长度的第二投影对。第一突起对的长度等于或大于通孔的内径。第二突起对的长度小于通孔的内径。

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