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1. 发明专利

JP2005050913A Semiconductor device having current sensing function 有权
标题翻译：具有电流感应功能的半导体器件
公开(公告)号：JP2005050913A
公开(公告)日：2005-02-24
申请号：JP2003203878
申请日：2003-07-30
申请人： Toyota Central Res & Dev Lab Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社豊田中央研究所
发明人： NISHIBE YUJI , UESUGI TSUTOMU , KIGAMI MASAHITO , HAYASHI EIKO , OTA NORIKAZU , HAMADA KIMIMORI , TAKATANI HIDESHI , TOSHIMA HIDEKI
IPC分类号： H01L29/78 , H01L27/04 , H01L29/06
CPC分类号： H01L29/7815 , H01L29/0696 , H01L29/7813
摘要： PROBLEM TO BE SOLVED: To suppress the fluctuation of the current sensing ratio of a semiconductor device at an atmospheric temperature. SOLUTION: A semiconductor device forms a main region 1 in which main current flows and a sensing region 2 in which branched current flows on the same substrate, and numbers of cells in the sense cell region 2 amount to not more than 0.1% of the numbers in the main cell region. At that time, a resistant temperature coefficient of a peripheral cell existing along the boundary of the regions is equal to that of an inside cell existing away from the boundary. Otherwise, the ratio of the numbers of the peripheral cell and the inside cell is equal in the main region 1 and the sensing region 2. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：抑制半导体器件在大气温度下的电流感测比的波动。解决方案：半导体器件形成主电流流过的主区域1和在同一衬底上流动分支电流的感测区域2，感测单元区域2中的单元数量不大于0.1％的主单元格区域中的数字。此时，沿着该区域的边界存在的周边电池的电阻温度系数与远离边界的内部电池的电阻温度系数相等。否则，主区域1和感测区域2中的外围单元和内部单元的数量的比率相等。（C）2005，JPO和NCIPI

2. 发明专利

JP2005204362A Power supply apparatus 有权
标题翻译：电源设备
公开(公告)号：JP2005204362A
公开(公告)日：2005-07-28
申请号：JP2004005731
申请日：2004-01-13
申请人： Toyota Central Res & Dev Lab Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社豊田中央研究所
发明人： NISHIBE YUJI , KIGAMI MASAHITO , UESUGI TSUTOMU , TAKATANI HIDESHI , HAMADA KIMIMORI
IPC分类号： H01L29/78 , H01L27/04 , H01L29/423 , H02M3/155
CPC分类号： H01L29/7813 , H01L29/42368
摘要： PROBLEM TO BE SOLVED: To provide a power supply circuit of a DC-DC converter capable of suppressing the magnitude of a recovery surge voltage being generated when a second semiconductor switching element is turned off without increasing the number of components.
SOLUTION: A DC-DC converter comprises a first semiconductor switching element Q11 being connected in series between a DC power supply Vin and a load, a second semiconductor switching element Q12 for short-circuiting the load terminals by bypassing the DC power supply Vin and the first semiconductor switching element Q11, and a PWM control circuit alternately repeating a state for turning the second semiconductor switching element Q12 off by turning the first semiconductor switching element Q11 on and a state for turning the second semiconductor switching element Q12 on by turning the first semiconductor switching element Q11 off. Index in involution of the drain-source voltage proportional to the reciprocal of capacitance of the second semiconductor switching element Q12 when turned off is smaller than the index in involution of the drain-source voltage proportional to the reciprocal of capacitance of the first semiconductor switching element Q11 when turned off.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种DC-DC转换器的电源电路，其能够抑制当第二半导体开关元件在不增加部件数量的情况下关闭时产生的恢复浪涌电压的大小。解决方案：DC-DC转换器包括串联连接在直流电源Vin和负载之间的第一半导体开关元件Q11，用于通过旁路直流电源来短路负载端子的第二半导体开关元件Q12 Vin和第一半导体开关元件Q11，PWM控制电路通过使第一半导体开关元件Q11导通而使第二半导体开关元件Q12导通而使第二半导体开关元件Q12转动的状态交替重复，转动第二半导体开关元件Q12的状态第一半导体开关元件Q11断开。与关闭时的第二半导体开关元件Q12的电容的倒数成比例的漏极 - 源极电压的折回的指数小于与第一半导体开关元件的电容的倒数成比例的漏极 - 源极电压的折回的指标 Q11关机时。版权所有（C）2005，JPO＆NCIPI

3. 发明专利

JP2015023115A ショットキーダイオードを内蔵するＦＥＴ有权
标题翻译： FET INCORPORATING肖特基二极管
公开(公告)号：JP2015023115A
公开(公告)日：2015-02-02
申请号：JP2013149323
申请日：2013-07-18
申请人：株式会社豊田中央研究所 , Toyota Central R&D Labs Inc , トヨタ自動車株式会社 , Toyota Motor Corp , 株式会社デンソー , Denso Corp
发明人： WATANABE YUKIHIKO , AOI SACHIKO , TAKATANI HIDESHI , AKIBA ATSUYA
IPC分类号： H01L27/04 , H01L21/28 , H01L21/336 , H01L29/12 , H01L29/41 , H01L29/47 , H01L29/78 , H01L29/872
CPC分类号： H01L29/7806 , H01L21/049 , H01L21/0495 , H01L27/0255 , H01L29/0623 , H01L29/0692 , H01L29/1608 , H01L29/42368 , H01L29/66068 , H01L29/66734 , H01L29/7813 , H01L29/872
摘要：【課題】ショットキーダイオードを内蔵しているFETであって、ショットキーダイオードの形成面積とFETの形成面積の比を自由に調整でき、破壊されにくい構造とする。【解決手段】長く延びているトレンチを利用する。トレンチの長さ方向において断続的に出現する位置にショットキー電極を介在させる。SiCに形成される熱酸化膜の成長速度が遅く、ポリシリコンに形成される熱酸化膜の成長速度が速いことを利用すると、ゲート電極とショットキー電極の間、ゲート電極とソース領域の間、ゲート電極とボディ領域の間、ゲート電極とドレイン領域の間には絶縁膜が形成されており、ショットキー電極とドレイン領域の間には絶縁膜が形成されていない構造を得ることができる。【選択図】図1
摘要翻译：要解决的问题：提供一种结合了肖特基二极管并且具有不太可能被破坏的结构的FET，其中肖特基二极管的形成面积与FET的形成面积的比率可以自由调节。解决方案：使用延长沟槽。肖特基电极插入在沟槽的长度方向上间断地出现的位置处。通过使用在SiC上形成的热氧化膜的生长速度慢，并且在多晶硅上形成的热氧化膜的生长速度快的事实，可以在栅电极和肖特基电极，栅电极和源极区之间，栅电极与体区之间以及栅电极和漏区之间的肖特基电极，但是在肖特基电极和漏极区之间不形成绝缘膜。

4. 发明专利

JP2012234908A Silicon carbide semiconductor device 有权
标题翻译：硅碳化硅半导体器件
公开(公告)号：JP2012234908A
公开(公告)日：2012-11-29
申请号：JP2011101207
申请日：2011-04-28
申请人： Denso Corp , 株式会社デンソー , Toyota Motor Corp , トヨタ自動車株式会社 , Toyota Central R&D Labs Inc , 株式会社豊田中央研究所
发明人： WATANABE HIROKI , MIYAHARA SHINICHIRO , TAKATANI HIDESHI , SUGIMOTO MASAHIRO , WATANABE YUKIHIKO , SOEJIMA SHIGEMASA , ISHIKAWA TAKESHI
IPC分类号： H01L29/12 , H01L29/78
CPC分类号： H01L29/7813 , H01L29/045 , H01L29/0634 , H01L29/1095 , H01L29/1608 , H01L29/66068 , H01L29/7397
摘要： PROBLEM TO BE SOLVED: To minimize decline of the isolation voltage and the life of a gate insulating film, by suppressing unevenness of the side surface and the bottom surface of a trench.SOLUTION: A trench 6 is formed so as to have the direction perpendicular to the direction, i.e. the off direction of an SiC semiconductor substrate, as the longitudinal direction. Since a step bunching SB does not traverse the trench 6, formation of unevenness on the side surface and the bottom surface of the trench 6 due to the step bunching SB can be substantially prevented. Consequently, a gate oxide film 8 is formed on the side surface and the bottom surface of the trench 6 having no unevenness, and decline of the isolation voltage and the life of the gate oxide film 8 can be minimized.
摘要翻译：要解决的问题：通过抑制沟槽的侧表面和底表面的不均匀性来最小化隔离电压的下降和栅极绝缘膜的寿命。解决方案：形成沟槽6，使其具有与<11-20>方向垂直的<1-100>方向，即SiC半导体衬底的关闭方向作为纵向方向。由于台阶聚束SB不穿过沟槽6，所以可以基本上防止由于台阶聚束SB而在沟槽6的侧面和底面上形成凹凸。因此，在不具有不均匀性的沟槽6的侧面和底面上形成栅氧化膜8，能够使隔离电压下降和栅极氧化膜8的使用寿命最小化。版权所有（C）2013，JPO＆INPIT

5. 发明专利

JP2012169385A Silicon carbide semiconductor device 审中-公开
标题翻译：硅碳化硅半导体器件
公开(公告)号：JP2012169385A
公开(公告)日：2012-09-06
申请号：JP2011027996
申请日：2011-02-11
申请人： Denso Corp , Toyota Motor Corp , Toyota Central R&D Labs Inc , トヨタ自動車株式会社 , 株式会社デンソー , 株式会社豊田中央研究所
发明人： MATSUKI HIDEO , YAMAMOTO KENSAKU , NOBORIO MASATO , SUZUKI MASAHIRO , TAKATANI HIDESHI , SUGIMOTO MASAHIRO , MORIMOTO JUN , SOEJIMA SHIGEMASA , ISHIKAWA TAKESHI , WATANABE YUKIHIKO
IPC分类号： H01L29/78 , H01L21/336 , H01L29/12 , H01L29/739
CPC分类号： H01L29/66068 , H01L29/0634 , H01L29/0878 , H01L29/1095 , H01L29/1608 , H01L29/7397 , H01L29/7813
摘要： PROBLEM TO BE SOLVED: To reduce the on-resistance when a deep layer is formed so as to intersect a trench configuring a trench gate structure.SOLUTION: The structure where a p-type deep layer 10 is separated entirely or partially from the inner wall surface of a trench 6, i.e. a layout where the p-type deep layer 10 is not in contact with any one of the side surface or the bottom face of the trench 6, is employed. For example, the p-type deep layer 10 is formed only in a place separated from a trench gate structure, so as not to come into contact with both the side surface and the bottom face of the trench gate structure. Consequently, the channel width can be widened when a channel is formed by applying a gate voltage to a gate electrode 9 during the on-time. When compared with a case where the p-type deep layer 10 is formed so as to come into contact with the trench 6, width of a JFET region can be widened and since the JFET resistance can be reduced, the on-resistance can be reduced.
摘要翻译：要解决的问题：当形成深层以与构成沟槽栅极结构的沟槽交叉时，降低导通电阻。解决方案：p型深层10完全或部分地从沟槽6的内壁表面分离的结构，即p型深层10不与任何一种使用沟槽6的侧表面或底面。例如，p型深层10仅形成在与沟槽栅极结构分离的位置，以便不与沟槽栅极结构的侧面和底面接触。因此，通过在导通时间对栅电极9施加栅极电压来形成通道时，可以扩大通道宽度。当与形成p型深层10以与沟槽6接触的情况相比较，可以扩大JFET区域的宽度，并且由于可以减小JFET电阻，可以降低导通电阻。版权所有（C）2012，JPO＆INPIT

6. 发明专利

JP2012134376A Silicon carbide semiconductor device and method of manufacturing the same 有权
标题翻译：硅碳化硅半导体器件及其制造方法
公开(公告)号：JP2012134376A
公开(公告)日：2012-07-12
申请号：JP2010286101
申请日：2010-12-22
申请人： Denso Corp , Toyota Central R&D Labs Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社デンソー , 株式会社豊田中央研究所
发明人： MIMURA TOMOHIRO , MIYAHARA SHINICHIRO , TAKATANI HIDESHI , SUGIMOTO MASAHIRO , SOEJIMA SHIGEMASA , ISHIKAWA TAKESHI , WATANABE YUKIHIKO
IPC分类号： H01L29/78 , H01L21/336 , H01L29/12 , H01L29/739
CPC分类号： H01L29/66068 , H01L29/045 , H01L29/1608 , H01L29/4236 , H01L29/42368 , H01L29/7397 , H01L29/7813
摘要： PROBLEM TO BE SOLVED: To widen a process window and obtain the reliability of a gate oxide film while ensuring high channel mobility, when forming a trench gate structure.SOLUTION: An n-type substrate 1 having a Si plane as a primary surface is used, and a trench 6 for forming a trench gate structure is formed in a reverse taper shape. For this reason, since the sidewalls of the trench 6 have the same state as that of a trench in a taper shape when a C plane is used as the primary surface, the reduction in channel mobility can be lowered even if variation in the sidewall angle of the trench 6 occurs. Consequently, high channel mobility can be obtained. Besides, because the bottom surface of the trench 6 and surfaces of the outside (an n-type source region 4 and a ptype contact layer 5) of the trench 6 are the Si planes, a gate oxide film 7 becomes a high-reliability film that can suppress degradation.
摘要翻译：要解决的问题：当形成沟槽栅极结构时，拓宽工艺窗口并获得栅极氧化膜的可靠性，同时确保高沟道迁移率。
解决方案：使用具有Si平面作为主表面的n + 型衬底1，并且形成沟槽栅极结构的沟槽6以相反的方式形成锥形。因此，由于当使用C面作为主表面时，由于沟槽6的侧壁具有与锥形形状的沟槽相同的状态，所以即使侧壁角度的变化也能够降低沟道迁移率发生沟槽6。因此，可以获得高通道迁移率。此外，由于沟槽6的底面和外表面（n + 型源区4和ap + SP >型接触层5）是Si平面，栅极氧化膜7成为可以抑制劣化的高可靠性膜。版权所有（C）2012，JPO＆INPIT

7. 发明专利

JP2012009502A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2012009502A
公开(公告)日：2012-01-12
申请号：JP2010141744
申请日：2010-06-22
申请人： Denso Corp , Toyota Central R&D Labs Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社デンソー , 株式会社豊田中央研究所
发明人： YAMAMOTO KENSAKU , SUZUKI MASAHIRO , TAKATANI HIDESHI , SUGIMOTO MASAHIRO , MORIMOTO ATSUSHI , SOEJIMA SHIGEMASA , ISHIKAWA TAKESHI , WATANABE YUKIHIKO
IPC分类号： H01L29/78 , H01L29/06 , H01L29/12
CPC分类号： H01L29/7811 , H01L29/0619 , H01L29/0661 , H01L29/0878 , H01L29/1095 , H01L29/1608 , H01L29/407 , H01L29/66068 , H01L29/7397 , H01L29/7813 , H01L29/8613
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which enhances breakdown voltage by resolving occurence of discontinuity of material at an area contacting an electric field relaxation layer and omitting bent portions from the electric field relaxation layer.SOLUTION: The semiconductor device includes an electric field relaxation layer 3a for providing a peripheral breakdown voltage structure by using a p-type base layer 3. Accordingly, bent portions can be omitted from the electric field relaxation layer 3a. Since only an n-type drift layer 2a is a semiconductor which the electric field relaxation layer 3a is in contact with, discontinuity of materials does not occur. Consequently, breakdown voltage of an SiC semiconductor device can be enhanced.
摘要翻译：解决的问题：提供一种半导体器件，其通过解决在与电场弛豫层接触的区域处的材料不连续的发生并且从电场弛豫层省略弯曲部分来提高击穿电压。解决方案：半导体器件包括用于通过使用p型基极层3提供外围击穿电压结构的电场弛豫层3a。因此，可以从电场弛豫层3a省略弯曲部分。由于只有n

8. 发明专利

JP2011216783A Semiconductor device and method of manufacturing semiconductor device 有权
标题翻译：半导体器件及制造半导体器件的方法
公开(公告)号：JP2011216783A
公开(公告)日：2011-10-27
申请号：JP2010085438
申请日：2010-04-01
申请人： Denso Corp , Toyota Central R&D Labs Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社デンソー , 株式会社豊田中央研究所
发明人： TAKATANI HIDESHI , MATSUKI HIDEO , SUZUKI MASAHIRO , ISHIKAWA TAKESHI
IPC分类号： H01L29/78 , H01L21/336 , H01L29/12
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device having a structure such that a trench gate insulating film is not broken by an applied electric field without increasing the on resistance.SOLUTION: The semiconductor device includes a first semiconductor layer 12a of a first conductivity type formed on a semiconductor substrate 16, a second semiconductor layer 12b of the first conductivity type formed in a partial region on the first semiconductor layer, a third semiconductor layer 13 of a second conductivity type formed on the first semiconductor layer and second semiconductor layer, a trench having a bottom at the second semiconductor layer, a fourth semiconductor layer 17 of a first conductivity type formed on both sides of the trench, a gate insulating film 14 formed in the trench, and a gate electrode 15, wherein the gate insulating film is formed having a thicker film thickness on the bottom of the trench than that on a side face of the trench, and a depth-directional interface between the gate insulating film and gate electrode on the bottom of the trench is formed at a position deeper than a depth-directional interface between the second semiconductor layer and third semiconductor layer.
摘要翻译：要解决的问题：提供一种半导体器件，其具有这样的结构，使得沟槽栅极绝缘膜在不增加导通电阻的情况下不受施加的电场的破坏。解决方案：半导体器件包括第一导电类型的第一半导体层12a 形成在半导体基板16上，形成在第一半导体层上的部分区域中的第一导电类型的第二半导体层12b，形成在第一半导体层和第二半导体层上的第二导电类型的第三半导体层13，在第二半导体层具有底部的沟槽，形成在沟槽的两侧的第一导电类型的第四半导体层17，形成在沟槽中的栅极绝缘膜14和栅极电极15，其中栅极绝缘膜为在沟槽的底部形成的厚度比沟槽的侧面上的膜厚更深，并具有深度方向的相互之间沟槽底部的栅极绝缘膜与栅电极之间的面形成在比第二半导体层与第三半导体层之间的深度方向界面更深的位置。

9. 发明专利

JP2014130896A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2014130896A
公开(公告)日：2014-07-10
申请号：JP2012287323
申请日：2012-12-28
申请人： Toyota Motor Corp , トヨタ自動車株式会社 , Toyota Central R&D Labs Inc , 株式会社豊田中央研究所
发明人： TAKATANI HIDESHI , NAGAO MASARU , SOEJIMA SHIGEMASA
IPC分类号： H01L29/78 , H01L29/06 , H01L29/12
CPC分类号： H01L29/0623 , H01L29/0649 , H01L29/0661 , H01L29/1608 , H01L29/42368 , H01L29/42372 , H01L29/4238 , H01L29/7397 , H01L29/7811 , H01L29/7813 , H01L29/8611
摘要： PROBLEM TO BE SOLVED: To provide an art capable of preventing a damage of a gate pad even when a high voltage is applied to a semiconductor device.SOLUTION: A semiconductor device 10 disclosed in the present specification comprises a semiconductor substrate 11 having an element region 12 and a peripheral region 14 which surrounds the element region 12. In the element region 12, an insulated gate semiconductor element having a gate electrode 16 is formed. In the peripheral region 14, a second breakdown voltage holding structure 18 surrounding the element region 12 and a first breakdown voltage holding structure surrounding the second breakdown voltage holding structure 18 are formed. A gate pad 22 electrically connected with the gate electrode 16 is arranged at a position on a surface side of the semiconductor substrate 11, and on the first breakdown voltage holding structure 20 side over a boundary of the second breakdown voltage holding structure 18 on the element region 12 side, and on the second breakdown voltage holding structure 18 side over a boundary of the first breakdown voltage holding structure 20 on the element region 12 side.
摘要翻译：要解决的问题：提供一种即使在对半导体器件施加高电压时也能够防止栅极焊盘的损坏的技术。解决方案：本说明书中公开的半导体器件10包括具有元件区域的半导体衬底11 12和围绕元件区域12的周边区域14.在元件区域12中，形成具有栅极电极16的绝缘栅极半导体元件。在周边区域14中，形成围绕元件区域12的第二击穿电压保持结构18和围绕第二击穿电压保持结构18的第一击穿电压保持结构。与栅电极16电连接的栅极焊盘22配置在半导体基板11的表面侧的位置，第一击穿电压保持结构20侧的第一击穿电压保持结构18的边界上的元件区域12侧，第二击穿电压保持结构18侧在元件区域12侧的第一击穿电压保持结构体20的边界上。

10. 发明专利

JP2013012590A Silicon carbide semiconductor device 有权
标题翻译：硅碳化硅半导体器件
公开(公告)号：JP2013012590A
公开(公告)日：2013-01-17
申请号：JP2011144320
申请日：2011-06-29
申请人： Denso Corp , 株式会社デンソー , Toyota Motor Corp , トヨタ自動車株式会社 , Toyota Central R&D Labs Inc , 株式会社豊田中央研究所
发明人： MIYAHARA SHINICHIRO , TAKATANI HIDESHI , SUGIMOTO MASAHIRO , WATANABE YUKIHIKO , SOEJIMA SHIGEMASA , ISHIKAWA TAKESHI
IPC分类号： H01L29/78 , H01L21/336 , H01L29/12
CPC分类号： H01L29/7813 , H01L29/045 , H01L29/0865 , H01L29/1095 , H01L29/1608 , H01L29/4236 , H01L29/66068 , H01L29/7825 , H01L29/7827
摘要： PROBLEM TO BE SOLVED: To obtain a high channel mobility by bringing the side surface of a trench, in which a channel is formed, close to the (11-20) plane or the (1-100) plane capable of increasing the channel mobility.SOLUTION: An nsource region 5 is formed so as to come into contact with one side surface out of both side surfaces of a trench 7, i.e. the side surface which forms an angle of 90° or an angle close to it with respect to the (0001) plane, so that a channel is formed in only one of both side surfaces of the trench 7. Since the channel can be formed only in the side surface where a high channel mobility is formed out of both side surfaces of the trench 7, a high channel mobility can be obtained.
摘要翻译：要解决的问题：为了通过使形成沟道的沟槽的侧表面靠近能够增加的（11-20）面或（1-100）面来获得高沟道迁移率渠道流动性。源极区域5形成为与沟槽7的两个侧表面中的一个侧表面接触，即侧表面相对于（0001）面形成90°的角度或与其接近的角度，使得沟槽仅形成在沟槽7的两个侧表面中的一个中。由于沟道仅可以形成在侧表面其中在沟槽7的两个侧表面形成高沟道迁移率，可以获得高沟道迁移率。版权所有（C）2013，JPO＆INPIT

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