会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明授权
    • Data processing system having plurality of processors and executing series of processings in prescribed order
    • 数据处理系统具有多个处理器,并以规定的顺序执行一系列处理
    • US06633975B1
    • 2003-10-14
    • US09437406
    • 1999-11-10
    • Kenichi SawadaAtsushi IshikawaMitsuru ObaraToshiya Shirasawa
    • Kenichi SawadaAtsushi IshikawaMitsuru ObaraToshiya Shirasawa
    • G06F15177
    • G06F15/8053
    • A data processing system has the following construction in order to achieve high speed data processing with reduced memory capacity. There are provided a memory to store a plurality of pieces of sequentially input data to be processed, a plurality of processors to execute a series of processings, e.g., Log conversion, MTF correction, gamma correction and binarization in this order to the data to be processed stored in the memory in the order of input, and a state control portion to determine which processing is stagnant by monitoring the progress of a processing by each of said plurality of processors and prohibit a processor executing a processing succeeding to a processing determined as being stagnant from accessing the memory. Processings by the plurality of processors are executed asynchronously and the plurality of processors share the memory.
    • 数据处理系统具有以下结构,以便以较低的存储容量实现高速数据处理。 提供存储多个待处理的顺序输入数据的存储器,多个处理器,以按顺序执行一系列处理,例如日志转换,MTF校正,伽马校正和二值化处理 以输入顺序存储在存储器中的状态控制部分,以及状态控制部分,通过监视所述多个处理器中的每个处理器的处理进度来确定哪个处理是停滞的,并且禁止执行处理的处理器被确定为 停止访问内存。 多个处理器的处理是异步执行的,并且多个处理器共享存储器
    • 3. 发明授权
    • Method of and apparatus for image processing
    • 图像处理方法及装置
    • US06366702B1
    • 2002-04-02
    • US09103308
    • 1998-06-23
    • Mitsuru ObaraAtsushi IshikawaKenichi Sawada
    • Mitsuru ObaraAtsushi IshikawaKenichi Sawada
    • G06K936
    • H04N1/41
    • The method and apparatus particularly adapted for reducing the storage capacity of line memories needed for temporarily storing image data for lines until image data for the last line is obtained in digital filtering. Inputted image data are divided into a plurality of blocks, each of which consists of image data obtained from n pixels. The integer n may assume a value of 8, 16, 32, etc. The constituents of one block after another are compressed such that image data consisting of 8 bits per pixel are converted into encoded data consisting of 2 bits per pixel. Data on a dynamic range and an average value for each block are added as a headder to the encoded data. Compressed image data are taken out of a buffer memory after being temporarily stored therein and, together with or separately from compressed image data newly outputted from a compression unit, subjected to image processing such as MTF correction in an arithmetic unit. Image processing to be carried out in the arithmetic unit normally includes expansion and correction to be carried out independently of or simultaneously with each other.
    • 该方法和装置特别适用于减少用于临时存储用于行的图像数据所需的行存储器的存储容量,直到在数字滤波中获得用于最后一行的图像数据。 输入图像数据被分成多个块,每个块由从n个像素获得的图像数据组成。 整数n可以采取8,16,32等的值。一个块之后的一个块的组成被压缩,使得由每像素8位组成的图像数据被转换成由每像素2位组成的编码数据。 关于每个块的动态范围和平均值的数据作为编码数据的头像被添加。 压缩图像数据在暂时存储之后从缓冲存储器中取出,并且与压缩单元新输出的压缩图像数据一起或分开地在运算单元中进行诸如MTF校正的图像处理。 在运算单元中执行的图像处理通常包括彼此独立地或同时进行的扩展和校正。
    • 6. 发明授权
    • Image processing device
    • 图像处理装置
    • US06332045B1
    • 2001-12-18
    • US09199406
    • 1998-11-25
    • Kenichi SawadaAtsushi Ishikawa
    • Kenichi SawadaAtsushi Ishikawa
    • G06F1570
    • G06T5/002G06T5/20
    • An image processing device includes an image data correction unit for correcting multi-level image data of a target pixel; an image data binarizer for binarizing the corrected multi-level image data of the target pixel; a binarization error calculator which calculates a first error between the corrected multi-level image data and the image data of pixels within a first region on a periphery of the target pixel that is binarized by the image data binarizer; and a device for executing a predetermined filtering process on the first error to calculate a second error, and for weighting and averaging the second error for pixels within the first region; wherein the image data correction unit corrects the multi-level image data by using the weighted and averaged second error.
    • 图像处理装置包括用于校正目标像素的多级图像数据的图像数据校正单元; 图像数据二值化器,用于二值化目标像素的校正的多级图像数据; 二值化误差计算器,其计算校正后的多级图像数据与由图像数据二值化器二值化的目标像素的周边上的第一区域内的像素的图像数据之间的第一误差; 以及用于对所述第一误差执行预定滤波处理以计算第二误差并且用于对所述第一区域内的像素的所述第二误差进行加权和平均的装置; 其中所述图像数据校正单元通过使用所述加权和平均的第二误差来校正所述多级图像数据。
    • 7. 发明授权
    • Image processing apparatus and method for processing gradation image data using error diffusion
    • 使用误差扩散处理灰度图像数据的图像处理装置和方法
    • US06356361B1
    • 2002-03-12
    • US09178452
    • 1998-10-23
    • Atsushi IshikawaKenichi Sawada
    • Atsushi IshikawaKenichi Sawada
    • G06K938
    • H04N1/4052
    • An image processing apparatus that can speed the process without degrading the resolution and gradation of the original error diffusion method includes a product sum calculation unit for calculating a weighted mean error E′avexy leaving out the binarization error of an input pixel Ix−1,y, an adder for adding the calculated result of the product sum calculation unit to Ixy to output I″xy, a multiplier 25 for calculating a diffusion error E′x−1,y, from the binarization error Ex−1,y of Ix−1,y to be error-diffused to Ixy, and a comparator for setting the output pixel Bxy to 1 when E′x−1,y≧Th−I″xy is established and to 0 when not established.
    • 可以在不降低原始误差扩散方法的分辨率和灰度的情况下加速处理的图像处理装置包括:乘积和计算单元,用于计算加权平均误差E'avexy,从而省略输入像素Ix-1的二值化误差,y ,用于将产生和计算单元的计算结果与Ixy相加的输出I'xy的加法器,用于计算扩散误差E'x-1的乘法器25,从二进制化误差Ex-1,yx -1,y被错误扩散到Ixy,以及用于当E'x-1,y> = Th-I'xy建立时将输出像素Bxy设置为1的比较器,并且当不建立时将其设置为0。
    • 10. 发明授权
    • Semiconductor device
    • 半导体器件
    • US08988132B2
    • 2015-03-24
    • US13497392
    • 2011-02-23
    • Kenichi Sawada
    • Kenichi Sawada
    • H03K17/687H01L27/02H01L21/82H01L25/07H01L25/18H02M1/08
    • H01L27/0285H01L21/8213H01L25/072H01L25/18H01L2924/0002H02M1/08Y02B70/1483H01L2924/00
    • Provided is a semiconductor device which avoids an adverse effect of high temperatures due to a switching element and in which a circuit to prevent false firing is arranged on the same substrate as the switching element. An N-channel type MOSFET 10 and a JFET 30 of an N-channel type containing a semiconductor material of silicon carbide are individually arranged in proximity on conductive patterns 51, 52 on a substrate 5, and a gate electrode 13 of the MOSFET 10 and a drain electrode 31 of the JFET 30 are connected by a lead 61. When an external drive signal for on/off control of MOSFET 10 propagates between source electrode 32 and drain electrode 31 of JFET 30, the channel resistance of JFET 30 is changed to a large/small value according to a low/high level of gate voltage between source electrode 32 and gate electrode 33, whereby a leading edge of a switching waveform between drain electrode 11 and source electrode 12 of MOSFET 10 comes to have a gentler slope than a trailing edge thereof.
    • 提供一种半导体器件,其避免了由于开关元件引起的高温的不利影响,并且其中防止假燃烧的电路布置在与开关元件相同的基板上。 包含碳化硅半导体材料的N沟道型MOSFET 10和NFET型JFET 30分别排列在衬底5上的导电图案51,52和MOSFET 10的栅极13上, JFET 30的漏电极31由引线61连接。当用于MOSFET10的导通/截止控制的外部驱动信号在JFET 30的源电极32和漏电极31之间传播时,JFET 30的沟道电阻变为 根据源电极32与栅电极33之间的栅极电压的低/高电平,大/小的值,MOSFET 10的漏电极11和源电极12之间的开关波形的前沿具有比 其后缘。