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1. 发明授权

US4318115A Dual junction photoelectric semiconductor device 失效
标题翻译：双结光电半导体器件
公开(公告)号：US4318115A
公开(公告)日：1982-03-02
申请号：US60188
申请日：1979-07-24
申请人： Toshihumi Yoshikawa , Zempei Tani , Akira Aso , Hitoshi Kawanabe
发明人： Toshihumi Yoshikawa , Zempei Tani , Akira Aso , Hitoshi Kawanabe
IPC分类号： H01L25/04 , H01L31/02 , H01L31/11 , H01L27/14
CPC分类号： H01L31/02019 , H01L25/043 , H01L31/11 , H01L2924/0002
摘要： A photoelectric semiconductor device is disclosed which exhibits a reduced spectral sensitivity in a desired wavelength zone. An N(P) type impurity region is formed in a P(N) type semiconductor substrate to establish a first PN junction functioning as a first photodiode. A P(N) type impurity region is shallowly formed in the N(P) type impurity region to establish a second PN junction functioning as a second photodiode. When the first PN junction is shunted, the photoelectric semiconductor device shows a spectral sensitivity which is reduced in the longer wavelength zone. Contrarily, when the second PN junction is shunted, the photoelectric semiconductor device shows the spectral sensitivity which is reduced in the shorter wavelength zone.
摘要翻译：公开了一种光电半导体器件，其在期望的波长区域中具有降低的光谱灵敏度。在P（N）型半导体衬底中形成N（P）型杂质区，以建立用作第一光电二极管的第一PN结。在N（P）型杂质区域中浅层形成P（N）型杂质区，以建立起第二光电二极管的第二PN结。当第一PN结分流时，光电半导体器件显示在较长波长区域中减小的光谱灵敏度。相反，当第二PN结分流时，光电半导体器件显示在较短波长区域中减小的光谱灵敏度。

2. 发明授权

US4309604A Apparatus for sensing the wavelength and intensity of light 失效
标题翻译：用于感测光的波长和强度的装置
公开(公告)号：US4309604A
公开(公告)日：1982-01-05
申请号：US60189
申请日：1979-07-24
申请人： Toshihumi Yoshikawa , Zempei Tani , Akira Aso , Hitoshi Kawanabe
发明人： Toshihumi Yoshikawa , Zempei Tani , Akira Aso , Hitoshi Kawanabe
IPC分类号： G01J1/44 , G01J3/427 , G01J3/50 , G01J9/00 , G06K7/12 , H01L25/04 , H01L31/02 , H01L31/11 , G01J1/42 , G01J3/46 , H01L27/14
CPC分类号： H01L31/11 , G01J1/44 , G01J3/427 , G01J9/00 , G06K7/12 , H01L25/043 , H01L31/02019 , G01J2003/466 , G01J3/50 , H01L2924/0002 , H01L2924/3011
摘要： Disclosed is a solid state wavelength detection system responding to output signals derived from a photoelectric semiconductor device. The photoelectric semiconductor device comprise at least two PN junctions formed at different depth from the surface of the semiconductor substrate. A deeper PN junction develops an output signal related to longer wavelength component of the light impinging thereon. A shallower PN junction develops an output signal related to shorter wavelength component of the impinging light. These two output signals are logarithmically compressed and compared with each other. Difference of the logarithmically compressed output signals represents the wavelength information of the impinging light.
摘要翻译：公开了一种响应于从光电半导体器件得到的输出信号的固态波长检测系统。光电半导体器件包括形成在与半导体衬底的表面不同深度的至少两个PN结。更深的PN结产生与其上的光的较长波长分量相关的输出信号。较浅的PN结产生与入射光的较短波长分量有关的输出信号。这两个输出信号被对数压缩并相互比较。对数压缩输出信号的差异表示入射光的波长信息。

3. 发明授权

US4326210A Light-responsive field effect mode semiconductor devices 失效
标题翻译：光响应场效应模式半导体器件
公开(公告)号：US4326210A
公开(公告)日：1982-04-20
申请号：US149258
申请日：1980-05-12
申请人： Akira Aso , Hitoshi Kawanabe
发明人： Akira Aso , Hitoshi Kawanabe
IPC分类号： H01L31/112 , H01L29/80
CPC分类号： H01L31/1124
摘要： A field effect semiconductor device comprises a P-N junction with a depletion layer responsive to radiant energy for controllably enabling the field effect semiconductor device. The depletion layer occurs near at least a pair of gate locations within a silicon substrate. The gate locations are of P-type while the silicon substrate is of N-type. The depletion layer is rendered ineffective by photoelectromotive force derived from the radiant energy. A channel emerges according to the shrinkage of the depletion layer to thereby provide electrical connection between a source and drain electrodes of the field effect transistor.
摘要翻译：场效应半导体器件包括具有响应于辐射能的耗尽层的P-N结，用于可控地实现场效应半导体器件。耗尽层发生在硅衬底内的至少一对栅极位置附近。栅极位置为P型，而硅衬底为N型。通过从辐射能导出的光电动势使耗尽层变得无效。根据耗尽层的收缩，出现通道，从而提供场效应晶体管的源极和漏极之间的电连接。

4. 发明授权

US5117134A CMOS or TTL to ECL level conversion device 失效
标题翻译： CMOS或TTL到ECL电平转换器件
公开(公告)号：US5117134A
公开(公告)日：1992-05-26
申请号：US573402
申请日：1990-08-24
申请人： Akira Aso
发明人： Akira Aso
IPC分类号： H03K19/0175 , H03K19/086
CPC分类号： H03K19/017563
摘要： The semiconductor level conversion device for an ECL circuit having a pair of transistors connected commonly at their emitters. A first gate circuit is connected to apply a first output signal to a base of one of the transistors, and a second gate circuit is connected to apply a second output signal to a base of the other of the transistors. The first and second output signals are held in-phase relation to each other. The first output signal has a high logic level lower than that of the second output signal and a low logic level higher than that of the second output signal.
摘要翻译：用于ECL电路的半导体电平转换装置，其具有在其发射极处共同连接的一对晶体管。第一门电路被连接以将第一输出信号施加到晶体管之一的基极，并且第二栅极电路被连接以将第二输出信号施加到另一个晶体管的基极。第一和第二输出信号彼此保持同相关系。第一输出信号的逻辑电平低于第二输出信号，逻辑电平低于第二输出信号。

5. 发明申请

US20050208824A1 Flat cable and connector as well as electronic device 有权
标题翻译：扁平电缆和连接器以及电子设备
公开(公告)号：US20050208824A1
公开(公告)日：2005-09-22
申请号：US10938581
申请日：2004-09-13
申请人： Shun Kayama , Yukiko Shimizu , Masayoshi Iida , Tomisaburo Yamaguchi , Shinsuke Kunishi , Akira Aso
发明人： Shun Kayama , Yukiko Shimizu , Masayoshi Iida , Tomisaburo Yamaguchi , Shinsuke Kunishi , Akira Aso
IPC分类号： H01B7/08 , H01R12/26 , H01R12/28 , H05K1/11 , H05K7/12 , H01R12/24
CPC分类号： H01R12/772 , H01R12/79 , H01R12/88
摘要： A connector 1 according to the invention comprises a main body 10 for receiving the front end of a flat cable 2 being inserted therein, a movable pressurizing member 11 adapted to press and rigidly secure in position the flat cable 2 inserted into the main body 10 and projections 13 arranged either on the main body 10 or on the pressurizing member 11 so as to be engaged respectively with the corresponding holes 23 of the flat cable 2 when the front end of the flat cable is inserted into the connector 1 to take a right position in the connector 1. The flat cable 2 comprises a flexible base member 21 and wires 22 formed in the flexible base member 21, the flexible base member 21 being provided with holes 23 to be engaged respectively with the corresponding projections 13 arranged in the connector 1 when the flexible base member 21 is inserted into the connector 1 to take a right position in the connector 1.
摘要翻译：根据本发明的连接器1包括：主体10，用于容纳插入其中的扁平电缆2的前端;可移动加压构件11，其适于将插入主体10的扁平电缆2按压并刚性地固定在适当位置，当扁平电缆的前端插入到连接器1中以取得正确的位置时，突起13分别布置在主体10上或加压构件11上，以分别与扁平电缆2的相应的孔23接合在连接器1中。扁平电缆2包括柔性基部构件21和形成在柔性基底构件21中的导线22，柔性基底构件21设置有孔23，分别与布置在连接器1中的相应突起13接合， 21插入连接器1中以在连接器1中取正确的位置。

6. 发明授权

US5354214A Printed circuit board electrical connector with mounting latch clip 失效
标题翻译：带安装锁扣的印刷电路板电气连接器
公开(公告)号：US5354214A
公开(公告)日：1994-10-11
申请号：US97347
申请日：1993-07-23
申请人： Akira Aso , Russell J. Leonard , George M. Simmel
发明人： Akira Aso , Russell J. Leonard , George M. Simmel
IPC分类号： H01R13/639 , H01R12/71 , H01R12/79 , H01R9/07
CPC分类号： H01R12/79 , H01R12/716 , H01R13/6271
摘要： An electrical connector is disclosed for interconnecting a flat flexible circuit to a printed circuit board. The connector includes a dielectric housing having an elongated mouth for receiving the flat flexible circuit. Terminals are mounted in the housing and are adapted for coupling appropriate conductors of the flat flexible circuit with circuit traces on the printed circuit board. An actuator has an elongated tongue for insertion into the mouth of the housing to maintain the flat flexible circuit in engagement with the terminals. At least one latch/mounting clip is mounted on the housing, and a complementary interengaging latch is provided between a first portion of the clip and the actuator to hold the actuator in its inserted position on the housing. A second portion of the clip is adapted for operative association with the printed circuit board.
摘要翻译：公开了一种用于将扁平柔性电路与印刷电路板互连的电连接器。连接器包括具有用于接收扁平柔性电路的细长口的绝缘外壳。端子安装在壳体中并且适于将扁平柔性电路的适当导体与印刷电路板上的电路迹线耦合。致动器具有用于插入壳体的口中的细长的舌部，以保持扁平柔性电路与端子接合。至少一个闩锁/安装夹安装在壳体上，并且在夹子的第一部分和致动器之间设置互补的互锁闩锁，以将致动器保持在其在壳体上的插入位置。夹子的第二部分适于与印刷电路板操作关联。

7. 发明授权

US4410222A Electrical connector for a ribbon cable 失效
标题翻译：带状电缆的电气连接器
公开(公告)号：US4410222A
公开(公告)日：1983-10-18
申请号：US280706
申请日：1981-07-06
申请人： Masahiro Enomoto , Yoshiyuki Awano , Yuji Yamada , Akira Aso
发明人： Masahiro Enomoto , Yoshiyuki Awano , Yuji Yamada , Akira Aso
IPC分类号： H01R4/24 , H01R4/02 , H01R13/506 , H01R13/633 , H01R23/54
CPC分类号： H01R12/79 , H01R12/675 , H01R13/506 , H01R13/633 , H01R4/02 , H01R4/2445
摘要： An electrical connector assembly for electrically connecting insulation-clad ribbon cable to a circuit member. The connector assembly includes a female connector, which is connected to the ribbon cable, and a male connector or header, which is connected to said circuit member, and is adapted to mate with the female connector. Selectively removeable strain relief means are provided as part of the female connector. The male connector has a pair of improved, pivotly mounted manually manipulatable lever means for selectively ejecting or locking the female connector with the male connector. The lever means can positively lock and mate the female connector to the male connector whether or not the strain relief means is mounted on the female connector.
摘要翻译：一种用于将绝缘包覆带状电缆电连接到电路部件的电连接器组件。连接器组件包括连接到带状电缆的阴连接器和连接到所述电路构件并且适于与母连接器配合的阳连接器或插头。可选择地移除的应变消除装置被提供作为阴连接器的一部分。阳连接器具有一对改进的，枢转安装的可手动操纵的杠杆装置，用于选择性地将阴连接器与阳连接器弹出或锁定。不管应变消除装置是否安装在母连接器上，杠杆装置可以将母连接器正确地锁定并配合到公连接器。

8. 发明授权

US07134891B2 Flat cable and connector as well as electronic device 有权
标题翻译：扁平电缆和连接器以及电子设备
公开(公告)号：US07134891B2
公开(公告)日：2006-11-14
申请号：US10938581
申请日：2004-09-13
申请人： Shun Kayama , Yukiko Shimizu , Masayoshi Iida , Tomisaburo Yamaguchi , Shinsuke Kunishi , Akira Aso
发明人： Shun Kayama , Yukiko Shimizu , Masayoshi Iida , Tomisaburo Yamaguchi , Shinsuke Kunishi , Akira Aso
IPC分类号： H01R13/15
CPC分类号： H01R12/772 , H01R12/79 , H01R12/88
摘要： A connector 1 according to the invention comprises a main body 10 for receiving the front end of a flat cable 2 being inserted therein, a movable pressurizing member 11 adapted to press and rigidly secure in position the flat cable 2 inserted into the main body 10 and projections 13 arranged either on the main body 10 or on the pressurizing member 11 so as to be engaged respectively with the corresponding holes 23 of the flat cable 2 when the front end of the flat cable is inserted into the connector 1 to take a right position in the connector 1. The flat cable 2 comprises a flexible base member 21 and wires 22 formed in the flexible base member 21, the flexible base member 21 being provided with holes 23 to be engaged respectively with the corresponding projections 13 arranged in the connector 1 when the flexible base member 21 is inserted into the connector 1 to take a right position in the connector 1.
摘要翻译：根据本发明的连接器1包括：主体10，用于接收插入其中的扁平电缆2的前端;可移动加压构件11，适于将插入主体10的扁平电缆2按压并刚性固定; 当扁平电缆的前端插入到连接器1中以取得正确的位置时，突起13分别布置在主体10上或加压构件11上，以分别与扁平电缆2的相应的孔23接合在连接器1中。扁平电缆2包括柔性基部构件21和形成在柔性基底构件21中的导线22，柔性基底构件21设置有孔23，分别与布置在连接器1中的相应突起13接合， 21插入连接器1中以在连接器1中取正确的位置。

9. 发明授权

US4947233A Semi-custom LSI having input/output cells 失效
标题翻译：具有输入/输出单元的半定制LSI
公开(公告)号：US4947233A
公开(公告)日：1990-08-07
申请号：US113831
申请日：1987-10-26
申请人： Akira Aso
发明人： Akira Aso
IPC分类号： H01L21/60 , H01L21/822 , H01L27/04 , H01L27/118
CPC分类号： H01L24/06 , H01L24/49 , H01L27/11898 , H01L2224/05553 , H01L2224/05554 , H01L2224/06153 , H01L2224/48 , H01L2224/49171 , H01L2224/49175 , H01L2924/00014 , H01L2924/01033 , H01L2924/14
摘要： A semi-custom LSI formed on a semiconductor chip includes a plurality of basic cells formed in a central portion of the semiconductor chip, a plurality of input/output cells formed in a peripheral portion of the semiconductor chip, a plurality of bonding pad formed on the input/output cells, and a wiring layer wiring circuit elements in the basic cells and the input/output cells to form a functional circuit and buffers and connecting between the functional circuit, the buffers and the bonding pads, at least one input/output cell having two bonding pads thereon, and one of the two bonding pads being located near an edge of the semiconductor chip, compared to the other.
摘要翻译：形成在半导体芯片上的半定制LSI包括形成在半导体芯片的中心部分的多个基本单元，形成在半导体芯片的周边部分中的多个输入/输出单元，形成在半导体芯片的周边部分上的多个键合焊盘输入/输出单元，以及基本单元和输入/输出单元中的布线层布线电路元件，以形成功能电路，并缓冲并连接功能电路，缓冲器和接合垫，至少一个输入/输出电池在其上具有两个接合焊盘，并且两个接合焊盘之一位于半导体芯片的边缘附近。

10. 发明授权

US4933575A Electric circuit interchangeable between sequential and combination circuits 失效
标题翻译：电路在顺序和组合电路之间可互换
公开(公告)号：US4933575A
公开(公告)日：1990-06-12
申请号：US310443
申请日：1989-02-14
申请人： Akira Aso
发明人： Akira Aso
IPC分类号： H03K3/037 , H03K19/173
CPC分类号： H03K19/1733 , H03K3/037
摘要： There is provided a logic circuit formed of a flip-flop receiving an input data, a control signal, a set signal and a reset signal and producing an output signal and an inverted output signal. To this is added a first logic circuit performing a first logical arithmetic of the input data and the set signal to produce a first logic signal, and a second logic circuit performing a second logical arithmetic of the control signal and the reset signal to produce a second logic signal. A first selector circuit selects one of the first logic signal and the output signal and a second selector circuit selects one of the second logic signal and the inverted output signal thereby providing convesability between sequential and combination modes of operation.
摘要翻译：提供了由接收输入数据，控制信号，设定信号和复位信号的触发器形成的逻辑电路，并产生输出信号和反相输出信号。为此，添加了执行输入数据和设置信号的第一逻辑运算以产生第一逻辑信号的第一逻辑电路，以及执行控制信号和复位信号的第二逻辑运算的第二逻辑电路，以产生第二逻辑电路逻辑信号。第一选择器电路选择第一逻辑信号和输出信号中的一个，第二选择器电路选择第二逻辑信号和反相输出信号之一，从而在顺序和组合操作模式之间提供可扩展性。

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