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1. 外观设计

USD266568S Combined copy machine and storage support or similar article 失效
公开(公告)号：USD266568S
公开(公告)日：1982-10-19
申请号：US919659
申请日：1978-06-28
申请人： Toshihiko Sakow , Isao Katayama , Sadao Ishihara
设计人： Toshihiko Sakow , Isao Katayama , Sadao Ishihara

2. 外观设计

USD254181S Copying machine 失效
公开(公告)号：USD254181S
公开(公告)日：1980-02-12
申请号：US736977
申请日：1976-10-29
申请人： Toshihiko Sakow , Isao Katayama , Sadao Ishihara
设计人： Toshihiko Sakow , Isao Katayama , Sadao Ishihara

3. 发明申请

US20050218490A1 Semiconductor storage device, semiconductor device, and manufacturing method therefor 有权
标题翻译：半导体存储装置，半导体装置及其制造方法
公开(公告)号：US20050218490A1
公开(公告)日：2005-10-06
申请号：US11078447
申请日：2005-03-14
申请人： Kohji Kanamori , Teiichirou Nishizaka , Noriaki Kodama , Isao Katayama , Yoshihiro Matsuura , Kaoru Ishihara , Yasushi Harada , Naruaki Minenaga , Chihiro Oshita
发明人： Kohji Kanamori , Teiichirou Nishizaka , Noriaki Kodama , Isao Katayama , Yoshihiro Matsuura , Kaoru Ishihara , Yasushi Harada , Naruaki Minenaga , Chihiro Oshita
IPC分类号： H01L27/10 , H01L21/322 , H01L21/52 , H01L21/58 , H01L23/26 , H01L23/31 , H01L23/58 , H01L29/00
CPC分类号： H01L23/26 , H01L21/3221 , H01L23/3128 , H01L24/48 , H01L25/0657 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/00014 , H01L2924/12032 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： According to the present invention, a gettering layer is deposited both on the side surfaces and the bottom surface of a semiconductor chip. The semiconductor chip is then mounted on the board of a package so that a Schottky barrier is formed on the bottom surface. With this structure, metal ions that pass through the board of the package can be captured by the defect layer deposited on the side surfaces and/or the bottom surface of the semiconductor chip, and by the Schottky barrier.
摘要翻译：根据本发明，在半导体芯片的侧表面和底表面上沉积吸气层。然后将半导体芯片安装在封装的板上，使得在底表面上形成肖特基势垒。通过这种结构，可以通过沉积在半导体芯片的侧表面和/或底表面上的缺陷层和肖特基势垒捕获穿过封装板的金属离子。

4. 发明授权

US07790579B2 Semiconductor storage device, semiconductor device, and manufacturing method therefor 有权
标题翻译：半导体存储装置，半导体装置及其制造方法
公开(公告)号：US07790579B2
公开(公告)日：2010-09-07
申请号：US11398534
申请日：2006-04-06
申请人： Kohji Kanamori , Teiichirou Nishizaka , Noriaki Kodama , Isao Katayama , Yoshihiro Matsuura , Kaoru Ishihara , Yasushi Harada , Naruaki Minenaga , Chihiro Oshita
发明人： Kohji Kanamori , Teiichirou Nishizaka , Noriaki Kodama , Isao Katayama , Yoshihiro Matsuura , Kaoru Ishihara , Yasushi Harada , Naruaki Minenaga , Chihiro Oshita
IPC分类号： H01L21/322
CPC分类号： H01L23/26 , H01L21/3221 , H01L23/3128 , H01L24/48 , H01L25/0657 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/00014 , H01L2924/12032 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： According to the present invention, a gettering layer is deposited both on the side surfaces and the bottom surface of a semiconductor chip. The semiconductor chip is then mounted on the board of a package so that a Schottky barrier is formed on the bottom surface. With this structure, metal ions that pass through the board of the package can be captured by the defect layer deposited on the side surfaces and/or the bottom surface of the semiconductor chip, and by the Schottky barrier.
摘要翻译：根据本发明，在半导体芯片的侧表面和底表面上沉积吸气层。然后将半导体芯片安装在封装的板上，使得在底表面上形成肖特基势垒。通过这种结构，可以通过沉积在半导体芯片的侧表面和/或底表面上的缺陷层和肖特基势垒捕获穿过封装板的金属离子。

5. 发明申请

US20070022272A1 Microprocessor 审中-公开
标题翻译：微处理器
公开(公告)号：US20070022272A1
公开(公告)日：2007-01-25
申请号：US11274401
申请日：2005-11-16
申请人： Isao Katayama
发明人： Isao Katayama
IPC分类号： G06F9/30
CPC分类号： G06F9/3836 , G06F9/3867
摘要： The present invention includes a pipeline having a plurality of stages, and a resource management unit configured to be connected to the pipeline and manage circuit resources for processing instructions. An instruction fetch unit is configured to issue processing commands to the pipeline, receive a busy signal BS from the resource management unit requesting the fetch unit to stop issuing commands to the pipeline, and then stops issuing commands to the pipeline. An instruction selector is configured to receive a processing command from the instruction fetch unit and a command from a final stage of the pipeline to re-enter the pipeline, via a re-entry path extending to a first stage of the pipeline, and select an instruction to enter the pipeline in conformity with a control signal SCS from the resource management unit.
摘要翻译：本发明包括具有多个级的流水线，以及资源管理单元，被配置为连接到流水线并管理用于处理指令的电路资源。指令提取单元被配置为向流水线发出处理命令，从资源管理单元接收忙信号BS，请求提取单元停止向流水线发出命令，然后停止向流水线发出命令。指令选择器被配置为经由延伸到流水线的第一级的重新进入路径从指令获取单元接收处理命令和来自流水线的最后级的命令以重新进入流水线，并且选择根据来自资源管理单元的控制信号SCS进入管线的指令。

6. 发明授权

US07327019B2 Semiconductor device of a charge storage type 有权
标题翻译：电荷存储型半导体器件
公开(公告)号：US07327019B2
公开(公告)日：2008-02-05
申请号：US11078447
申请日：2005-03-14
申请人： Kohji Kanamori , Teiichirou Nishizaka , Noriaki Kodama , Isao Katayama , Yoshihiro Matsuura , Kaoru Ishihara , Yasushi Harada , Naruaki Minenaga , Chihiro Oshita
发明人： Kohji Kanamori , Teiichirou Nishizaka , Noriaki Kodama , Isao Katayama , Yoshihiro Matsuura , Kaoru Ishihara , Yasushi Harada , Naruaki Minenaga , Chihiro Oshita
IPC分类号： H01L23/20 , H01L23/02 , H01L23/053 , H01L23/12 , H01L23/14
CPC分类号： H01L23/26 , H01L21/3221 , H01L23/3128 , H01L24/48 , H01L25/0657 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/00014 , H01L2924/12032 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： According to the present invention, a gettering layer is deposited both on the side surfaces and the bottom surface of a semiconductor chip. The semiconductor chip is then mounted on the board of a package so that a Schottky barrier is formed on the bottom surface. With this structure, metal ions that pass through the board of the package can be captured by the defect layer deposited on the side surfaces and/or the bottom surface of the semiconductor chip, and by the Schottky barrier.
摘要翻译：根据本发明，在半导体芯片的侧表面和底表面上沉积吸气层。然后将半导体芯片安装在封装的板上，使得在底表面上形成肖特基势垒。通过这种结构，可以通过沉积在半导体芯片的侧表面和/或底表面上的缺陷层和肖特基势垒捕获穿过封装板的金属离子。

7. 发明申请

US20060247393A1 Flame retardant epoxy resin composition and semiconductor device using the same 有权
标题翻译：阻燃环氧树脂组合物和使用其的半导体器件
公开(公告)号：US20060247393A1
公开(公告)日：2006-11-02
申请号：US11477524
申请日：2006-06-30
申请人： Yukihiro Kiuichi , Masatoshi Iji , Katsushi Terajima , Isao Katayama , Yasuo Matsui , Ken Oota
发明人： Yukihiro Kiuichi , Masatoshi Iji , Katsushi Terajima , Isao Katayama , Yasuo Matsui , Ken Oota
IPC分类号： C08L63/00
CPC分类号： C08L61/06 , C08L63/00 , H01L23/293 , H01L2924/0002 , C08L2666/22 , C08L2666/14 , H01L2924/00
摘要： An epoxy resin composition which can be used as a semiconductor encapsulating resin and in which the improvement of flame retardancy can be attained by suitably adapting a crosslinked structure itself of a cured article without using any flame retardant material and without particularly highly filling an inorganic filler. The epoxy resin composition includes an epoxy resin (A), a phenolic resin (B), an inorganic filler (C) and a curing accelerator (D), wherein a flexural modulus E (kgf/mm2) at 240±20% C of a cured article obtained by curing the composition is a value satisfying 0.015 W+4.1≦E≦0.27 W+21.8 in the case of 30≦W
摘要翻译：可以用作半导体封装树脂的环氧树脂组合物，其中通过适当地使固化制品的交联结构本身适当地适应而不使用任何阻燃材料，并且不特别高填充无机填料可以获得阻燃性的改善。环氧树脂组合物包括环氧树脂（A），酚醛树脂（B），无机填料（C）和固化促进剂（D），其中挠曲模量E（kgf / mm 2））在固化组合物得到的固化制品的240±20％C下，在30 <= W <60的情况下为满足0.015W + 4.1 <= E <= 0.27W + 21.8的值，或满足0.30W 在60 <= W <= 95的情况下，-13 <= E <= 3.7W-184其中W（重量％）是固化物中无机填料（C）的含量。该组合物的固化物在热分解或点火时形成发泡层以发挥阻燃性。

8. 发明申请

US20060180891A1 Semiconductor storage device, semiconductor device, and manufacturing method therefor 有权
标题翻译：半导体存储装置，半导体装置及其制造方法
公开(公告)号：US20060180891A1
公开(公告)日：2006-08-17
申请号：US11398534
申请日：2006-04-06
申请人： Kohji Kanamori , Teiichirou Nishizaka , Noriaki Kodama , Isao Katayama , Yoshihiro Matsuura , Kaoru Ishihara , Yasushi Harada , Naruaki Minenaga , Chihiro Oshita
发明人： Kohji Kanamori , Teiichirou Nishizaka , Noriaki Kodama , Isao Katayama , Yoshihiro Matsuura , Kaoru Ishihara , Yasushi Harada , Naruaki Minenaga , Chihiro Oshita
IPC分类号： H01L31/07 , H01L27/095 , H01L31/108 , H01L29/47 , H01L29/812
CPC分类号： H01L23/26 , H01L21/3221 , H01L23/3128 , H01L24/48 , H01L25/0657 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/00014 , H01L2924/12032 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： According to the present invention, a gettering layer is deposited both on the side surfaces and the bottom surface of a semiconductor chip. The semiconductor chip is then mounted on the board of a package so that a Schottky barrier is formed on the bottom surface. With this structure, metal ions that pass through the board of the package can be captured by the defect layer deposited on the side surfaces and/or the bottom surface of the semiconductor chip, and by the Schottky barrier.
摘要翻译：根据本发明，在半导体芯片的侧表面和底表面上沉积吸气层。然后将半导体芯片安装在封装的板上，使得在底表面上形成肖特基势垒。通过这种结构，可以通过沉积在半导体芯片的侧表面和/或底表面上的缺陷层和肖特基势垒捕获穿过封装板的金属离子。

9. 发明授权

US06349321B1 Data processing system and scheduling method 失效
标题翻译：数据处理系统和调度方法
公开(公告)号：US06349321B1
公开(公告)日：2002-02-19
申请号：US09067900
申请日：1998-04-29
申请人： Isao Katayama
发明人： Isao Katayama
IPC分类号： G06F900
CPC分类号： G06F9/4881
摘要： A central processing unit schedules the start time of a following special process based on the progress status of a preceding special process being executed in an auxiliary processing unit and the processing time and the end time of the following special process.
摘要翻译：中央处理单元基于在辅助处理单元中执行的前一个特殊处理的进度状态以及以下特殊处理的处理时间和结束时间来调度后续特殊处理的开始时间。

10. 发明授权

US08039940B2 Semiconductor storage device, semiconductor device, and manufacturing method therefor 有权
标题翻译：半导体存储装置，半导体装置及其制造方法
公开(公告)号：US08039940B2
公开(公告)日：2011-10-18
申请号：US11956358
申请日：2007-12-14
申请人： Kohji Kanamori , Teiichirou Nishizaka , Noriaki Kodama , Isao Katayama , Yoshihiro Matsuura , Kaoru Ishihara , Yasushi Harada , Naruaki Minenaga , Chihiro Oshita
发明人： Kohji Kanamori , Teiichirou Nishizaka , Noriaki Kodama , Isao Katayama , Yoshihiro Matsuura , Kaoru Ishihara , Yasushi Harada , Naruaki Minenaga , Chihiro Oshita
IPC分类号： H01L23/26
CPC分类号： H01L23/26 , H01L21/3221 , H01L23/3128 , H01L24/48 , H01L25/0657 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/00014 , H01L2924/12032 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： According to the present invention, a gettering layer is deposited both on the side surfaces and the bottom surface of a semiconductor chip. The semiconductor chip is then mounted on the board of a package so that a Schottky barrier is formed on the bottom surface. With this structure, metal ions that pass through the board of the package can be captured by the defect layer deposited on the side surfaces and/or the bottom surface of the semiconductor chip, and by the Schottky barrier.
摘要翻译：根据本发明，在半导体芯片的侧表面和底表面上沉积吸气层。然后将半导体芯片安装在封装的板上，使得在底表面上形成肖特基势垒。通过这种结构，可以通过沉积在半导体芯片的侧表面和/或底表面上的缺陷层和肖特基势垒捕获穿过封装板的金属离子。

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