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1. 发明专利

JP2014241227A 照明装置および光ガイド有权
标题翻译：照明设备和光学指南
公开(公告)号：JP2014241227A
公开(公告)日：2014-12-25
申请号：JP2013123101
申请日：2013-06-11
申请人：株式会社東芝 , Toshiba Corp
发明人： ONO HIROSHI , YAMAMOTO YUICHIRO , KATO MITSUAKI , KUNO KATSUMI
IPC分类号： F21S2/00 , F21V8/00
CPC分类号： F21K9/232 , F21K9/61 , F21V3/02 , F21Y2101/00 , F21Y2115/10
摘要：【課題】広配光でありながら器具効率を高めることができる照明装置を得ることにある。【解決手段】照明装置は、発光面を有する光源と、発光面の重心を通って当該発光面と直交する方向に沿う軸線に対して同軸状に設けられた導光体と、を備えている。導光体は、発光面に面した入射面と、入射面の外周縁から軸線を取り囲むように光源から遠ざかる方向に延出され、入射面から導光体に入射された光源の光を全反射させるように構成された外周面と、入射面に対し軸線の軸方向に離れた位置に設けられた空洞部と、を有している。空洞部は、外周面で全反射された光が導かれる軸線と平行な第1の光拡散面を含む。【選択図】図2
摘要翻译：要解决的问题：获得尽管光分布宽的能够提高照明效率的照明装置。解决方案：照明装置包括：具有发光面的光源; 以及穿过发光表面的重心并且沿着与发光表面正交的方向与轴同轴地设置的导光体。光导包括：面向发光面的入射面; 外周面，从远离所述光源的方向延伸，以从所述入射面的外周缘围绕所述轴，并且构成为从所述入射面全反射入射到所述光导的光源的光; 以及空腔部，设置在远离所述入射面的轴的轴向的位置。空腔部分包括平行于外部圆周表面上全反射的光线的轴线的第一光扩散表面。

2. 发明专利

JP2014212354A 半導体発光素子及びその製造方法有权
标题翻译：半导体发光元件及其制造方法
公开(公告)号：JP2014212354A
公开(公告)日：2014-11-13
申请号：JP2014167318
申请日：2014-08-20
申请人：株式会社東芝 , Toshiba Corp
发明人： ONO HIROSHI , HIKOSAKA TOSHIKI , MORIOKA TOMOKO , OKA TOSHIYUKI , NUNOUE SHINYA
IPC分类号： H01L33/22 , H01L33/32
CPC分类号： H01L33/00
摘要：【課題】結晶品質が高く光取り出し効率が高い半導体発光素子及びその製造方法を提供する。【解決手段】本発明の実施形態によれば、n形半導体層を含む第1半導体層と、p形半導体層を含む第2半導体層と、前記第1半導体層と前記第2半導体層との間に設けられた発光部と、を備えた半導体発光素子が提供される。前記発光部は、複数の障壁層と、前記複数の障壁層の間に設けられた井戸層と、を含む。前記第1半導体層は、第1凹凸と、第2凹凸と、を有する。前記第1凹凸は、前記第1半導体層の前記発光部とは反対の側の第1主面に設けられ、前記第1半導体層から前記第2半導体層に向かう第1方向に対して傾斜した側面を有する。前記第2凹凸は、前記第1凹凸の底面と頂面とに設けられる。前記第2凹凸は、前記底面と前記頂面との間の段差よりも小さい段差を有する。【選択図】図1
摘要翻译：要解决的问题：提供具有高晶体质量和高光提取效率的半导体发光元件，并提供其制造方法。解决方案：根据本发明的实施例，提供一种半导体包括n型半导体层的第一半导体层，包括p型半导体层的第二半导体层以及设置在第一半导体层和第二半导体层之间的发光部的发光元件。发光部分包括设置在多个阻挡层之间的多个阻挡层和阱层。第一半导体层具有第一不规则性和第二不规则性。第一凹凸设置在第一半导体层的设置有发光部的相对面的第一主面上，具有从第一半导体层到第二半导体层的第一方向倾斜的侧面。第二不规则部分设置在第一凹凸的底表面和顶表面上。第二不规则部分具有比底表面和顶表面之间的台阶小的步骤。

3. 发明专利

JP2014175496A Semiconductor light-emitting element and method of manufacturing the same 审中-公开
标题翻译：半导体发光元件及其制造方法
公开(公告)号：JP2014175496A
公开(公告)日：2014-09-22
申请号：JP2013047253
申请日：2013-03-08
申请人： Toshiba Corp , 株式会社東芝
发明人： ONO HIROSHI , MIKI SATOSHI , KATSUNO HIROSHI , SUGIYAMA NAOJI , NUNOUE SHINYA
IPC分类号： H01L33/20
CPC分类号： H01L33/58 , H01L33/0079 , H01L33/02 , H01L33/08 , H01L33/10 , H01L33/20 , H01L33/38 , H01L33/44 , H01L33/60
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting element that allows preventing warpage and cracking while suppressing reduction in light extraction efficiency, and to provide a method of manufacturing the same.SOLUTION: There is provided a semiconductor light-emitting element including a laminated body and an optical portion. The laminated body includes first and second semiconductor layers and a light-emitting layer. The second semiconductor layer is spaced apart from the first semiconductor layer in a first direction. The light-emitting layer is provided between the first semiconductor layer and the second semiconductor layer. The optical portion is stacked with the laminated body in the first direction. The optical portion extends in a direction perpendicular to the first direction. The length of the optical portion in the first direction is longer than that of the first semiconductor layer in the first direction. The area of the optical portion projected on a plane perpendicular to the first direction is smaller than the area projected on a plane of the laminated body. At least a part of the optical portion contains Al. The Al concentration of at least a part of the optical portion is higher than that of the laminated body.
摘要翻译：要解决的问题：提供一种能够在抑制光提取效率降低的同时防止翘曲裂纹的半导体发光元件，并提供其制造方法。解决方案提供一种半导体发光元件，其包括：层叠体和光学部。层叠体包括第一和第二半导体层和发光层。第二半导体层在第一方向上与第一半导体层间隔开。发光层设置在第一半导体层和第二半导体层之间。光学部分沿着第一方向与层叠体层叠。光学部分沿垂直于第一方向的方向延伸。第一方向的光学部分的长度比第一方向上的第一半导体层的长度长。投影在与第一方向垂直的平面上的光学部分的面积比投影在层叠体的平面上的面积小。光学部分的至少一部分包含Al。光学部分的至少一部分的Al浓度高于层叠体的Al浓度。

4. 发明专利

JP2014056927A Microwave annealing apparatus and method of manufacturing semiconductor device 有权
标题翻译：微波退火装置及制造半导体器件的方法
公开(公告)号：JP2014056927A
公开(公告)日：2014-03-27
申请号：JP2012200499
申请日：2012-09-12
申请人： Toshiba Corp , 株式会社東芝
发明人： ONO HIROSHI , AOYAMA TOMONORI , MIYANO KIYOTAKA , MOTOMIYA YOSHINORI , SHIRATO MASATAKA
IPC分类号： H01L21/268 , H01L21/26 , H05B6/68
CPC分类号： H01L21/67115 , H01L21/324 , H01L21/67248 , H05B6/6455 , H05B6/68 , H05B6/806
摘要： PROBLEM TO BE SOLVED: To improve the efficiency of low-temperature activation by microwave annealing without tuning an apparatus in accordance with the kind of semiconductor substrate.SOLUTION: A microwave annealing apparatus includes: an enclosure 10 shielding electromagnetic waves; a first electromagnetic wave source 21 supplying a first electromagnetic wave A in the microwave region into the enclosure 10; a second electromagnetic wave source 22 supplying a second electromagnetic wave B having a higher frequency than the first electromagnetic wave A into the enclosure 10; a susceptor 12 provided in the enclosure 10, made from a material transparent to the first electromagnetic wave A, and used for mounting a semiconductor substrate 11; a temperature measuring instrument 13 for measuring the temperature of the semiconductor substrate 11; and a control unit 31 controlling the power of the first and second electromagnetic wave sources 21 and 22 on the basis of the temperature measured by the temperature measuring instrument 13.
摘要翻译：要解决的问题：通过微波退火来提高低温活化的效率，而不需要根据半导体衬底的种类调整设备。微波退火设备包括：屏蔽电磁波的外壳10; 将微波区域中的第一电磁波A提供到外壳10中的第一电磁波源21; 第二电磁波源22将具有比第一电磁波A更高的频率的第二电磁波B提供到外壳10中; 设置在外壳10中的基座12，由对第一电磁波A透明的材料制成，用于安装半导体基板11; 用于测量半导体衬底11的温度的温度测量仪13; 以及控制单元31，其基于由温度测量仪13测量的温度来控制第一和第二电磁波源21和22的功率。

5. 发明专利

JP2013074072A Semiconductor manufacturing device and semiconductor manufacturing method 有权
标题翻译：半导体制造设备和半导体制造方法
公开(公告)号：JP2013074072A
公开(公告)日：2013-04-22
申请号：JP2011211655
申请日：2011-09-27
申请人： Toshiba Corp , 株式会社東芝
发明人： ONO HIROSHI
IPC分类号： H01L21/268 , H01L21/265 , H05B6/64 , H05B6/80
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor manufacturing device capable of efficiently performing annealing treatment, and a semiconductor manufacturing method.SOLUTION: A semiconductor manufacturing device of an embodiment comprises: a susceptor on which a substrate having a grain growing by microwave irradiation at least in a part thereof is formed; an irradiation unit which irradiates the substrate with a microwave; and a control unit which controls the irradiation unit so as to approximate a frequency of the microwave irradiated by the irradiation unit to a resonance frequency of the grain.
摘要翻译：要解决的问题：提供能够有效地进行退火处理的半导体制造装置和半导体制造方法。解决方案：一种实施方式的半导体制造装置包括：形成有至少一部分通过微波照射生长晶粒的基板的基座; 照射单元，其用微波照射所述基板; 以及控制单元，其控制所述照射单元以将由所述照射单元照射的微波的频率近似为所述颗粒的共振频率。版权所有（C）2013，JPO＆INPIT

6. 发明专利

JP2013004768A Semiconductor light-emitting element manufacturing method and wafer for semiconductor light-emitting element 审中-公开
标题翻译：半导体发光元件半导体发光元件的半导体制造方法和波形
公开(公告)号：JP2013004768A
公开(公告)日：2013-01-07
申请号：JP2011134969
申请日：2011-06-17
申请人： Toshiba Corp , 株式会社東芝
发明人： GOTODA TORU , OKA TOSHIYUKI , NUNOUE SHINYA , ZAIMA KOTARO , ONO HIROSHI , NAGO HAJIME
IPC分类号： H01L33/32 , H01L21/205 , H01L21/302 , H01L33/22 , H01S5/343
CPC分类号： H01L33/007 , H01L21/2011 , H01L33/0079 , H01L33/20 , H01S5/0213 , H01S5/0217 , H01S5/32341
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor light-emitting element which inhibits damages of a semiconductor layer when substrate for growth is detached, and provide a wafer for a semiconductor light-emitting element.SOLUTION: According to an embodiment, a semiconductor light-emitting element manufacturing method comprises: a process of forming a nitride semiconductor layer including a light-emitting layer on a principal surface of a first substrate having the principal surface on which irregularities are provided; a process of bonding the nitride semiconductor layer and a second substrate; and a process of isolating the first substrate from the nitride semiconductor layer by irradiating the nitride semiconductor layer with light via the first substrate. The process of forming the nitride semiconductor layer includes remaining a cavity in a space inside a recess of the irregularities with forming a thin film containing a material the same as at least a part of the nitride semiconductor layer on internal surfaces of the recesses. The process of isolation includes making an intensity of light irradiated on parts facing the recesses in the nitride semiconductor layer be lower than an intensity of light irradiated on parts facing salients of the irregularities in the nitride semiconductor layer by causing the thin film to absorb at least a part of the light.
摘要翻译：要解决的问题：提供一种半导体发光元件的制造方法，该半导体发光元件在剥离生长用基板时抑制半导体层的损伤，并且提供半导体发光元件的晶片。解决方案：根据实施例，半导体发光元件的制造方法包括：在具有主表面的第一基板的主表面上形成包括发光层的氮化物半导体层的工艺，其中凹凸为提供; 接合氮化物半导体层和第二基板的工序; 以及通过经由第一基板用光照射氮化物半导体层，从氮化物半导体层分离第一衬底的工序。形成氮化物半导体层的过程包括在凹陷的凹部内的空间内保留空腔，形成含有与凹部的内表面上的至少一部分氮化物半导体层相同的材料的薄膜。隔离过程包括使得在氮化物半导体层中朝向凹部的部分照射的光的强度比通过使薄膜至少吸收至少在氮化物半导体层中的不规则部分的朝向的部分照射的光的强度低光的一部分。版权所有（C）2013，JPO＆INPIT

7. 发明专利

JP2012248667A Nitride semiconductor device and substrate for growing nitride semiconductor layer 有权
标题翻译：用于生长氮化物半导体层的氮化物半导体器件和衬底
公开(公告)号：JP2012248667A
公开(公告)日：2012-12-13
申请号：JP2011119037
申请日：2011-05-27
申请人： Toshiba Corp , 株式会社東芝
发明人： TACHIBANA KOICHI , YOSHIDA GAKUSHI , ONO HIROSHI , NAGO HAJIME , HARADA YOSHIYUKI , HIKOSAKA TOSHITERU , SUGAI MAKI , OKA TOSHIYUKI , NUNOUE SHINYA
IPC分类号： H01L33/32
CPC分类号： H01L33/20 , H01L29/045 , H01L29/2003 , H01L33/16 , H01L33/32
摘要： PROBLEM TO BE SOLVED: To provide a nitride semiconductor device with high efficiency, and further to provide a substrate for growing a nitride semiconductor layer.SOLUTION: A nitride semiconductor device including a substrate and a semiconductor functional layer is provided. The substrate is a monocrystalline substrate. The semiconductor functional layer is disposed on a principal surface of the substrate and includes a nitride semiconductor. The substrate has a plurality of structure bodies disposed on the principal surface. Each of the plurality of structure bodies is a projected portion disposed on the principal surface or a recessed portion disposed on the principal surface. An absolute value of an angle between a closest direction of an array of the plurality of structure bodies and a closest direction of a crystalline lattice of the substrate to a plane parallel to the principal surface is not less than 1 degree and not greater than 10 degrees.
摘要翻译：要解决的问题：为了提供高效率的氮化物半导体器件，并且还提供用于生长氮化物半导体层的衬底。解决方案：提供一种包括衬底和半导体功能层的氮化物半导体器件。衬底是单晶衬底。半导体功能层设置在基板的主表面上并且包括氮化物半导体。基板具有设置在主表面上的多个结构体。多个结构体中的每一个是设置在主表面上的突出部分或设置在主表面上的凹部。多个结构体的阵列的最近方向与基板的平行于平面的平面的晶格的最接近方向之间的角度的绝对值为1度以上且10度以下。版权所有（C）2013，JPO＆INPIT

8. 发明专利

JP2012059900A Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：JP2012059900A
公开(公告)日：2012-03-22
申请号：JP2010201409
申请日：2010-09-08
申请人： Toshiba Corp , 株式会社東芝
发明人： ONO HIROSHI
IPC分类号： H01L21/265
CPC分类号： H01L21/2686 , H01L21/324 , Y10S977/89
摘要： PROBLEM TO BE SOLVED: To contribute to improvement of the performance of a semiconductor integrated circuit without requiring fine adjustment or improvement on the light source side by preventing degradation of the circuit due to uneven temperature which occurs during optical annealing.SOLUTION: In a method of manufacturing a semiconductor device, such a region of a substrate on which patterns 30, 40 of a semiconductor integrated circuit are formed as the rate of absorption of light irradiated for annealing is equal to or lower than a fixed value is defined as a sparse pattern region 100, and a thin film 60 for improving the rate of light absorption is formed locally on the sparse pattern region 100. Thereafter, annealing is performed by irradiating the substrate, on which the patterns 30, 40 of an integrated circuit and the thin film 60 are formed, with light.
摘要翻译：要解决的问题：为了有助于提高半导体集成电路的性能，而不需要通过防止在退火期间发生的不均匀温度导致的电路劣化对光源侧进行微调或改进。解决方案：在制造半导体器件的方法中，形成半导体集成电路的图案30,40的基板的区域作为退火照射的光的吸收率等于或低于将固定值定义为稀疏图案区域100，并且在稀疏图案区域100上局部形成用于提高光吸收率的薄膜60.然后，通过照射图案30,40的基板并且用光形成薄膜60。版权所有（C）2012，JPO＆INPIT

9. 发明专利

JP2010189137A Device and method for determining kind of paper sheet, and image forming apparatus 有权
标题翻译：用于确定纸张类型和图像形成装置的装置和方法
公开(公告)号：JP2010189137A
公开(公告)日：2010-09-02
申请号：JP2009035265
申请日：2009-02-18
申请人： Toshiba Corp , 株式会社東芝
发明人： HAYASHIBARA HIROMICHI , SHIRATO MASATAKA , MORINO TSUYOSHI , ONO HIROSHI
IPC分类号： B65H7/14 , B65H1/00
CPC分类号： B65H1/00 , B65H7/14 , B65H2511/40 , B65H2515/60 , B65H2553/46 , B65H2701/18282 , B65H2801/06 , B65H2220/03 , B65H2220/01
摘要： PROBLEM TO BE SOLVED: To provide a device and method for determining the kind of paper sheet, capable of determining the kind of paper sheets while storing the paper sheets in a paper feed tray, and to provide an image forming apparatus with the device. SOLUTION: In the paper sheet kind determining device, the irradiation light 80 is irradiated from a light source 104 toward an upper surface 54 of a paper bundle (a layered bundle) 52 formed by layering paper (the paper sheets) 50, and the light quantity distribution of the transmitted light 82 emitted from a side 56 by passing through the paper bundle 52, is detected by a light receiving element 108. In a paper kind determining part 122, the transmitted light damping ratio is calculated from the light quantity distribution of the transmitted light 82, and a kind and density of the paper 50 are determined by referring to a lookup table stored in a database 128 by this transmitted light damping ratio. In a paper thickness calculation unit 124, a thickness of the paper 50 is calculated from the light quantity distribution of the transmitted light 82. In a paper basis weight calculation unit 126, basis weight is calculated by multiplying the density and the thickness of the paper 50. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于确定纸张类型的装置和方法，其能够在将纸张存放在供纸盘中的同时确定纸张的种类，并且提供具有设备。解决方案：在纸张种类确定装置中，照射光80从光源104朝向由纸（纸张）50形成的纸束（分层束）52的上表面54照射，并且通过纸束52从侧面56发射的透射光82的光量分布由光接收元件108检测。在纸种确定部分122中，从光计算透射光阻尼比透射光82的数量分布以及纸50的种类和密度通过参照数据库128中存储的查找表来确定。在纸张厚度计算单元124中，根据透射光82的光量分布来计算纸张50的厚度。在纸张基重计算单元126中，通过将纸张的密度和纸张厚度相乘来计算基重 50.版权所有（C）2010，JPO＆INPIT

10. 发明专利

JP2005050027A Flow analysis system and flow analysis method 审中-公开
标题翻译：流量分析系统和流量分析方法
公开(公告)号：JP2005050027A
公开(公告)日：2005-02-24
申请号：JP2003204563
申请日：2003-07-31
申请人： Toshiba Corp , 株式会社東芝
发明人： TAWARA MIKA , YAMAMOTO TETSUZO , ONO HIROSHI , TAKIGAWA YUKIO , SHIMIZU TAKESHI
IPC分类号： G06F17/50
摘要： PROBLEM TO BE SOLVED: To determine effects of designs of individual equipment on an overall system and appropriately apply boundary conditions of the individual equipment as part of an overall system behavior, in a flow analysis. SOLUTION: A flow analysis system for making an analysis using an overall fluid system analysis model 101 and a plurality of local flow analysis models 102 hierarchized in accordance with a flow scale has a means for analyzing the overall system behavior, a means for making an analysis by the local analysis models as using overall analysis results as boundary conditions or model parameters of the local analysis models and using analysis results by the upper model of the hierarchized local analysis models as boundary conditions or model parameters of the lower local analysis model, a means for integrating a physical model or correlation equation model or physical parameters created according to analysis results by the lower local analysis model into the upper local analysis model and overall analysis model, and a means for integrating a physical model or a correlation equation model or physical parameters created according to the analysis results by the overall fluid system analysis model into the overall fluid system analysis model. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：在流程分析中，确定单个设备的设计对整个系统的影响，并适当地应用单个设备的边界条件作为整体系统行为的一部分。解决方案：使用总体流体系统分析模型101进行分析的流分析系统和根据流量表分级的多个局部流分析模型102具有分析整个系统行为的手段，通过本地分析模型进行分析，将总体分析结果作为局部分析模型的边界条件或模型参数，并将分层结果用分层局部分析模型的上层模型作为边界条件或较低局部分析模型的模型参数将通过较低局部分析模型的分析结果生成的物理模型或相关方程模型或相关方程模型或物理参数整合到上部局部分析模型和总体分析模型中，以及用于整合物理模型或相关方程模型的手段或根据总体流体系统分析m的分析结果创建的物理参数 odel进入整体流体系统分析模型。版权所有（C）2005，JPO＆NCIPI

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