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1. 发明专利

JP2014011408A Method of manufacturing semiconductor device and polishing apparatus 审中-公开
标题翻译：制造半导体器件和抛光装置的方法
公开(公告)号：JP2014011408A
公开(公告)日：2014-01-20
申请号：JP2012148899
申请日：2012-07-02
申请人： Toshiba Corp , 株式会社東芝
发明人： EDA HAJIME , MINAMI FUKUGAKU , MATSUI YUKITERU , KAWASE AKIFUMI
IPC分类号： H01L21/304
CPC分类号： H01L22/14 , B24B37/013 , B24B49/02 , B24B49/105 , H01L21/3212 , H01L21/7684 , H01L22/26
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device that reduces surface defects and improves manufacturing yield.SOLUTION: A method of manufacturing a semiconductor device includes: a step of forming a wiring groove in an insulating film; a step of forming a barrier metal layer covering a top surface of the insulating film and an inner surface of the wiring groove, and a metal layer filling the inside of the wiring groove and covering the barrier metal layer; a first polishing step of polishing the metal layer with a first load being applied; and a second polishing step of polishing the metal layer with a second load heavier than the first load being applied while spraying a gas to a polishing pad.
摘要翻译：要解决的问题：提供一种减少表面缺陷并提高制造成品率的半导体器件的制造方法。解决方案：制造半导体器件的方法包括：在绝缘膜中形成布线槽的步骤; 形成覆盖绝缘膜的上表面的阻挡金属层和布线槽的内表面的步骤，以及填充布线槽内部并覆盖阻挡金属层的金属层; 在施加第一负载的状态下研磨金属层的第一抛光步骤; 以及第二抛光步骤，其中以比施加的第一负载重的第二负载抛光金属层，同时向抛光垫喷射气体。

2. 发明专利

JP2012009804A Semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2012009804A
公开(公告)日：2012-01-12
申请号：JP2010243821
申请日：2010-10-29
申请人： Toshiba Corp , 株式会社東芝
发明人： MATSUI YUKITERU , MINAMI FUKUGAKU , EDA HAJIME , AMANO MINORU , IWAYAMA MASAYOSHI , YOSHIKAWA MASAHISA , SATO MOTOYUKI , SUGURO KYOICHI , KODERA MASAKO
IPC分类号： H01L27/105 , H01L21/28 , H01L21/304 , H01L21/3205 , H01L21/768 , H01L21/8246 , H01L23/522 , H01L29/82 , H01L43/08 , H01L43/12 , H01L45/00
CPC分类号： H01L21/02697 , H01L21/3212 , H01L21/7684 , H01L21/76877 , H01L21/76883 , H01L27/228
摘要： PROBLEM TO BE SOLVED: To simultaneously achieve high integration of a semiconductor integrated circuit and high performance of a function element.SOLUTION: A semiconductor device comprises: switch elements 3 and 4 disposed on a surface region of a semiconductor substrate 1; a contact plug 6 in which the bottom surface is connected to the switch elements 3 and 4; and a function element 7 disposed directly on the top surface of the contact plug 6. The maximum surface roughness of the top surface of the contact plug 6 is 0.2 nm or less.
摘要翻译：要解决的问题：同时实现半导体集成电路的高集成度和功能元件的高性能。解决方案：半导体器件包括：设置在半导体衬底1的表面区域上的开关元件3和4; 接触插头6，其中底表面连接到开关元件3和4; 以及直接设置在接触插塞6的上表面上的功能元件7.接触插头6的上表面的最大表面粗糙度为0.2nm以下。版权所有（C）2012，JPO＆INPIT

3. 发明专利

JP2011079076A Polishing device and polishing method 审中-公开
标题翻译：抛光装置和抛光方法
公开(公告)号：JP2011079076A
公开(公告)日：2011-04-21
申请号：JP2009231447
申请日：2009-10-05
申请人： Toshiba Corp , 株式会社東芝
发明人： NAKAMURA KENRO , MATSUI YUKITERU , NISHIOKA TAKESHI
IPC分类号： B24B37/00 , B24B37/015 , H01L21/304
CPC分类号： B24B37/10 , B24B55/02 , B24B57/02
摘要： PROBLEM TO BE SOLVED: To provide a polishing device which can cool a polishing pad while suppressing an influence given to a polishing operation. SOLUTION: The polishing device includes: a rotatable turn table 11 having the polishing pad 12 bonded to an upper surface; a top ring 25 holding a semiconductor wafer 27 so as to be rotatable and allowing a polishing surface of the semiconductor wafer 27 to be opposed to the polishing pad 12; a separating wall 21 which abuts on an upper surface of the polishing pad 12, partitions the polishing pad 12 to a polishing area 43 in which the top ring 25 opposed to the polishing pad 12 is arranged and a non-polishing area 41 in which the top ring 25 is not arranged and includes a polishing contact surface 37 formed by the rotating polishing pad 12 which comes into contact with the top ring 25 in the radial direction of the polishing pad 12 of the non-polishing area 41; a slurry supply pipe 18 for supplying slurry to the upper surface of the polishing pad 12 of the polishing area 43 side; and a cooling medium supply pipe 25 for supplying a cooling medium to the upper surface of the polishing pad 12 of the non-polishing area 41. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种可以在抑制对抛光操作的影响的同时冷却抛光垫的抛光装置。解决方案：抛光装置包括：具有结合到上表面的抛光垫12的可旋转转台11; 保持半导体晶片27以能够旋转并允许半导体晶片27的抛光表面与抛光垫12相对的顶环25; 与研磨垫12的上表面抵接的分隔壁21将抛光垫12分割成配置有与抛光垫12相对的顶环25的研磨区域43和未研磨区域41，顶环25不布置，并且包括由在非抛光区域41的抛光垫12的径向与顶环25接触的旋转抛光垫12形成的抛光接触表面37; 用于将浆料供给到抛光区域43侧的抛光垫12的上表面的浆料供给管18; 以及用于向非抛光区域41的抛光垫12的上表面供给冷却介质的冷却介质供给管25.版权所有（C）2011，JPO＆INPIT

4. 发明专利

JP2010135543A Fabricating method of nonvolatile semiconductor storage apparatus 有权
标题翻译：非挥发性半导体存储装置的制造方法
公开(公告)号：JP2010135543A
公开(公告)日：2010-06-17
申请号：JP2008309634
申请日：2008-12-04
申请人： Toshiba Corp , 株式会社東芝
发明人： MATSUI YUKITERU , KUBOTA TAKEO , TATEYAMA YOSHIKUNI , MINAMI YOSHIHIRO , KANETANI HIROYUKI
IPC分类号： H01L21/8246 , H01L27/105
CPC分类号： H01L27/11507 , H01L21/0206 , H01L21/31053 , H01L21/32139 , H01L28/55
摘要： PROBLEM TO BE SOLVED: To reduce etching failure of a ferroelectric material, caused by the dust on a hard mask. SOLUTION: After stacking an electrode film 23, a ferroelectric film 24, and an electrode film 25 sequentially on a semiconductor substrate 11, a hard mask HM is stacked. Then, by using a surfactant, the surface of the hard mask HM is scrub-cleaned, and thereafter, the hard mask HM is patterned in compliance with the planar shape of a ferroelectric capacitor 26. By anisotropically etching the electrode film 25, the ferroelectric film 24, and the electrode film 23 and sequentially using the patterned hard mask HM, a top electrode 25a, a ferroelectric layer 24a, and the bottom electrode 23a of the ferroelectric capacitor 26 are formed on the semiconductor substrate 11. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：减少由硬掩模上的灰尘引起的铁电材料的蚀刻失效。解决方案：在半导体衬底11上依次层叠电极膜23，铁电体膜24和电极膜25之后，堆叠硬掩模HM。然后，通过使用表面活性剂，对硬质掩模HM的表面进行擦洗处理，然后根据强电介质电容器26的平面形状将硬掩模HM图案化。通过各向异性蚀刻电极膜25，铁电体膜24和电极膜23，并依次使用图案化硬掩模HM，上电极25a，强电介质层24a和强电介质电容器26的底电极23a形成在半导体衬底11上。版权所有：（C）2010，JPO＆INPIT

5. 发明专利

JP2009123782A Method for manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2009123782A
公开(公告)日：2009-06-04
申请号：JP2007293581
申请日：2007-11-12
申请人： Toshiba Corp , 株式会社東芝
发明人： MATSUI YUKITERU , KINOSHITA MASAKO , MITSUYOSHI YASURO , TATEYAMA YOSHIKUNI , NISHIOKA TAKESHI , YANO HIROYUKI
IPC分类号： H01L21/3205 , H01L21/304
CPC分类号： H01L21/76808 , C09G1/02 , H01L21/31058 , H01L21/31144 , H01L21/312 , H01L21/76811 , H01L21/76835
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device capable of forming a dual damascene at a high production yield by decreasing a defect and flatening an organic film.
SOLUTION: The method for manufacturing the semiconductor device includes the steps of: forming a film on an insulating film provided on a semiconductor substrate and having a concave part by applying a solution including a solvent and an organic component; obtaining an organic film precursor by baking the film at a first temperature without organic component bridging; leaving the organic film precursor in the concave part by polishing with the use of a slurry including a resin particle; obtaining a first organic film 19 burried in the concave part by removing the solvent by baking the organic film precursor at a second temperature higher than the first temperature after polishing; obtaining a lower layer film by forming a second organic film 20 on the insulating film with the first organic film burried by the applying method; sequentially forming an intermediate layer 22 and a resist film 23 on the lower layer film; and pattern-exposing the resist film.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：解决的问题：提供一种通过减少缺陷和使有机膜平坦化来制造能够以高生产率形成双镶嵌的半导体器件的方法。解决方案：制造半导体器件的方法包括以下步骤：通过施加包括溶剂和有机组分的溶液，在设置在半导体衬底上并具有凹部的绝缘膜上形成膜; 通过在没有有机组分桥接的第一温度下烘烤所述膜来获得有机膜前体; 通过使用包含树脂颗粒的浆料进行抛光，将有机膜前体留在凹部中; 通过在高于抛光后的第一温度的第二温度下烘烤有机膜前体来除去溶剂，从而获得在凹部中嵌入的第一有机膜19; 通过在绝缘膜上形成第二有机膜20，通过涂布方法固化第一有机膜来获得下层膜; 在下层膜上依次形成中间层22和抗蚀剂膜23; 并且对抗蚀剂膜进行图案曝光。版权所有（C）2009，JPO＆INPIT

6. 发明专利

JP2008270360A Manufacturing method of semiconductor device 审中-公开
标题翻译：半导体器件的制造方法
公开(公告)号：JP2008270360A
公开(公告)日：2008-11-06
申请号：JP2007108387
申请日：2007-04-17
申请人： Toshiba Corp , 株式会社東芝
发明人： MINAMI FUKUGAKU , MATSUI YUKITERU , DOI SHUNSUKE , TATEYAMA YOSHIKUNI , YANO HIROYUKI
IPC分类号： H01L21/304 , H01L21/3205
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing semiconductor device that suppresses the occurrence of a fault and assures high reliability.
SOLUTION: The manufacturing method includes a step of setting a surface to be treated of a semiconductor substrate (6) in contact with a resin member (5) and sliding the semiconductor substrate and the resin member. The sliding is conducted while a hot water of 80°C or higher and 140°C or lower is sprayed to the resin member.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种抑制故障发生并确保高可靠性的半导体器件的制造方法。解决方案：制造方法包括设置与树脂构件（5）接触的半导体衬底（6）的待处理表面并使半导体衬底和树脂构件滑动的步骤。在80℃以上且140℃以下的热水喷射到树脂部件的同时进行滑动。版权所有（C）2009，JPO＆INPIT

7. 发明专利

JP2008235357A Chemical and mechanical polishing method and method of manufacturing semiconductor device 有权
标题翻译：化学和机械抛光方法及制造半导体器件的方法
公开(公告)号：JP2008235357A
公开(公告)日：2008-10-02
申请号：JP2007069170
申请日：2007-03-16
申请人： Toshiba Corp , 株式会社東芝
发明人： MATSUI YUKITERU , MINAMI FUKUGAKU , NISHIOKA TAKESHI , YANO HIROYUKI
IPC分类号： H01L21/304 , B24B37/00
CPC分类号： H01L21/3212 , B24B37/044 , C09G1/02 , H01L21/31053 , H01L21/31058
摘要： PROBLEM TO BE SOLVED: To provide a chemical and mechanical polishing method by which friction between a film to be polished and a polishing pad is sufficiently small to reduce defects on the surface after polishing, the film to be polished can be polished at a high polishing speed and moreover, the impact of waste liquid to environment is small. SOLUTION: The method is used to chemically and mechanically polish a film to be polished by bringing it into contact with a polishing pad (12) for rubbing, while supplying a first chemical (18) and a second chemical (21) onto the polishing pad (12). The first chemical contains an electrolyte and air bubbles of 10 nm-1,000 μm in diameter, and the second chemical contains abrasive particles. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种化学和机械抛光方法，通过该方法，要抛光的膜和抛光垫之间的摩擦足够小以减少抛光后的表面上的缺陷，可以将待抛光的膜抛光抛光速度高，而且废液对环境的影响小。解决方案：该方法用于通过使其与用于摩擦的抛光垫（12）接触来化学和机械抛光待抛光的膜，同时将第一化学品（18）和第二化学品（21）供应到抛光垫（12）。第一种化学品包含电解质和直径为10nm-1,000μm的气泡，第二种化学物质含有磨料颗粒。版权所有（C）2009，JPO＆INPIT

8. 发明专利

JP2005268409A Method for chemically and mechanically polishing slurry for organic film and organic film 有权
标题翻译：用于有机膜和有机膜的化学和机械抛光浆料的方法
公开(公告)号：JP2005268409A
公开(公告)日：2005-09-29
申请号：JP2004076408
申请日：2004-03-17
申请人： Toshiba Corp , 株式会社東芝
发明人： MATSUI YUKITERU , MINAMI FUKUGAKU , SHIGETA ATSUSHI , YANO HIROYUKI
IPC分类号： B24B37/00 , C09K3/14 , H01L21/304
摘要： PROBLEM TO BE SOLVED: To provide a method for polishing an organic film such as a resist film by low surface defect density. SOLUTION: The method is provided with a process of abutting a semiconductor substrate having the organic film on a polishing cloth pasted onto a turn table, a process of a first polishing process for polishing the organic film by supplying a dispersion solution containing resin particles of ≥0.05 μm and ≤5 μm primary particle diameter onto the polishing cloth, and a second polishing cloth for polishing the organic film by supplying the solution of a surface active agent having a hydrophilic part onto the polishing cloth following the first polishing process. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种通过低表面缺陷密度抛光抗蚀剂膜等有机膜的方法。解决方案：该方法提供了将具有有机膜的半导体衬底抵接在粘贴在转台上的抛光布上的工艺，通过提供含有树脂的分散溶液来抛光有机膜的第一抛光工艺的过程抛光布上的≥0.05μm和≤5μm的一次粒径的颗粒，以及第二抛光布，用于在第一次抛光处理之后将具有亲水部分的表面活性剂的溶液供应到抛光布上来抛光有机膜。版权所有（C）2005，JPO＆NCIPI

9. 发明专利

JP2013131535A Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2013131535A
公开(公告)日：2013-07-04
申请号：JP2011278328
申请日：2011-12-20
申请人： Toshiba Corp , 株式会社東芝
发明人： MATSUI YUKITERU , TOMITA HIROSHI
IPC分类号： H01L21/304 , H01L21/76
摘要： PROBLEM TO BE SOLVED: To downsize an element and improve flatness at a CMP step.SOLUTION: According to this embodiment, a method of manufacturing a semiconductor device is provided. In the method of manufacturing a semiconductor device, a stopper film 13 is formed on a semiconductor substrate 10. A groove 14 is formed to the stopper film and the semiconductor substrate. An organic molecule that reacts with the stopper film is added to form a self-organization single molecular layer 15 on a surface of the stopper film. A polished film 16 is formed inside the groove and on the self-organization single molecular layer outside the groove. The polished film on the self-organization single molecular layer outside the groove is removed by a CMP method using a slurry.
摘要翻译：要解决的问题：为了减小元件的尺寸并提高CMP步骤的平坦度。解决方案：根据本实施例，提供一种制造半导体器件的方法。在制造半导体器件的方法中，在半导体衬底10上形成阻挡膜13.在阻挡膜和半导体衬底上形成沟槽14。加入与阻挡膜反应的有机分子，以在阻挡膜的表面上形成自组织单分子层15。在凹槽内部和沟槽外部的自组织单分子层上形成抛光膜16。通过使用浆料的CMP方法除去槽外部的自组织单分子层上的抛光膜。

10. 发明专利

JP2013102090A Chemical planarization method and chemical planarization device 有权
标题翻译：化学平面化方法和化学平面化装置
公开(公告)号：JP2013102090A
公开(公告)日：2013-05-23
申请号：JP2011245683
申请日：2011-11-09
申请人： Toshiba Corp , 株式会社東芝
发明人： KODERA MASAKO , MATSUI YUKITERU
IPC分类号： H01L21/306
CPC分类号： H01L21/67086 , H01L21/31055 , H01L21/67011
摘要： PROBLEM TO BE SOLVED: To provide a chemical planarization method and a chemical planarization device for planarizing a silicon oxide film by suppressing generation of scratch.SOLUTION: The chemical planarization method includes a step for preparing a process liquid containing a silicofluoride hydrofluoric acid aqueous solution which contains silicon oxide dissolved in a saturated concentration. The method further includes a step for reducing the height of protrusions and recesses by changing the equilibrium state of the process liquid while bringing a silicon oxide film having protrusions and recesses into contact with the process liquid thereby dissolving the protrusions of the protrusions and recesses.

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