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1. 发明授权

US09287400B2 Semiconductor device and method for manufacturing the same 有权
公开(公告)号：US09287400B2
公开(公告)日：2016-03-15
申请号：US13587361
申请日：2012-08-16
申请人： Toshiaki Iwamatsu , Takashi Terada , Hirofumi Shinohara , Kozo Ishikawa , Ryuta Tsuchiya , Kiyoshi Hayashi
发明人： Toshiaki Iwamatsu , Takashi Terada , Hirofumi Shinohara , Kozo Ishikawa , Ryuta Tsuchiya , Kiyoshi Hayashi
IPC分类号： H01L21/336 , H01L29/78 , H01L29/66 , H01L21/265
CPC分类号： H01L29/66795 , H01L21/26506 , H01L21/26513 , H01L21/26586 , H01L21/28035 , H01L21/3081 , H01L21/3086 , H01L21/321 , H01L29/785
摘要： An object of the present invention is to provide a semiconductor device having a fin-type transistor that is excellent in characteristics by forming a fin-shaped semiconductor portion and a gate electrode with high precision or by making improvement regarding variations in characteristics among elements. The present invention is a semiconductor device including a fin-shaped semiconductor portion having a source region formed on one side thereof and a drain region formed on the other side thereof, and a gate electrode formed between the source region and the drain region to surround the fin-shaped semiconductor portion with a gate insulating film interposed therebetween. One solution for solving the problem according to the invention is that the gate electrode uses a metal material or a silicide material that is wet etchable.

2. 发明授权

US08269288B2 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08269288B2
公开(公告)日：2012-09-18
申请号：US12253563
申请日：2008-10-17
申请人： Toshiaki Iwamatsu , Takashi Terada , Hirofumi Shinohara , Kozo Ishikawa , Ryuta Tsuchiya , Kiyoshi Hayashi
发明人： Toshiaki Iwamatsu , Takashi Terada , Hirofumi Shinohara , Kozo Ishikawa , Ryuta Tsuchiya , Kiyoshi Hayashi
IPC分类号： H01L29/06
CPC分类号： H01L29/66795 , H01L21/26506 , H01L21/26513 , H01L21/26586 , H01L21/28035 , H01L21/3081 , H01L21/3086 , H01L21/321 , H01L29/785
摘要： An object of the present invention is to provide a semiconductor device having a fin-type transistor that is excellent in characteristics by forming a fin-shaped semiconductor portion and a gate electrode with high precision or by making improvement regarding variations in characteristics among elements. The present invention is a semiconductor device including a fin-shaped semiconductor portion having a source region formed on one side thereof and a drain region formed on the other side thereof, and a gate electrode formed between the source region and the drain region to surround the fin-shaped semiconductor portion with a gate insulating film interposed therebetween. One solution for solving the problem according to the invention is that the gate electrode uses a metal material or a silicide material that is wet etchable.
摘要翻译：本发明的目的是提供一种半导体器件，其具有通过以高精度形成鳍状半导体部分和栅极电极或通过改善元件之间的特性变化而具有优异的特性的鳍型晶体管。本发明是一种半导体器件，包括：鳍状半导体部分，其一侧形成有源极区域，在其另一侧形成有漏极区域，以及形成在源极区域和漏极区域之间的栅电极，翅片状半导体部分，其间具有栅极绝缘膜。解决根据本发明的问题的一种解决方案是栅电极使用可湿蚀刻的金属材料或硅化物材料。

3. 发明申请

US20090101977A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090101977A1
公开(公告)日：2009-04-23
申请号：US12253563
申请日：2008-10-17
申请人： Toshiaki Iwamatsu , Takashi Terada , Hirofumi Shinohara , Kozo Ishikawa , Ryuta Tsuchiya , Kiyoshi Hayashi
发明人： Toshiaki Iwamatsu , Takashi Terada , Hirofumi Shinohara , Kozo Ishikawa , Ryuta Tsuchiya , Kiyoshi Hayashi
IPC分类号： H01L47/00 , H01L21/336
CPC分类号： H01L29/66795 , H01L21/26506 , H01L21/26513 , H01L21/26586 , H01L21/28035 , H01L21/3081 , H01L21/3086 , H01L21/321 , H01L29/785
摘要： An object of the present invention is to provide a semiconductor device having a fin-type transistor that is excellent in characteristics by forming a fin-shaped semiconductor portion and a gate electrode with high precision or by making improvement regarding variations in characteristics among elements. The present invention is a semiconductor device including a fin-shaped semiconductor portion having a source region formed on one side thereof and a drain region formed on the other side thereof, and a gate electrode formed between the source region and the drain region to surround the fin-shaped semiconductor portion with a gate insulating film interposed therebetween. One solution for solving the problem according to the invention is that the gate electrode uses a metal material or a silicide material that is wet etchable.
摘要翻译：本发明的目的是提供一种半导体器件，其具有通过以高精度形成鳍状半导体部分和栅极电极或通过改善元件之间的特性变化而具有优异的特性的鳍型晶体管。本发明是一种半导体器件，包括：鳍状半导体部分，其一侧形成有源极区域，在其另一侧形成有漏极区域，以及形成在源极区域和漏极区域之间的栅电极，翅片状半导体部分，其间具有栅极绝缘膜。解决根据本发明的问题的一种解决方案是栅电极使用可湿蚀刻的金属材料或硅化物材料。

4. 发明申请

US20110031552A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110031552A1
公开(公告)日：2011-02-10
申请号：US12852039
申请日：2010-08-06
申请人： Toshiaki IWAMATSU , Kozo Ishikawa , Kiyoshi Hayashi
发明人： Toshiaki IWAMATSU , Kozo Ishikawa , Kiyoshi Hayashi
IPC分类号： H01L27/12 , H01L21/84
CPC分类号： H01L21/845 , H01L27/1211
摘要： To provide, in FINFET whose threshold voltage is determined essentially by the work function of a gate electrode, a technology capable of adjusting the threshold voltage of FINFET without changing the material of the gate electrode. FINFET is formed over an SOI substrate comprised of a substrate layer, a buried insulating layer formed over the substrate layer, and a silicon layer formed over the buried insulating layer. The substrate layer has therein a first semiconductor region contiguous to the buried insulating layer. The silicon layer of the SOI substrate is processed into a fin. A ratio of the height of the fin to the width of the fin is adjusted to fall within a range of from 1 or greater but not greater than 2. In addition, a voltage can be applied to the first semiconductor region.
摘要翻译：在FINFET中，其阈值电压基本上由栅电极的功函数确定，能够在不改变栅电极的材料的情况下调节FINFET的阈值电压的技术。 FINFET形成在由衬底层，在衬底层上形成的掩埋绝缘层和形成在掩埋绝缘层上的硅层的SOI衬底上。衬底层中具有与掩埋绝缘层邻接的第一半导体区域。将SOI衬底的硅层加工成翅片。将翅片的高度与翅片的宽度的比率调整为在1以上但不大于2的范围内。此外，可以向第一半导体区域施加电压。

5. 发明授权

US08754471B2 Semiconductor device having gate in recess 有权
标题翻译：半导体器件具有凹槽中的栅极
公开(公告)号：US08754471B2
公开(公告)日：2014-06-17
申请号：US13040610
申请日：2011-03-04
申请人： Toshiaki Iwamatsu , Kozo Ishikawa , Masashi Kitazawa , Kiyoshi Hayashi , Takahiro Maruyama , Masaaki Shinohara , Kenji Kawai
发明人： Toshiaki Iwamatsu , Kozo Ishikawa , Masashi Kitazawa , Kiyoshi Hayashi , Takahiro Maruyama , Masaaki Shinohara , Kenji Kawai
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L29/66 , H01L29/78
CPC分类号： H01L29/66621 , H01L21/28 , H01L29/66795 , H01L29/772 , H01L29/7834 , Y02E10/50
摘要： There are provided a semiconductor device which can be miniaturized without being deteriorated in characteristics, and a manufacturing method thereof. The semiconductor device includes a semiconductor substrate having a main surface, a source region and a drain region formed apart from each other in the main surface, a gate electrode layer formed over the main surface sandwiched between the source region and the drain region, a first conductive layer formed so as to be in contact with the surface of the source region, and a second conductive layer formed so as to be in contact with the surface of the drain region. A recess is formed in the main surface so as to extend from the contact region between the first conductive layer and the source region through a part underlying the gate electrode layer to the contact region between the second conductive layer and the drain region.
摘要翻译：提供了可以在不劣化特性的情况下小型化的半导体器件及其制造方法。半导体器件包括：主表面，源极区域和漏极区域在主表面彼此分离形成的半导体衬底;形成在源区域和漏极区域之间的主表面上的栅电极层;第一形成为与源极区域的表面接触的导电层，以及形成为与漏极区域的表面接触的第二导电层。在主表面上形成凹部，以便通过栅极电极层下面的部分从第一导电层和源极区域之间的接触区域延伸到第二导电层和漏极区域之间的接触区域。

6. 发明授权

US08492230B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08492230B2
公开(公告)日：2013-07-23
申请号：US12872900
申请日：2010-08-31
申请人： Kozo Ishikawa , Masaaki Shinohara , Toshiaki Iwamatsu
发明人： Kozo Ishikawa , Masaaki Shinohara , Toshiaki Iwamatsu
IPC分类号： H01L21/84 , H01L29/78
CPC分类号： H01L27/1211 , H01L21/76243 , H01L21/76256 , H01L21/845
摘要： To provide a technique capable of achieving improvement of the parasitic resistance in FINFETs. In the FINFET in the present invention, a sidewall is formed of a laminated film. Specifically, the sidewall is composed of a first silicon oxide film, a silicon nitride film formed over the first silicon oxide film, and a second silicon oxide film formed over the silicon nitride film. The sidewall is not formed on the side wall of a fin. Thus, in the present invention, the sidewall is formed on the side wall of a gate electrode and the sidewall is not formed on the side wall of the fin.
摘要翻译：提供能够实现FINFET中寄生电阻的改善的技术。在本发明的FINFET中，由层叠膜形成侧壁。具体地，侧壁由形成在第一氧化硅膜上的第一氧化硅膜，氮化硅膜和形成在氮化硅膜上的第二氧化硅膜构成。侧壁不形成在翅片的侧壁上。因此，在本发明中，侧壁形成在栅电极的侧壁上，侧壁不形成在翅片的侧壁上。

7. 发明申请

US20110049629A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110049629A1
公开(公告)日：2011-03-03
申请号：US12872900
申请日：2010-08-31
申请人： Kozo Ishikawa , Masaaki Shinohara , Toshiaki Iwamatsu
发明人： Kozo Ishikawa , Masaaki Shinohara , Toshiaki Iwamatsu
IPC分类号： H01L27/088 , H01L21/762
CPC分类号： H01L27/1211 , H01L21/76243 , H01L21/76256 , H01L21/845
摘要： To provide a technique capable of achieving improvement of the parasitic resistance in FINFETs. In the FINFET in the present invention, a sidewall is formed of a laminated film. Specifically, the sidewall is composed of a first silicon oxide film, a silicon nitride film formed over the first silicon oxide film, and a second silicon oxide film formed over the silicon nitride film. The sidewall is not formed on the side wall of a fin. Thus, in the present invention, the sidewall is formed on the side wall of a gate electrode and the sidewall is not formed on the side wall of the fin.
摘要翻译：提供能够实现FINFET中寄生电阻的改善的技术。在本发明的FINFET中，由层叠膜形成侧壁。具体地，侧壁由形成在第一氧化硅膜上的第一氧化硅膜，氮化硅膜和形成在氮化硅膜上的第二氧化硅膜构成。侧壁不形成在翅片的侧壁上。因此，在本发明中，侧壁形成在栅电极的侧壁上，侧壁不形成在翅片的侧壁上。

8. 发明授权

US4276572A Automatic message announcement system 失效
标题翻译：自动消息通知系统
公开(公告)号：US4276572A
公开(公告)日：1981-06-30
申请号：US88639
申请日：1979-10-26
申请人： Yoshiro Hayashi , Akira Sugihara , Takaki Shimura , Kozo Ishikawa , Kiyoshi Wada , Eiji Yamanaka , Shunsuke Senba
发明人： Yoshiro Hayashi , Akira Sugihara , Takaki Shimura , Kozo Ishikawa , Kiyoshi Wada , Eiji Yamanaka , Shunsuke Senba
IPC分类号： B61L25/02 , G10L13/04 , G10L19/00 , G11B5/00 , H04H20/00 , H04H20/10 , H04H20/62 , H04H60/06 , H04H60/07 , H04R27/00
CPC分类号： H04H20/62 , G10L19/00 , H04H20/10 , H04H60/06 , H04H60/07 , H04R27/00
摘要： An automatic message announcement system for announcing the approach, arrival, and departure of vehicles such as trains at a train station. An addressable voice memory is provided for storing sequences of voice segments which are read out upon receipt of announcement command input signals to form messages for announcing that a vehicle is approaching or has arrived or is departing, with specific information such as the vehicle's destination being included in the announcement by inserting the appropriate voice segments at the proper points in the sequence. The messages are composed in such a manner that the sequences of voice segments can be altered to form shorter, but still intelligible, messages if vehicles traffic is so heavy that one message is due for announcement before the previous announcement is completed. A priority selection circuit is provided for giving priority to the announcement command input signals, along with a memory for storing the addresses of the voice segments, a control circuit for reading out the memory content on the basis of the announcement command input signals and generating a message pattern to be announced, and an edition control circuit for supplying the appropriate addresses to the voice memory so that the proper voice segments can be read out in the desired sequence in order to produce the announcements.
摘要翻译：一个自动消息通知系统，用于宣布火车站等车辆的接近，到达和离开。提供可寻址语音存储器，用于存储在接收到通知命令输入信号时被读出的语音段的序列，以形成用于宣布车辆正在接近或已经到达或正在离开的消息，其中包括诸如车辆目的地的特定信息在公告中通过在适当的位置插入适当的语音段。这些消息以如下方式组成，即如果车辆交通量过大，以致在先前通知完成之前一个消息到期，则语音段的序列可被改变以形成较短但仍然可理解的消息。提供优先选择电路，用于优先发布通知命令输入信号，以及用于存储语音段的地址的存储器，用于根据通知命令输入信号读出存储器内容的控制电路，并产生一个消息模式，以及用于向语音存储器提供适当地址的版本控制电路，使得可以按期望的顺序读出适当的语音段，以便产生公告。

9. 发明授权

US4307859A Automatic message announcement system 失效
标题翻译：自动消息通知系统
公开(公告)号：US4307859A
公开(公告)日：1981-12-29
申请号：US121045
申请日：1980-02-13
申请人： Yoshiro Hayashi , Akira Sugihara , Takaki Shimura , Kozo Ishikawa , Kiyoshi Wada , Eiji Yamanaka , Shunsuke Senba
发明人： Yoshiro Hayashi , Akira Sugihara , Takaki Shimura , Kozo Ishikawa , Kiyoshi Wada , Eiji Yamanaka , Shunsuke Senba
IPC分类号： B61L25/02 , G01C22/02 , G07C5/08 , G08G1/01 , G08G1/12
CPC分类号： G07C5/0833 , B61L25/026 , G01C22/02
摘要： An automatic message announcement system for trains in the railroad station premises, including a train tracking circuit which tracks the location of approaching train, a trains information memory which stores information concerning each train, an edition circuit which combines the train information read out from said train information memory and a series of message patterns which include portions to be completed and which edits the message patterns to produce a series of short messages arranged sequentially according of their priority order to the content, an announcement message selection circuit which determines up to which short message among those arranged sequentially according to said priority order should be announced, in accordance with the location of the train at the time the announcement starts, and an automatic announcement system which includes a voice memory containing addressable voice segments for annoucing the message determined above.
摘要翻译：一种用于火车站场地列车的自动消息通知系统，包括跟踪接近火车位置的列车跟踪电路，存储有关每列列车的信息的列车信息存储器，组合从列车读出的列车信息的编辑电路信息存储器和一系列消息模式，其包括要完成的部分并且编辑消息模式以产生根据其优先级顺序依次排列到内容的一系列短消息;公告消息选择电路，确定哪个短消息根据所述优先顺序顺序排列的那些应当根据列车在通知开始时的位置被公布，并且包括包含可寻址语音段的语音存储器的自动通知系统，用于通知上述确定的消息。

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