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1. 发明授权

US5705230A Method for filling small holes or covering small recesses in the surface of substrates 失效
标题翻译：填充小孔或覆盖基板表面的小凹槽的方法
公开(公告)号：US5705230A
公开(公告)日：1998-01-06
申请号：US324460
申请日：1994-10-17
申请人： Toru Matanabe , Hirokazu Ezawa , Masahiro Miyata , Yukio Ikeda , Manabu Tsujimura , Hiroaki Inoue , Takeyuki Odaira , Naoaki Ogure
发明人： Toru Matanabe , Hirokazu Ezawa , Masahiro Miyata , Yukio Ikeda , Manabu Tsujimura , Hiroaki Inoue , Takeyuki Odaira , Naoaki Ogure
IPC分类号： C23C18/34 , C23C18/16 , C23C26/00 , C25D5/18 , C25D5/20 , H01L21/48 , H01L21/768 , H05K3/42 , B05D1/18
CPC分类号： C23C18/1608 , C23C18/1612 , C23C18/1651 , C23C18/1666 , C23C18/1831 , H01L21/486 , H01L21/76877 , H05K3/422
摘要： The improved method comprises contacting a substrate 5 at least once by a liquid containing the elements that compose a pure metal or an alloy with which the small holes or recesses 3a in the substrate 5 are to be filled or covered, whereby the liquid wets the inner surfaces of said small holes or recesses 3a while, at the same time, said pure metal or said alloy is deposited on the surface of said substrate 5. The method is capable of filling small holes or covering small recesses in the surface of the substrate 5 with improved efficiency while, at the same time, it improves the heat resistance and materials stability of the part that contains the formed filling or covering layer.
摘要翻译：改进的方法包括使基底5至少一次由含有构成纯金属的元素的液体或与基底5中的小孔或凹槽3a填充或覆盖的合金相接触，由此液体润湿内部所述小孔或凹部3a的表面，同时所述纯金属或所述合金沉积在所述基板5的表面上。该方法能够填充小孔或覆盖基板5的表面中的小凹槽同时提高了包含形成的填充或覆盖层的部件的耐热性和材料稳定性。

2. 发明授权

US5656542A Method for manufacturing wiring in groove 失效
标题翻译：槽内布线方法
公开(公告)号：US5656542A
公开(公告)日：1997-08-12
申请号：US544453
申请日：1995-10-18
申请人： Masahiro Miyata , Hirokazu Ezawa , Naoaki Ogure , Manabu Tsujimura , Takeyuki Ohdaira , Hiroaki Inoue , Yukio Ikeda
发明人： Masahiro Miyata , Hirokazu Ezawa , Naoaki Ogure , Manabu Tsujimura , Takeyuki Ohdaira , Hiroaki Inoue , Yukio Ikeda
IPC分类号： H01L21/768 , H01L23/532 , H01L21/26
CPC分类号： H01L21/76873 , H01L21/76843 , H01L21/76858 , H01L21/76877 , H01L23/53242 , H01L23/53247 , H01L2924/0002
摘要： In a semiconductor device and a method for manufacturing the same according to the present invention, for example, an insulating film is deposited on a silicon substrate, and a concave groove is formed in the insulating film in accordance with a predetermined wiring pattern. Titanium and palladium are deposited in sequence on the insulating film to form a titanium film and a palladium film, respectively. A silver film is formed on the palladium film by electroplating, and a groove-shaped silver wiring layer is formed by polishing. The resultant structure is annealed at a temperature of about 700.degree. C., and an intermetallic compound is formed by alloying the titanium film and palladium film with each other. Consequently, a burying type wiring layer whose resistance is lower than that of aluminum, is constituted by the silver wiring layer and intermetallic compound.
摘要翻译：在根据本发明的半导体器件及其制造方法中，例如，在硅衬底上沉积绝缘膜，并且根据预定的布线图案在绝缘膜中形成凹槽。钛和钯依次沉积在绝缘膜上以分别形成钛膜和钯膜。通过电镀在钯膜上形成银膜，通过研磨形成槽状的银布线层。所得结构在约700℃的温度下退火，并通过使钛膜和钯膜彼此合金化形成金属间化合物。因此，电阻低于铝的掩埋型布线层由银布线层和金属间化合物构成。

3. 发明授权

US5500559A Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US5500559A
公开(公告)日：1996-03-19
申请号：US249127
申请日：1994-05-25
申请人： Masahiro Miyata , Hirokazu Ezawa , Naoaki Ogure , Manabu Tsujimura , Takeyuki Ohdaira , Hiroaki Inoue , Yukio Ikeda
发明人： Masahiro Miyata , Hirokazu Ezawa , Naoaki Ogure , Manabu Tsujimura , Takeyuki Ohdaira , Hiroaki Inoue , Yukio Ikeda
IPC分类号： H01L23/52 , H01L21/3205 , H01L21/768 , H01L23/532 , H01L31/06
CPC分类号： H01L21/76873 , H01L21/76843 , H01L21/76858 , H01L21/76877 , H01L23/53242 , H01L23/53247 , H01L2924/0002
摘要： In a semiconductor device and a method for manufacturing the same according to the present invention, for example, an insulating film is deposited on a silicon substrate, and a concave groove is formed in the insulating film in accordance with a predetermined wiring pattern. Titanium and palladium are deposited in sequence on the insulating film to form a titanium film and a palladium film, respectively. A silver film is formed on the palladium film by electroplating, and a groove-shaped silver wiring layer is formed by polishing. The resultant structure is annealed at a temperature of about 700.degree. C., and an intermetallic compound is formed by alloying the titanium film and palladium film with each other. Consequently, a burying type wiring layer whose resistance is lower than that of aluminum, is constituted by the silver wiring layer and intermetallic compound.
摘要翻译：在根据本发明的半导体器件及其制造方法中，例如，在硅衬底上沉积绝缘膜，并且根据预定的布线图案在绝缘膜中形成凹槽。钛和钯依次沉积在绝缘膜上以分别形成钛膜和钯膜。通过电镀在钯膜上形成银膜，通过研磨形成槽状的银布线层。所得结构在约700℃的温度下退火，并通过使钛膜和钯膜彼此合金化形成金属间化合物。因此，电阻低于铝的掩埋型布线层由银布线层和金属间化合物构成。

4. 发明授权

US06706422B2 Electroless Ni—B plating liquid, electronic device and method for manufacturing the same 有权
标题翻译：无电镀Ni-B电镀液，电子器件及其制造方法
公开(公告)号：US06706422B2
公开(公告)日：2004-03-16
申请号：US09994834
申请日：2001-11-28
申请人： Hiroaki Inoue , Kenji Nakamura , Moriji Matsumoto , Hirokazu Ezawa , Masahiro Miyata , Manabu Tsujimura
发明人： Hiroaki Inoue , Kenji Nakamura , Moriji Matsumoto , Hirokazu Ezawa , Masahiro Miyata , Manabu Tsujimura
IPC分类号： B32B1504
CPC分类号： C23C18/50 , C23C18/34 , Y10T428/12576 , Y10T428/12896 , Y10T428/12903 , Y10T428/12944 , Y10T428/265
摘要： There is provided an electroless Ni—B plating liquid for forming, a Ni—B alloy film on at least part of the interconnects of an electronic device having an embedded interconnect structure, the electroless Ni—B plating liquid comprising nickel ions, a complexing agent for nickel ions, a reducing agent for nickel ions, and ammonums (NH4+). The electroless Ni—B plating liquid can lower the boron content of the resulting plated film without increasing the plating rate and form a Ni—B alloy film having an FCC crystalline structure.
摘要翻译：提供了一种无电Ni-B电镀液，用于在具有嵌入式互连结构的电子器件的至少一部分互连上形成Ni-B合金膜，包含镍离子的无电Ni-B电镀液，络合剂用于镍离子，镍离子还原剂和氨（NH 4+）。无电镀Ni-B电镀液可以降低所得镀膜的硼含量，而不增加电镀速率，并形成具有FCC晶体结构的Ni-B合金膜。

5. 发明授权

US06936302B2 Electroless Ni-B plating liquid, electronic device and method for manufacturing the same 失效
标题翻译：无电镀Ni-B电镀液，电子器件及其制造方法
公开(公告)号：US06936302B2
公开(公告)日：2005-08-30
申请号：US10765046
申请日：2004-01-28
申请人： Hiroaki Inoue , Kenji Nakamura , Moriji Matsumoto , Hirokazu Ezawa , Masahiro Miyata , Manabu Tsujimura
发明人： Hiroaki Inoue , Kenji Nakamura , Moriji Matsumoto , Hirokazu Ezawa , Masahiro Miyata , Manabu Tsujimura
IPC分类号： C23C18/16 , C23C18/34 , C23C18/50 , H01L21/288 , H01L21/3205 , H01L23/52 , B05D5/12
CPC分类号： C23C18/50 , C23C18/34 , Y10T428/12576 , Y10T428/12896 , Y10T428/12903 , Y10T428/12944 , Y10T428/265
摘要： There is provided an electroless Ni—B plating liquid for forming, a Ni—B alloy film on at least part of the interconnects of an electronic device having an embedded interconnect structure, the electroless Ni—B plating liquid comprising nickel ions, a complexing agent for nickel ions, a reducing agent for nickel ions, and ammonums (NH4+). The electroless Ni—B plating liquid can lower the boron content of the resulting plated film without increasing the plating rate and form a Ni—B alloy film having an FCC crystalline structure.
摘要翻译：提供了一种无电Ni-B电镀液，用于在具有嵌入式互连结构的电子器件的至少一部分互连上形成Ni-B合金膜，包含镍离子的无电Ni-B电镀液，络合剂对于镍离子，用于镍离子的还原剂和氨（NH 4 SO 3 +）。无电镀Ni-B电镀液可以降低所得镀膜的硼含量，而不增加电镀速率，并形成具有FCC晶体结构的Ni-B合金膜。

6. 发明授权

US06569752B1 Semiconductor element and fabricating method thereof 有权
标题翻译：半导体元件及其制造方法
公开(公告)号：US06569752B1
公开(公告)日：2003-05-27
申请号：US09522820
申请日：2000-03-10
申请人： Soichi Homma , Masahiro Miyata , Hirokazu Ezawa , Junichiro Yoshioka , Hiroaki Inoue , Tsuyoshi Tokuoka
发明人： Soichi Homma , Masahiro Miyata , Hirokazu Ezawa , Junichiro Yoshioka , Hiroaki Inoue , Tsuyoshi Tokuoka
IPC分类号： H01L2144
CPC分类号： H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L2224/02126 , H01L2224/0347 , H01L2224/03912 , H01L2224/03914 , H01L2224/0401 , H01L2224/05027 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05541 , H01L2224/05558 , H01L2224/05572 , H01L2224/0558 , H01L2224/05639 , H01L2224/1132 , H01L2224/1147 , H01L2224/11901 , H01L2224/11902 , H01L2224/13006 , H01L2224/13023 , H01L2224/13111 , H01L2224/16238 , H01L2224/16507 , H01L2924/00013 , H01L2924/0002 , H01L2924/01004 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/0102 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01041 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01092 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/10253 , H01L2924/207 , H01L2224/13099 , H01L2924/00014 , H01L2224/05099 , H01L2224/13599 , H01L2224/05599 , H01L2224/29099 , H01L2224/29599 , H01L2924/00 , H01L2224/05552
摘要： The present semiconductor element comprises a semiconductor substrate, a wiring pad formed thereon, a layer of barrier metal formed thereon, an intermetallic compound Ag3Sn formed thereon, and a protruded electrode consisting of low-melting metal formed thereon. In addition, a fabricating method of a semiconductor element comprises the steps of forming a wiring pad on a semiconductor substrate, forming a layer of barrier metal thereon, forming a metallic layer containing Ag thereon, forming a layer of low-melting metal containing Sn thereon, and melting the layer of low-melting metal containing Sn to form a protruded electrode and simultaneously to form an intermetallic compound Ag3Sn at an interface between the metallic layer containing Ag and the layer of low-melting metal containing Sn. Thus, with Pb-free solder, a semiconductor element of high reliability can be obtained.
摘要翻译：本半导体元件包括半导体衬底，形成在其上的布线衬垫，形成在其上的阻挡金属层，形成在其上的金属间化合物Ag 3 Sn，以及由其上形成的低熔点金属组成的突出电极。此外，半导体元件的制造方法包括以下步骤：在半导体衬底上形成布线焊盘，在其上形成阻挡金属层，在其上形成含有Ag的金属层，在其上形成含有Sn的低熔点金属层并且熔化含有Sn的低熔点金属层以形成突出电极，同时在包含Ag的金属层和含有Sn的低熔点金属层之间的界面处形成金属间化合物Ag 3 Sn。因此，利用无铅焊料，可以获得高可靠性的半导体元件。

7. 发明授权

US5529634A Apparatus and method of manufacturing semiconductor device 失效
标题翻译：半导体器件制造装置及方法
公开(公告)号：US5529634A
公开(公告)日：1996-06-25
申请号：US424623
申请日：1995-04-19
申请人： Masahiro Miyata , Hidemitsu Egawa , Johta Fukuhara , Shinzi Takeda , Hirokazu Ezawa
发明人： Masahiro Miyata , Hidemitsu Egawa , Johta Fukuhara , Shinzi Takeda , Hirokazu Ezawa
IPC分类号： C23C14/04 , C23C14/22 , H01L21/60 , H01L21/768 , H01L23/522 , H01L23/532 , C23C16/00
CPC分类号： C23C14/228 , C23C14/04 , C23C14/22 , H01L21/76885 , H01L23/5226 , H01L23/53242 , H01L24/11 , H01L2224/1147 , H01L2224/13099 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/19043 , H01L2924/3025
摘要： An evaporation chamber for forming fine metal particles is separated from a film formation chamber in which the substrate having a metal film such as a metal column thereon is placed during metal film deposition. The pressure of the film formation chamber is set to be lower than that of the evaporation chamber, and the fine metal particles are sprayed on the substrate by the pressure difference to form the metal column. Therefore, a wiring layer, a connection electrode for connecting the wiring layer to another wiring layer, and the like can easily be formed by a small number of steps.
摘要翻译：用于形成细金属颗粒的蒸发室与成膜室分离，其中在金属膜沉积期间放置有金属膜如金属柱的金属膜的基板。成膜室的压力被设定为低于蒸发室的压力，并且通过压力差将金属微粒喷射在基板上以形成金属柱。因此，可以通过少量的步骤容易地形成布线层，用于将布线层连接到另一布线层的连接电极等。

8. 发明授权

US08314491B2 Manufacturing method of semiconductor device and semiconductor device 有权
标题翻译：半导体器件和半导体器件的制造方法
公开(公告)号：US08314491B2
公开(公告)日：2012-11-20
申请号：US12845937
申请日：2010-07-29
申请人： Soichi Yamashita , Tatsuo Migita , Tadashi Iijima , Masahiro Miyata , Masayuki Uchida , Takashi Togasaki , Hirokazu Ezawa
发明人： Soichi Yamashita , Tatsuo Migita , Tadashi Iijima , Masahiro Miyata , Masayuki Uchida , Takashi Togasaki , Hirokazu Ezawa
IPC分类号： H01L23/48
CPC分类号： H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/16 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L2224/02311 , H01L2224/02381 , H01L2224/0401 , H01L2224/04042 , H01L2224/05008 , H01L2224/05548 , H01L2224/05569 , H01L2224/05571 , H01L2224/05572 , H01L2224/05666 , H01L2224/0603 , H01L2224/06051 , H01L2224/11462 , H01L2224/1147 , H01L2224/11849 , H01L2224/13083 , H01L2224/13099 , H01L2224/13111 , H01L2224/13147 , H01L2224/13155 , H01L2224/16145 , H01L2224/2919 , H01L2224/32145 , H01L2224/45144 , H01L2224/48666 , H01L2224/73204 , H01L2224/73207 , H01L2224/73215 , H01L2224/81191 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00 , H01L2224/05552 , H01L2224/45015 , H01L2924/207
摘要： According to one embodiment, a manufacturing method of a semiconductor device attained as follows. A dielectric layer having a first opening and a second opening reaching an electrode terminal is formed by modifying a photosensitive resin film on a substrate on which the electrode terminal of a first conductive layer is provided. Next, a second conductive layer that is electrically connected to the electrode terminal is formed on the dielectric layer that includes inside of the first opening, and a third conductive layer that has an oxidation-reduction potential of which difference from the oxidation-reduction potential of the first conductive layer is smaller than a difference of the oxidation-reduction potential between the first conductive layer and the second conductive layer is formed on the second conductive layer. Next, a dielectric layer having a third opening reaching the third conductive layer and a fourth opening reaching the electrode terminal via the second opening is formed by modifying a photosensitive resin film, and a bump that is electrically connected to the third conductive layer is formed.
摘要翻译：根据一个实施例，半导体器件的制造方法如下。通过改变在其上设置有第一导电层的电极端子的基板上的感光性树脂膜，形成具有第一开口和到达电极端子的第二开口的电介质层。接下来，在包括第一开口的内部的电介质层上形成与电极端子电连接的第二导电层，以及具有与氧化还原电位不同的氧化还原电位的第三导电层第一导电层小于在第二导电层上形成第一导电层和第二导电层之间的氧化还原电位的差异。接下来，通过改变感光性树脂膜形成具有到达第三导电层的第三开口的电介质层和通过第二开口到达电极端子的第四开口，并且形成与第三导电层电连接的凸块。

9. 再颁专利

USRE37882E1 Semiconductor device manufacturing method 失效
标题翻译：半导体器件制造方法
公开(公告)号：USRE37882E1
公开(公告)日：2002-10-15
申请号：US09000865
申请日：1997-12-30
申请人： Hirokazu Ezawa , Masahiro Miyata
发明人： Hirokazu Ezawa , Masahiro Miyata
IPC分类号： H01L2144
CPC分类号： H01L21/76885 , H01L2924/0002 , H05K1/0306 , H05K3/4647 , H01L2924/00
摘要： With a semiconductor device manufacturing method, a lower-layer interconnection is formed on a circuit board on which a plurality of semiconductor chips are mounted. Using a screen plate with openings corresponding to desired positions on the lower-layer interconnection, screen printing of a metal paste is effected, and the printed metal paste is dried and calcined by heat treatment to form a metal pillar on the lower-layer interconnection. An insulating film covering the lower-layer interconnection and the metal pillar is formed so that the tip of the metal pillar may be exposed. An upper-layer interconnection is formed on the insulating film so that this layer may contact with the exposed tip of the metal pillar.
摘要翻译：利用半导体器件制造方法，在安装有多个半导体芯片的电路板上形成下层布线。使用具有对应于下层互连上的期望位置的开口的筛板，进行金属糊的丝网印刷，并且通过热处理干燥并煅烧印刷的金属糊料，以在下层互连上形成金属柱。形成覆盖下层布线和金属支柱的绝缘膜，使金属支柱的前端露出。在绝缘膜上形成上层布线，使得该层可与金属柱的露出端接触。

10. 发明申请

US20110024901A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件和半导体器件的制造方法
公开(公告)号：US20110024901A1
公开(公告)日：2011-02-03
申请号：US12845937
申请日：2010-07-29
申请人： Soichi Yamashita , Tatsuo Migita , Tadashi Iijima , Masahiro Miyata , Masayuki Uchida , Takashi Togasaki , Hirokazu Ezawa
发明人： Soichi Yamashita , Tatsuo Migita , Tadashi Iijima , Masahiro Miyata , Masayuki Uchida , Takashi Togasaki , Hirokazu Ezawa
IPC分类号： H01L23/52 , H01L21/283
CPC分类号： H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/16 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L2224/02311 , H01L2224/02381 , H01L2224/0401 , H01L2224/04042 , H01L2224/05008 , H01L2224/05548 , H01L2224/05569 , H01L2224/05571 , H01L2224/05572 , H01L2224/05666 , H01L2224/0603 , H01L2224/06051 , H01L2224/11462 , H01L2224/1147 , H01L2224/11849 , H01L2224/13083 , H01L2224/13099 , H01L2224/13111 , H01L2224/13147 , H01L2224/13155 , H01L2224/16145 , H01L2224/2919 , H01L2224/32145 , H01L2224/45144 , H01L2224/48666 , H01L2224/73204 , H01L2224/73207 , H01L2224/73215 , H01L2224/81191 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00 , H01L2224/05552 , H01L2224/45015 , H01L2924/207
摘要： According to one embodiment, a manufacturing method of a semiconductor device attained as follows. A dielectric layer having a first opening and a second opening reaching an electrode terminal is formed by modifying a photosensitive resin film on a substrate on which the electrode terminal of a first conductive layer is provided. Next, a second conductive layer that is electrically connected to the electrode terminal is formed on the dielectric layer that includes inside of the first opening, and a third conductive layer that has an oxidation-reduction potential of which difference from the oxidation-reduction potential of the first conductive layer is smaller than a difference of the oxidation-reduction potential between the first conductive layer and the second conductive layer is formed on the second conductive layer. Next, a dielectric layer having a third opening reaching the third conductive layer and a fourth opening reaching the electrode terminal via the second opening is formed by modifying a photosensitive resin film, and a bump that is electrically connected to the third conductive layer is formed.
摘要翻译：根据一个实施例，半导体器件的制造方法如下。通过改变在其上设置有第一导电层的电极端子的基板上的感光性树脂膜，形成具有第一开口和到达电极端子的第二开口的电介质层。接下来，在包括第一开口的内部的电介质层上形成与电极端子电连接的第二导电层，以及具有与氧化还原电位不同的氧化还原电位的第三导电层第一导电层小于在第二导电层上形成第一导电层和第二导电层之间的氧化还原电位的差异。接下来，通过改变感光性树脂膜形成具有到达第三导电层的第三开口的电介质层和通过第二开口到达电极端子的第四开口，并且形成与第三导电层电连接的凸块。

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