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1. 发明授权

US07447932B2 Semiconductor data processing device and data processing system 失效
标题翻译：半导体数据处理设备和数据处理系统
公开(公告)号：US07447932B2
公开(公告)日：2008-11-04
申请号：US11709777
申请日：2007-02-23
申请人： Toru Ichien , Wataru Yamaguchi , Masae Sasakawa , Mamoru Wakabayashi
发明人： Toru Ichien , Wataru Yamaguchi , Masae Sasakawa , Mamoru Wakabayashi
IPC分类号： G06F13/42
CPC分类号： G06F1/3237 , G06F1/3203 , G06F1/3228 , G06F1/3243 , G06F1/325 , G06F1/3275 , Y02D10/128 , Y02D10/14 , Y02D10/152
摘要： Disclosed herewith is a semiconductor data processing device that realizes low power consumption at the standby time and at the operation time, as well as speeds up the interfacing operation. The semiconductor data processing device can connect a non-volatile storage device to a general-purpose bus of a host system. The data processing device enters the active or standby state in response to the state of the general-purpose bus. In the standby state, the data processing device stops the internal clock signal and applies a substrate bias voltage to each object so as to suppress the potential sub-threshold leak current therefrom. This bias voltage is also applied to the central processing unit and the rewritable non-volatile memory for storing a control program to be executed by the central processing unit. The central processing unit processes data in units of n bits or below when the interface controller and the data transfer controller input/output parallel data in units of 2n bits.
摘要翻译：这里公开了一种半导体数据处理装置，其在待机时间和操作时间实现低功耗，并且加快了接口操作。半导体数据处理装置可以将非易失性存储装置连接到主机系统的通用总线。数据处理装置响应于通用总线的状态进入主动或待机状态。在待机状态下，数据处理装置停止内部时钟信号并向每个对象施加衬底偏置电压，以便抑制潜在的次阈值泄漏电流。该偏置电压也被施加到中央处理单元和可重写非易失性存储器，用于存储要由中央处理单元执行的控制程序。当接口控制器和数据传输控制器以2n位为单位输入/输出并行数据时，中央处理单元以n位为单位处理数据。

2. 发明授权

US07257720B2 Semiconductor processing device for connecting a non-volatile storage device to a general purpose bus of a host system 失效
标题翻译：用于将非易失性存储装置连接到主机系统的通用总线的半导体处理装置
公开(公告)号：US07257720B2
公开(公告)日：2007-08-14
申请号：US10702448
申请日：2003-11-07
申请人： Toru Ichien , Wataru Yamaguchi , Masae Sasakawa , Mamoru Wakabayashi
发明人： Toru Ichien , Wataru Yamaguchi , Masae Sasakawa , Mamoru Wakabayashi
IPC分类号： G06F1/26
CPC分类号： G06F1/3237 , G06F1/3203 , G06F1/3228 , G06F1/3243 , G06F1/325 , G06F1/3275 , Y02D10/128 , Y02D10/14 , Y02D10/152
摘要： Disclosed herewith is a semiconductor data processing device that realizes low power consumption at the standby time and at the operation time, as well as speeds up the interfacing operation. The semiconductor data processing device can connect a non-volatile storage device to a general-purpose bus of a host system. The data processing device enters the active or standby state in response to the state of the general-purpose bus. In the standby state, the data processing device stops the internal clock signal and applies a substrate bias voltage to each object so as to suppress the potential sub-threshold leak current therefrom. This bias voltage is also applied to the central processing unit and the rewritable non-volatile memory for storing a control program to be executed by the central processing unit. The central processing unit processes data in units of n bits or below when the interface controller and the data transfer controller input/output parallel data in units of 2n bits.
摘要翻译：这里公开了一种半导体数据处理装置，其在待机时间和操作时间实现低功耗，并且加快了接口操作。半导体数据处理装置可以将非易失性存储装置连接到主机系统的通用总线。数据处理装置响应于通用总线的状态进入主动或待机状态。在待机状态下，数据处理装置停止内部时钟信号并向每个对象施加衬底偏置电压，以便抑制潜在的次阈值泄漏电流。该偏置电压也被施加到中央处理单元和可重写非易失性存储器，用于存储要由中央处理单元执行的控制程序。当接口控制器和数据传输控制器以2n位为单位输入/输出并行数据时，中央处理单元以n位为单位处理数据。

3. 发明申请

US20080052549A1 Semiconductor data processing device and data processing system 审中-公开
公开(公告)号：US20080052549A1
公开(公告)日：2008-02-28
申请号：US11879516
申请日：2007-07-18
申请人： Toru Ichien , Wataru Yamaguchi , Masae Sasakawa , Mamoru Wakabayashi
发明人： Toru Ichien , Wataru Yamaguchi , Masae Sasakawa , Mamoru Wakabayashi
IPC分类号： G06F1/32
CPC分类号： G06F1/3237 , G06F1/3203 , G06F1/3228 , G06F1/3243 , G06F1/325 , G06F1/3275 , Y02D10/128 , Y02D10/14 , Y02D10/152
摘要： Disclosed herewith is a semiconductor data processing device that realizes low power consumption at the standby time and at the operation time, as well as speeds up the interfacing operation. The semiconductor data processing device can connect a non-volatile storage device to a general-purpose bus of a host system. The data processing device enters the active or standby state in response to the state of the general-purpose bus. In the standby state, the data processing device stops the internal clock signal and applies a substrate bias voltage to each object so as to suppress the potential sub-threshold leak current therefrom. This bias voltage is also applied to the central processing unit and the rewritable non-volatile memory for storing a control program to be executed by the central processing unit. The central processing unit processes data in units of n bits or below when the interface controller and the data transfer controller input/output parallel data in units of 2n bits.

4. 发明申请

US20070150768A1 Semiconductor data processing device and data processing system 失效
标题翻译：半导体数据处理设备和数据处理系统
公开(公告)号：US20070150768A1
公开(公告)日：2007-06-28
申请号：US11709777
申请日：2007-02-23
申请人： Toru Ichien , Wataru Yamaguchi , Masae Sasakawa , Mamoru Wakabayashi
发明人： Toru Ichien , Wataru Yamaguchi , Masae Sasakawa , Mamoru Wakabayashi
IPC分类号： G06F1/00
CPC分类号： G06F1/3237 , G06F1/3203 , G06F1/3228 , G06F1/3243 , G06F1/325 , G06F1/3275 , Y02D10/128 , Y02D10/14 , Y02D10/152
摘要： Disclosed herewith is a semiconductor data processing device that realizes low power consumption at the standby time and at the operation time, as well as speeds up the interfacing operation. The semiconductor data processing device can connect a non-volatile storage device to a general-purpose bus of a host system. The data processing device enters the active or standby state in response to the state of the general-purpose bus. In the standby state, the data processing device stops the internal clock signal and applies a substrate bias voltage to each object so as to suppress the potential sub-threshold leak current therefrom. This bias voltage is also applied to the central processing unit and the rewritable non-volatile memory for storing a control program to be executed by the central processing unit. The central processing unit processes data in units of n bits or below when the interface controller and the data transfer controller input/output parallel data in units of 2 n bits.
摘要翻译：这里公开了一种半导体数据处理装置，其在待机时间和操作时间实现低功耗，并且加快了接口操作。半导体数据处理装置可以将非易失性存储装置连接到主机系统的通用总线。数据处理装置响应于通用总线的状态进入主动或待机状态。在待机状态下，数据处理装置停止内部时钟信号并向每个对象施加衬底偏置电压，以便抑制潜在的次阈值泄漏电流。该偏置电压也被施加到中央处理单元和可重写非易失性存储器，用于存储要由中央处理单元执行的控制程序。当接口控制器和数据传输控制器以2 n位为单位输入/输出并行数据时，中央处理单元以n位为单位处理数据。

5. 发明授权

US09371188B2 Belt unit and image forming apparatus 有权
标题翻译：皮带单元和成像设备
公开(公告)号：US09371188B2
公开(公告)日：2016-06-21
申请号：US13846093
申请日：2013-03-18
申请人： Kotaro Takifuji , Wataru Yamaguchi
发明人： Kotaro Takifuji , Wataru Yamaguchi
IPC分类号： G03G15/16 , B65G15/60 , B41J2/00 , B41J11/00 , G03G15/01 , G03G15/00
CPC分类号： B65G15/60 , B41J2/00 , B41J11/007 , G03G15/0189 , G03G15/1615 , G03G15/6529 , G03G2215/00143
摘要： A belt unit including an endless belt, a first roller, a second roller, and a guiding member is provided. The guiding member includes a groove, in which a guided section of the endless belt is set, and the groove includes a first face and a second face. The first face is formed to have a first parting line extending in a direction to intersect with a central axis. The first face includes a first part in a frontward range and a second part in a rearward range with respect to the first parting line along a rotating direction of the guiding member. The first face has a first gap between the first part and the second part to form the first part in a position closer to the second face with respect to the second part.
摘要翻译：提供包括环形带，第一辊，第二辊和引导构件的带单元。引导构件包括其中设置环形带的引导部分的槽，并且槽包括第一面和第二面。第一面形成为具有沿与中心轴相交的方向延伸的第一分型线。第一面包括沿着引导构件的旋转方向相对于第一分割线的前方的第一部分和向后范围的第二部分。第一面在第一部分和第二部分之间具有第一间隙，以在相对于第二部分更接近第二面的位置中形成第一部分。

6. 发明授权

US08843031B2 Image forming apparatus providing accurate positioning of belt unit 有权
标题翻译：图像形成设备提供皮带单元的精确定位
公开(公告)号：US08843031B2
公开(公告)日：2014-09-23
申请号：US13728574
申请日：2012-12-27
申请人： Wataru Yamaguchi
发明人： Wataru Yamaguchi
IPC分类号： G03G15/16 , G03G21/16 , G03G15/14 , G03G15/01
CPC分类号： G03G15/14 , G03G15/0194 , G03G21/1647 , G03G21/168
摘要： An image forming apparatus includes a support frame having a first abutment portion, and a belt unit detachably attachable to the support frame and having a first abutted portion configured to be in contact with the first abutment portion. One of the support frame and the belt unit has a pressing portion, and remaining one of the support frame and the belt unit has a pressed portion pressed by the pressing portion so as to increase a contacting surface pressure between the first abutment portion and the first abutted portion. The pressing portion has a first contacting portion in contact with the pressed portion, and the pressed portion has a second contacting portion in contact with the first contacting portion. The first contacting portion and the second contacting portion are made from an electrically conductive material.
摘要翻译：图像形成装置包括具有第一邻接部分的支撑框架和可拆卸地附接到支撑框架并具有构造成与第一邻接部分接触的第一抵接部分的带单元。支撑框架和带单元中的一个具有按压部分，并且支撑框架和带单元中的其余一个具有被按压部分按压的按压部分，以便增加第一抵接部分和第一邻接部分。按压部分具有与被按压部分接触的第一接触部分，并且被按压部分具有与第一接触部分接触的第二接触部分。第一接触部分和第二接触部分由导电材料制成。

7. 发明授权

US08285176B2 Apparatus and spacer for use therein 有权
标题翻译：用于其中的装置和间隔件
公开(公告)号：US08285176B2
公开(公告)日：2012-10-09
申请号：US12730299
申请日：2010-03-24
申请人： Wataru Yamaguchi
发明人： Wataru Yamaguchi
IPC分类号： G03G15/08
CPC分类号： G03G15/1605 , G03G21/168 , G03G2221/1642
摘要： A spacer configured to minimize movement of a transfer unit (for example, a belt unit) is described. An apparatus may include a main body and a transfer unit disposed in the main body. The spacer may include various contact portions that contact a portion of the transfer unit and a portion of the main body to minimize relative movement of the transfer unit.
摘要翻译：描述了构造成使转印单元（例如，带单元）的移动最小化的间隔件。设备可以包括设置在主体中的主体和传送单元。间隔件可以包括接触转印单元的一部分和主体的一部分的各种接触部分，以最小化转印单元的相对运动。

8. 发明授权

US08390803B2 Calibration device and optical characteristic measuring system using the same 有权
标题翻译：校准装置和使用其的光学特性测量系统
公开(公告)号：US08390803B2
公开(公告)日：2013-03-05
申请号：US12953056
申请日：2010-11-23
申请人： Shinichi Iida , Wataru Yamaguchi
发明人： Shinichi Iida , Wataru Yamaguchi
IPC分类号： G01J1/10 , G01J3/42
CPC分类号： G01J1/12 , G01J1/04 , G01J3/02 , G01J3/0254 , G01J3/0272
摘要： A calibration device 21 according to the present invention is a member used for white calibration of an optical characteristic measuring apparatus 1 for measuring an optical characteristic of a specimen arranged to close a measuring opening and is used together with a spacer 24. Accordingly, such a calibration device 21 can perform more accurate white calibration by preventing formation of an interference pattern by the spacer 24.
摘要翻译：根据本发明的校准装置21是用于测量布置成关闭测量开口的试样的光学特性的光学特性测量装置1的白色校准的部件，并与间隔件24一起使用。因此，校准装置21可以通过防止间隔物24形成干涉图案来执行更准确的白色校准。

9. 发明申请

US20110141451A1 DISPLACEMENT MEASUREMENT DEVICE, EXPOSURE APPARATUS, AND WORKING DEVICE 有权
标题翻译：位移测量装置，曝光装置和工作装置
公开(公告)号：US20110141451A1
公开(公告)日：2011-06-16
申请号：US12959301
申请日：2010-12-02
申请人： Wataru Yamaguchi , Takahiro Matsumoto
发明人： Wataru Yamaguchi , Takahiro Matsumoto
IPC分类号： G03B27/32 , G01B9/02
CPC分类号： G01D5/38 , G01B9/02097 , G01B2290/70 , G03F7/70775
摘要： A device has a scale on which a grating pattern is formed, a light source to irradiate light on the scale, a wavelength plate to transform multiple diffracted lights from the light source into circular polarized light, respectively, an optical element to superposition and cause interference of the multiple diffracted lights, and a photodetector to receive the interfered light. Also, a generating unit to generate linearly polarized light by the light from the light source, so that the multiple diffracted lights input to the wavelength plate become linearly polarized light with a same mutual polarization direction.
摘要翻译：器件具有形成光栅图案的刻度，用于照射刻度的光的光源，波长板以将来自光源的多个衍射光分别转换成圆偏振光，光学元件叠加并引起干涉的多个衍射光，以及光电检测器，用于接收被干扰的光。另外，通过来自光源的光生成线偏振光的发生单元，使得输入到波长板的多个衍射光变成具有相同的相互偏振方向的线偏振光。

10. 发明授权

US5963334A Apparatus and method for measuring color of a measurement object 失效
标题翻译：用于测量测量对象的颜色的装置和方法
公开(公告)号：US5963334A
公开(公告)日：1999-10-05
申请号：US34393
申请日：1998-03-04
申请人： Wataru Yamaguchi , Mitsunobu Ota
发明人： Wataru Yamaguchi , Mitsunobu Ota
IPC分类号： G01J3/50 , G01N21/25 , G01Q90/00
CPC分类号： G01N21/255
摘要： A color measuring apparatus is provided with a radial illumination unit for projecting illumination light to a measurement object at a first illumination angle in a plurality of directions, a unidirectional illumination unit for projecting illumination light to the measurement object at a second illumination angle in a single direction, a unidirectional light receiving unit for receiving a light ray reflected at a first angle .theta.1 from the direction of regular reflection out of illumination light projected from the radial illumination unit and reflected by the measurement object, and a light ray reflected at a second angle .theta.2 from the direction of regular reflection out of illumination light projected from the unidirectional illumination unit and reflected by the measurement object, the second angle .theta.2 being larger than the first angle .theta.1, and a processing unit for calculating a color value at the first angle .theta.1 and a color value at the second angle .theta.2 based on an output of the unidirectional light receiving unit.
摘要翻译：一种颜色测量装置，具有径向照明单元，用于以多个方向以第一照明角将照明光投射到测量对象;单向照明单元，用于以单一的第二照明角将照明光投射到测量对象方向，单向光接收单元，用于接收从径向照明单元投射并被测量对象反射的照明光从正常反射方向以第一角度θ1反射的光线，以及在第二角度反射的光线从单向照明单元投影并被测量对象反射的照明光的正常反射方向的角度θ2，第二角度θ2大于第一角度θ1，以及处理单元，用于计算第一角度θ1和第二角度θ2处的颜色值在单向光接收单元的输出上。

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