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    • 8. 发明授权
    • Shadow write and transfer schemes for memory devices
    • 存储设备的影子写入和传输方案
    • US08122204B2
    • 2012-02-21
    • US12137443
    • 2008-06-11
    • Mitsuhiro NagaoKenji ShibataSatoru Kawmoto
    • Mitsuhiro NagaoKenji ShibataSatoru Kawmoto
    • G06F13/00G06F13/28G06F1/00G06F3/00G11C7/10G11C7/00
    • G06F13/1694G06F11/1666G11C7/1045G11C7/1072G11C11/406G11C11/40622G11C11/4096Y02D10/14
    • Systems and methods for controlling memory devices are disclosed. In one embodiment, a memory system comprises a memory controller for forwarding a command signal and an address signal and for receiving and forwarding a data signal, and a first memory device for receiving the command signal and the address signal from the memory controller, where the first memory device comprises a first command judging circuit for receiving and forwarding the data signal and for decoding the command signal. The memory system further comprises a second memory device for receiving the command signal and the address signal from the memory controller, where the second memory device comprises a second command judging circuit for receiving and generating the data signal and for decoding the command signal. The command signal, the address signal and the data signal are commonly connected to the first memory device and the second memory device.
    • 公开了用于控制存储器件的系统和方法。 在一个实施例中,存储器系统包括用于转发命令信号和地址信号并用于接收和转发数据信号的存储器控​​制器,以及用于从存储器控制器接收命令信号和地址信号的第一存储器件,其中 第一存储装置包括用于接收和转发数据信号并用于对命令信号进行解码的第一命令判断电路。 存储器系统还包括用于从存储器控制器接收命令信号和地址信号的第二存储器件,其中第二存储器件包括用于接收和产生数据信号并用于解码命令信号的第二命令判断电路。 命令信号,地址信号和数据信号共同连接到第一存储器件和第二存储器件。