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1. 发明授权

US5841532A Method for evaluating oxygen concentrating in semiconductor silicon single crystal 失效
标题翻译：半导体硅单晶氧浓缩评估方法
公开(公告)号：US5841532A
公开(公告)日：1998-11-24
申请号：US800393
申请日：1997-02-14
申请人： Tomosuke Yoshida , Yutaka Kitagawara
发明人： Tomosuke Yoshida , Yutaka Kitagawara
IPC分类号： G01N21/64 , H01L21/66
CPC分类号： G01N21/6489
摘要： A method and apparatus for evaluating an oxygen concentration in a semiconductor silicon single crystal highly doped with boron at a low cost with a high sensitivity and high reproducibility. The single crystal, which is doped with boron of a high concentration of 10.sup.17 atoms/cm.sup.3 or higher, is irradiated with a light having a greater energy than that of bandgap of the semiconductor silicon while holding the single crystal at a temperature of room temperature to 50 K and photoluminescence intensities in the vicinity of a photon energy of 0.96 eV of a photoluminescence spectrum emitted from the single crystal under the above irradiation are measured to evaluate an oxygen concentration in the single crystal.
摘要翻译：一种以高灵敏度和高再现性以低成本高度掺杂硼的半导体硅单晶中的氧浓度的评价方法和装置。将具有1017原子/ cm3以上的高浓度的硼掺杂的单晶用能量比半导体硅的带隙大的能量照射，同时将单晶保持在室温至测量在上述照射下从单晶发射的光致发光光谱在0.96eV的光子能量附近的光致发光强度，以评价单晶中的氧浓度。

2. 发明申请

US20120231612A1 METHOD FOR MANUFACTURING SILICON EPITAXIAL WAFER 有权
标题翻译：制造硅外延层的方法
公开(公告)号：US20120231612A1
公开(公告)日：2012-09-13
申请号：US13510336
申请日：2010-11-11
申请人： Tomosuke Yoshida
发明人： Tomosuke Yoshida
IPC分类号： H01L21/20
CPC分类号： C30B25/20 , C30B25/10 , C30B29/06 , H01L21/02381 , H01L21/02532 , H01L21/0262
摘要： A method for manufacturing a silicon epitaxial wafer, including vapor-phase growing a silicon single crystal thin film on a silicon single crystal substrate in a hydrogen atmosphere while supplying a source gas; and cooling a silicon epitaxial wafer having the formed silicon single crystal thin film by calculating a temperature at which a standard value or a process average value of concentration of an evaluation target impurity present in the silicon single crystal thin film coincides with solubility limit concentration of the evaluation target impurity and setting a cooling rate of the silicon epitaxial wafer after the film formation to be less than 20° C./sec in a temperature range of at least plus or minus 50° C. from the calculated temperature.
摘要翻译：一种制造硅外延晶片的方法，包括在氢气气氛中在硅单晶衬底上气相生长硅单晶薄膜，同时供应源气体; 并且通过计算存在于硅单晶薄膜中的评价对象杂质的浓度的标准值或处理平均值与所述硅单晶薄膜的溶解度极限浓度一致的温度，在成膜后将硅外延晶片的冷却速度从计算出的温度在至少±50℃的温度范围内设定为小于20℃/秒。

3. 发明申请

US20070269338A1 Silicon Epitaxial Wafer and Manufacturing Method Thereof 审中-公开
标题翻译：硅外延晶圆及其制造方法
公开(公告)号：US20070269338A1
公开(公告)日：2007-11-22
申请号：US11632720
申请日：2005-06-27
申请人： Fumitaka Kume , Tomosuke Yoshida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
发明人： Fumitaka Kume , Tomosuke Yoshida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
IPC分类号： C30B15/00 , C22C29/00 , C30B15/14
CPC分类号： H01L21/3225 , C30B25/20 , C30B29/06 , C30B33/02 , H01L21/02381 , H01L21/02532
摘要： A silicon epitaxial wafer 100 is formed by growing a silicon epitaxial layer 2 on a silicon single crystal substrate 1, produced by means of a CZ method, and doped with boron so that a resistivity thereof is less than 0.018 Ω·cm. The silicon single crystal substrate 1 has a density of bulk stacking faults 13 in the silicon single crystal substrate 1 in the range of 1×108 cm−3 or higher and 3×109 cm−3 or lower. Thereby, provided is a silicon epitaxial wafer having a boron doped p+ CZ substrate with a resistivity of 0.018Ω·cm or lower, and a state of formation of oxygen precipitates can be adjusted adequately so as to secure a sufficient IG effect and to suppress a problem of bow and deformation of a substrate, despite that sizes of oxygen precipitates is so small to be observed accurately.
摘要翻译：通过在Si单晶衬底1上生长硅外延层2，通过CZ法生长并掺杂硼，使其电阻率小于0.018Ω·cm，形成硅外延晶片100。硅单晶衬底1在硅单晶衬底1中的体积堆垛层错密度为1×10 -3 -3以上且3×10 6 > 9 -3 或更低。因此，提供具有电阻率为0.018Omega.cm以下的具有硼掺杂的P + CZ基板的硅外延晶片，并且可以适当地调节氧沉淀物的形成状态，以便确保足够的IG效应并且抑制基板的弯曲和变形的问题，尽管氧沉淀物的尺寸如此小以被准确地观察。

4. 发明申请

US20060281283A1 Silicon epitaxial wafer, and silicon epitaxial wafer manufacturing method 审中-公开
标题翻译：硅外延晶片和硅外延晶片制造方法
公开(公告)号：US20060281283A1
公开(公告)日：2006-12-14
申请号：US10556429
申请日：2004-04-02
申请人： Tomosuke Yoshida , Hitoshi Tsunoda , Masahiro Kato
发明人： Tomosuke Yoshida , Hitoshi Tsunoda , Masahiro Kato
IPC分类号： H01L29/04 , H01L21/20
CPC分类号： C30B29/06 , C30B23/02 , C30B25/02
摘要： A silicon epitaxial wafer (W) comprising: a silicon single crystal substrate (1) having a COP (100) on a main surface (11), and a silicon epitaxial layer (2) grown by vapor phase epitaxy on the main surface (11) of the silicon single crystal substrate (1), wherein the main surface (11) is inclined from a (100) plane in a [011] direction or a [0-1-1] direction by an angle θ with respect to a [100] axis as well as inclined from a (100) plane in a [01-1] direction or a [0-11] direction by an angle φ with respect to a [100] axis, and at least one of the angle θ and the angle φ is from 0° to 15′.
摘要翻译：一种硅外延晶片（W），包括：在主表面（11）上具有COP（100）的硅单晶衬底（1）和在主表面（11）上通过气相外延生长的硅外延层（2）），其中所述主表面（11）从[011]方向或[0-1-1]方向上的（100）面倾斜相对于所述硅单晶基板（1）的角度θ 以及从[01-1]方向或[0-11]方向的（100）面倾斜相对于[100]轴的角度φi，并且至少一个角度 θ和角度phi为0°至15'。

5. 发明授权

US6162708A Method for producing an epitaxial silicon single crystal wafer and the epitaxial silicon single crystal wafer 有权
标题翻译：外延硅单晶晶片和外延硅单晶晶片的制造方法
公开(公告)号：US6162708A
公开(公告)日：2000-12-19
申请号：US310045
申请日：1999-05-11
申请人： Masaro Tamatsuka , Ken Aihara , Tomosuke Yoshida
发明人： Masaro Tamatsuka , Ken Aihara , Tomosuke Yoshida
IPC分类号： C30B15/00 , H01L21/20
CPC分类号： C30B29/06 , C30B15/00 , Y10S438/916
摘要： There is disclosed a method for producing an epitaxial silicon single crystal wafer comprising the steps of growing a silicon single crystal ingot wherein nitrogen is doped by Czochralski method, slicing the silicon single crystal ingot to provide a silicon single crystal wafer, and forming an epitaxial layer in the surface layer portion of the silicon single crystal wafer. There can be manufactured easily and in high productivity an epitaxial silicon monocrystal wafer which has high gettering capability when a substrate having a low boron concentration is used, a low concentration of heavy metal impurity, and an excellent crystallinity.
摘要翻译：公开了一种用于制造外延硅单晶晶片的方法，包括以下步骤：生长其中通过切克劳斯基法掺杂氮的硅单晶锭，将硅单晶锭切片以提供硅单晶晶片，以及形成外延层在硅单晶晶片的表层部分。当使用低硼浓度的底物，低浓度的重金属杂质和优异的结晶度时，可以容易且高生产率地制造外延硅单晶晶片，其具有高吸杂能力。

6. 发明授权

US08697547B2 Method for manufacturing silicon epitaxial wafer 有权
标题翻译：硅外延片的制造方法
公开(公告)号：US08697547B2
公开(公告)日：2014-04-15
申请号：US13510336
申请日：2010-11-11
申请人： Tomosuke Yoshida
发明人： Tomosuke Yoshida
IPC分类号： H01L21/322 , H01L21/36 , H01L21/20
CPC分类号： C30B25/20 , C30B25/10 , C30B29/06 , H01L21/02381 , H01L21/02532 , H01L21/0262
摘要： A method for manufacturing a silicon epitaxial wafer, including vapor-phase growing a silicon single crystal thin film on a silicon single crystal substrate in a hydrogen atmosphere while supplying a source gas; and cooling a silicon epitaxial wafer having the formed silicon single crystal thin film by calculating a temperature at which a standard value or a process average value of concentration of an evaluation target impurity present in the silicon single crystal thin film coincides with solubility limit concentration of the evaluation target impurity and setting a cooling rate of the silicon epitaxial wafer after the film formation to be less than 20° C./sec in a temperature range of at least plus or minus 50° C. from the calculated temperature.
摘要翻译：一种制造硅外延晶片的方法，包括在氢气气氛中在硅单晶衬底上气相生长硅单晶薄膜，同时供应源气体; 并且通过计算存在于硅单晶薄膜中的评价对象杂质的浓度的标准值或处理平均值与所述硅单晶薄膜的溶解度极限浓度一致的温度，在成膜后将硅外延晶片的冷却速度从计算出的温度在至少±50℃的温度范围内设定为小于20℃/秒。

7. 发明授权

US07713851B2 Method of manufacturing silicon epitaxial wafer 有权
标题翻译：制造硅外延片的方法
公开(公告)号：US07713851B2
公开(公告)日：2010-05-11
申请号：US11660764
申请日：2005-08-03
申请人： Fumitaka Kume , Tomosuke Yoshida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
发明人： Fumitaka Kume , Tomosuke Yoshida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
IPC分类号： H01L21/20
CPC分类号： H01L21/02052 , H01L21/3225
摘要： A silicon epitaxial layer 2 is grown in vapor phase on a silicon single crystal substrate 1 manufactured by the Czochralski method, and doped with boron so as to adjust the resistivity to 0.02 Ω·cm or below, oxygen precipitation nuclei 11 are formed in the silicon single crystal substrate 1, by carrying out annealing at 450° C. to 750° C., in an oxidizing atmosphere, for a duration of time allowing formation of a silicon oxide film only to as thick as 2 nm or below on the silicon epitaxial layer 2 as a result of the annealing, and thus-formed silicon oxide film 3 is etched as the first cleaning after the low-temperature annealing, using a cleaning solution. By this process, the final residual thickness of the silicon oxide film can be suppressed only to a level equivalent to native oxide film, without relying upon the hydrofluoric acid cleaning.
摘要翻译：在由Czochralski法制造的硅单晶衬底1上以气相生长硅外延层2，并用硼掺杂以将电阻率调节至0.02＆OHgr·cm或更低，氧沉淀核11形成在硅单晶衬底1，通过在氧化气氛中在450℃至750℃进行退火，持续时间允许在硅上形成仅2nm或更小的氧化硅膜作为退火的结果的外延层2，使用清洗液，将低温退火后的第一次清洗作为第一清洗来蚀刻所形成的氧化硅膜3。通过该方法，氧化硅膜的最终剩余厚度可以仅被抑制到与天然氧化膜相当的水平，而不依赖于氢氟酸清洗。

8. 发明申请

US20090038540A1 Method for Manufacturing Epitaxial Wafer and Epitaxial Wafer Manufactured by this Method 审中-公开
标题翻译：通过该方法制造外延晶片和外延晶片的方法
公开(公告)号：US20090038540A1
公开(公告)日：2009-02-12
申请号：US11991736
申请日：2006-08-21
申请人： Tomosuke Yoshida , Naohisa Toda
发明人： Tomosuke Yoshida , Naohisa Toda
IPC分类号： C30B23/00
CPC分类号： C23C16/4401 , C23C16/24 , C30B25/16
摘要： In a vapor phase growth apparatus, epitaxial growth is performed with respect to a wafer having a CVD film formed on a back surface thereof as a wafer for monitoring that is used to guarantee a resistance and/or measure a thickness of an epitaxial layer, then epitaxial growth is performed with respect to a wafer as a dummy or a vapor phase growth apparatus is activated under conditions for performing epitaxial growth without using a wafer, and subsequently epitaxial growth is carried out with respect to a wafer as a product, thereby manufacturing an epitaxial wafer. As a result, when using a wafer having no CVD film to manufacture an epitaxial wafer that is used to fabricate an imaging device, e.g., a CCD or a CMOS image sensor, a method capable of effectively avoiding heavy-metal contamination and manufacturing a high-quality epitaxial layer is provided.
摘要翻译：在气相生长装置中，相对于在其背面形成有CVD膜的晶片作为用于保证电阻和/或测量外延层的厚度的用于监测的晶片，进行外延生长，然后在不使用晶片的情况下进行外延生长的条件下，作为虚拟或气相生长装置的晶片进行外延生长，随后以相对于作为产品的晶片进行外延生长，由此制造外延片结果，当使用没有CVD膜的晶片来制造用于制造诸如CCD或CMOS图像传感器的成像装置的外延晶片时，能够有效地避免重金属污染并制造高的方法提供了质量外延层。

9. 发明申请

US20070243699A1 Method of manufacturing silicon epitaxial wafer 有权
标题翻译：制造硅外延片的方法
公开(公告)号：US20070243699A1
公开(公告)日：2007-10-18
申请号：US11660764
申请日：2005-08-03
申请人： Fumitaka Kume , Tomosuke Yoshida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
发明人： Fumitaka Kume , Tomosuke Yoshida , Ken Aihara , Ryoji Hoshi , Satoshi Tobe , Naohisa Toda , Fumio Tahara
IPC分类号： H01L21/20
CPC分类号： H01L21/02052 , H01L21/3225
摘要： A silicon epitaxial layer 2 is grown in vapor phase on a silicon single crystal substrate 1 manufactured by the Czochralski method, and doped with boron so as to adjust the resistivity to 0.02 Ω·cm or below, oxygen precipitation nuclei 11 are formed in the silicon single crystal substrate 1, by carrying out annealing at 450° C. to 750° C., in an oxidizing atmosphere, for a duration of time allowing formation of a silicon oxide film only to as thick as 2 nm or below on the silicon epitaxial layer 2 as a result of the annealing, and thus-formed silicon oxide film 3 is etched as the first cleaning after the low-temperature annealing, using a cleaning solution. By this process, the final residual thickness of the silicon oxide film can be suppressed only to a level equivalent to native oxide film, without relying upon the hydrofluoric acid cleaning.
摘要翻译：在由Czochralski法制造的硅单晶衬底1上以气相生长硅外延层2，并掺杂硼以将电阻率调节至0.02Ω·cm以下，在硅中形成氧沉淀核11 单晶衬底1，通过在氧化气氛中在450℃至750℃下进行退火，持续时间允许在硅外延上形成仅2nm或更小的氧化硅膜层2作为退火的结果，并且使用清洁溶液，在低温退火之后，将由此形成的氧化硅膜3作为第一清洗进行蚀刻。通过该方法，氧化硅膜的最终剩余厚度可以仅被抑制到与天然氧化膜相当的水平，而不依赖于氢氟酸清洗。

10. 发明授权

US07270708B2 Susceptor, vapor phase growth apparatus, epitaxial wafer manufacturing apparatus, epitaxial wafer manufacturing method, and epitaxial wafer 有权
标题翻译：副产物，气相生长装置，外延晶片制造装置，外延晶片制造方法和外延晶片
公开(公告)号：US07270708B2
公开(公告)日：2007-09-18
申请号：US10493144
申请日：2002-11-27
申请人： Tomosuke Yoshida , Takeshi Arai , Kenji Akiyama , Hiroki Ose
发明人： Tomosuke Yoshida , Takeshi Arai , Kenji Akiyama , Hiroki Ose
IPC分类号： C30B25/12
CPC分类号： C30B25/12 , C23C16/4405 , C23C16/4583
摘要： A susceptor (10) supporting a semiconductor substrate (W) in a vapor phase growth, wherein a pocket (11) is formed on an upper surface of the susceptor to arrange the semiconductor substrate (W) inside thereof. The pocket (11) has a two-stage structure having an upper stage pocket (11a) for supporting an outer peripheral edge portion of the semiconductor substrate (W) and a lower stage pocket (11b) formed on a lower stage of a center side from the upper stage pocket (11a). A hole (12) penetrated to a rear surface of the susceptor and opened in the vapor phase growth is formed in the lower stage pocket (11b).
摘要翻译：一种在气相生长中支撑半导体衬底（W）的感受体（10），其中，在所述基座的上表面上形成有凹穴（11），以将半导体衬底（W）布置在其内部。袋（11）具有两级结构，其具有用于支撑半导体衬底（W）的外周边缘部分的上级槽口（11a）和形成在半导体衬底（W）的下级上的下级槽口中心侧的上侧袋（11a）。贯穿底座后表面的孔（12）形成在下层袋（11b）中。

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