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1. 发明授权

US06972779B2 Flat-panel display device 失效
标题翻译：平板显示设备
公开(公告)号：US06972779B2
公开(公告)日：2005-12-06
申请号：US10259499
申请日：2002-09-30
申请人： Tomonobu Motai , Yoshiro Aoki , Kazuo Nakamura
发明人： Tomonobu Motai , Yoshiro Aoki , Kazuo Nakamura
IPC分类号： G02F1/1343 , G02F1/133 , G09G3/20 , G09G3/36 , H04N5/66 , G09G5/10
CPC分类号： G09G3/3659 , G09G3/2018 , G09G3/2074 , G09G3/3688 , G09G2300/0809
摘要： A liquid crystal display device comprises a plurality of display pixels PX each including sub-pixels weighted in a preset area ratio and a driving circuit which drives the display pixels. Particularly, the driving circuit is configured to determine the gradation of each display pixel PX by selectively combining the sub-pixels with driving periods weighted in a preset time ratio.
摘要翻译：液晶显示装置包括多个显示像素PX，每个显示像素包括以预设面积比率加权的子像素和驱动显示像素的驱动电路。特别地，驱动电路被配置为通过以预设时间比率选择性地组合子像素与驱动周期加权来确定每个显示像素PX的灰度。

2. 发明授权

US06414668B1 Liquid crystal display device 有权
标题翻译：液晶显示装置
公开(公告)号：US06414668B1
公开(公告)日：2002-07-02
申请号：US09234511
申请日：1999-01-21
申请人： Masao Karube , Kazuo Nakamura , Masaki Miyatake , Hoko Hirai , Akihiko Saitoh , Yoshiro Aoki
发明人： Masao Karube , Kazuo Nakamura , Masaki Miyatake , Hoko Hirai , Akihiko Saitoh , Yoshiro Aoki
IPC分类号： G09G336
CPC分类号： G09G3/3688 , G09G3/2011 , G09G3/3614 , G09G2320/02
摘要： Arrangement of connection points of sampling switches to video bus lines within a signal line drive circuit 200 is improved such that connection points of video buses (SVn1 to SVn6) supplied with positive-polarity video signals relative to a predetermined reference potential and video buses (SVp1 to SVp6) supplied with negative-polarity video signals to analog switches (SWn11 to SWn22 and SWp11 to SWp22) make substantially symmetric patterns in the extending direction of the video buses. Since the sum of lengths of connection wirings belonging to a switch pair and their total resistance value becomes substantially equal in all switch pairs, the effective vales of shift amounts in signal line potentials are substantially flattened. Therefore, here is provided a drive circuit built-in liquid crystal display device realizing a good imaging quality removing noise such as stripe-shaped imaging defects which may occur when video signals are supplied to analog switches through a plurality of video buses.
摘要翻译：改进采样开关到信号线驱动电路200内的视频总线的连接点的布置，使得提供有相对于预定参考电位的正极性视频信号的视频总线（SVn1至SVn6）的连接点和视频总线（SVp1 提供给模拟开关（SWn11〜SWn22，SWp11〜SWp22）的负极性视频信号的SVp6在视频总线的延伸方向上形成大致对称的图形。由于属于开关对的连接布线的长度总和及其总电阻值在所有开关对中变得基本相等，所以信号线电位中的移位量的有效值基本上变平。因此，这里提供了一种内置液晶显示装置的驱动电路，其实现了通过多个视频总线向视频信号提供视频信号时可能出现的诸如条纹成像缺陷之类的成像质量消除噪声。

3. 发明授权

US06639575B1 Liquid crystal display 有权
标题翻译：液晶显示器
公开(公告)号：US06639575B1
公开(公告)日：2003-10-28
申请号：US09531162
申请日：2000-03-17
申请人： Takanori Tsunashima , Yoshiro Aoki , Kazuo Nakamura , Hajime Sato
发明人： Takanori Tsunashima , Yoshiro Aoki , Kazuo Nakamura , Hajime Sato
IPC分类号： G09G336
CPC分类号： G09G3/3648 , G09G3/3677 , G09G3/3688 , G09G2300/0408 , G09G2330/02
摘要： There is provided a driving circuit including active matrix type liquid crystal display capable of decreasing the electric power consumption of CMOS buffers contained in a scanning line driving circuit and picture signal line driving circuit. The liquid crystal display has an active matrix type liquid crystal display elements comprising switching elements connected to a plurality of scanning lines and a plurality of picture signal lines perpendicular to the scanning lines. The liquid crystal display includes a digital circuit wherein at least one of a scanning line driving circuit for applying a scanning pulse to the switching elements via the scanning lines and a picture signal line driving circuit for applying a picture signal to the picture signal lines comprises one stage of CMOS buffer or a plurality of CMOS buffers connected in multi stages, the CMOS transistor or each of the CMOS transistors including an N-type thin-film transistor and P-type thin-film transistor which are formed on the same substrate. In the liquid crystal display, one transistor, which has a longer off-state time during operation of the circuit, of the N-type thin-film transistor and P-type thin-film transistor constituting the CMOS buffer, has a longer gate length than that of the other transistor.
摘要翻译：提供了一种包括有源矩阵型液晶显示器的驱动电路，其能够降低包含在扫描线驱动电路和图像信号线驱动电路中的CMOS缓冲器的功耗。液晶显示器具有有源矩阵型液晶显示元件，其包括连接到多条扫描线的开关元件和垂直于扫描线的多条图像信号线。液晶显示器包括数字电路，其中用于经由扫描线向扫描脉冲施加扫描脉冲的扫描线驱动电路和用于向图像信号线施加图像信号的图像信号线驱动电路中的至少一个包括一个 CMOS缓冲器或者多级连接的CMOS缓冲器级，CMOS晶体管或者每个CMOS晶体管包括形成在同一衬底上的N型薄膜晶体管和P型薄膜晶体管。在液晶显示器中，在构成CMOS缓冲器的N型薄膜晶体管和P型薄膜晶体管中，在电路工作期间具有较长截止时间的一个晶体管具有较长的栅极长度比另一个晶体管。

4. 发明授权

US07550371B2 Method of producing SIMOX wafer 失效
标题翻译：生产SIMOX晶圆的方法
公开(公告)号：US07550371B2
公开(公告)日：2009-06-23
申请号：US11729292
申请日：2007-03-27
申请人： Yoshio Murakami , Riyuusuke Kasamatsu , Yoshiro Aoki
发明人： Yoshio Murakami , Riyuusuke Kasamatsu , Yoshiro Aoki
IPC分类号： H01L21/425
CPC分类号： H01L21/76243
摘要： A SIMOX wafer is produced by implanting an oxygen ions into a surface of a Si substrate and then conducting a high-temperature annealing, in which an atmosphere in at least an end stage of the high-temperature annealing treatment is an Ar or N2 atmosphere containing an oxygen of more than 3 volume % but not more than 10 volume %.
摘要翻译：通过将氧离子注入到Si衬底的表面中然后进行高温退火来制造SIMOX晶片，其中至少在高温退火处理的最后阶段的气氛是含有Ar 大于3体积％但不大于10体积％的氧气。

5. 发明授权

US07286109B2 Active matrix type display apparatus 有权
标题翻译：有源矩阵型显示装置
公开(公告)号：US07286109B2
公开(公告)日：2007-10-23
申请号：US10846550
申请日：2004-05-17
申请人： Yoshiro Aoki
发明人： Yoshiro Aoki
IPC分类号： G09G3/36
CPC分类号： G09G3/3233 , G09G3/325 , G09G3/3266 , G09G2300/0417 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2310/0251 , G09G2310/0262 , G09G2320/0223 , G09G2320/043
摘要： Buffer circuits are provided between outputs of a scanning line driver circuit and scanning lines. The buffer circuits each are configured to make rise or fall time of scanning signals at output sides of the buffer circuits substantially the same as or longer than those of the scanning signals at end terminals of the scanning lines when the scanning signals supplied to the scanning lines are rectangular in waveform.
摘要翻译：在扫描线驱动电路的输出和扫描线之间提供缓冲电路。各个缓冲电路被配置为当提供给扫描线的扫描信号时，缓冲电路的输出侧的扫描信号的上升或下降时间基本上等于或长于扫描线的端部的扫描信号的扫描信号的上升或下降时间是波形的矩形。

6. 发明申请

US20070224774A1 Method of producing SIMOX wafer 失效
标题翻译：生产SIMOX晶圆的方法
公开(公告)号：US20070224774A1
公开(公告)日：2007-09-27
申请号：US11729292
申请日：2007-03-27
申请人： Yoshio Murakami , Riyuusuke Kasamatsu , Yoshiro Aoki
发明人： Yoshio Murakami , Riyuusuke Kasamatsu , Yoshiro Aoki
IPC分类号： H01L21/76
CPC分类号： H01L21/76243
摘要： A SIMOX wafer is produced by implanting an oxygen ions into a surface of a Si substrate and then conducting a high-temperature annealing, in which an atmosphere in at least an end stage of the high-temperature annealing treatment is an Ar or N2 atmosphere containing an oxygen of more than 3 volume % but not more than 10 volume %.
摘要翻译：通过将氧离子注入到Si衬底的表面中然后进行高温退火来制造SIMOX晶片，其中至少在高温退火处理的最后阶段中的气氛为Ar或N _{2 气氛。}

7. 发明授权

US07253069B2 Method for manufacturing silicon-on-insulator wafer 有权
标题翻译：绝缘体上硅晶片的制造方法
公开(公告)号：US07253069B2
公开(公告)日：2007-08-07
申请号：US11101870
申请日：2005-04-08
申请人： Yoshio Murakami , Toru Yamazaki , Yoshiro Aoki , Akihiko Endo
发明人： Yoshio Murakami , Toru Yamazaki , Yoshiro Aoki , Akihiko Endo
IPC分类号： H01L21/331 , H01L21/8222
CPC分类号： H01L21/76254 , H01L21/76243
摘要： A method for manufacturing a SOI wafer includes a step of heat-treating a wafer in a furnace to form an SOI wafer including a silicon support, an insulating layer containing oxide, and a superficial silicon layer arranged in that order and a step of unloading the SOI wafer from the furnace maintained at a temperature of 250° C. to 800° C. to transfer the SOI wafer to an atmosphere containing hydrogen or water. The steps are performed in that order.
摘要翻译：一种SOI晶片的制造方法，其特征在于，在炉内对晶片进行热处理，形成包括硅载体，含有氧化物的绝缘层和表面硅层的SOI晶片的步骤，来自炉的SOI晶片保持在250℃至800℃的温度下，以将SOI晶片转移到含有氢或水的气氛中。按照该顺序执行步骤。

8. 发明申请

US20060221251A1 DISPLAY, ARRAY SUBSTRATE, AND METHOD OF MANUFACTURING DISPLAY 审中-公开
标题翻译：显示器，阵列基板和制造显示器的方法
公开(公告)号：US20060221251A1
公开(公告)日：2006-10-05
申请号：US11277580
申请日：2006-03-27
申请人： Kazuyoshi Omata , Makoto Shibusawa , Yoshiro Aoki , Hiroshi Nakayama
发明人： Kazuyoshi Omata , Makoto Shibusawa , Yoshiro Aoki , Hiroshi Nakayama
IPC分类号： H04N9/77
CPC分类号： G09G3/325 , G09G3/006 , G09G2300/0426 , G09G2300/0819 , G09G2330/04 , G09G2330/06
摘要： A display includes an insulating substrate, a video signal line placed on a main surface of the insulating substrate and including first and second ends, pixels connected to the video signal line, a video signal line driver to which the first end is connected, an inspection signal line placed near the second end and including third and fourth ends, the third end being located at an edge of the main surface, and an analog switch connected between the second and fourth ends.
摘要翻译：显示器包括绝缘基板，放置在绝缘基板的主表面上的视频信号线，并且包括第一和第二端，连接到视频信号线的像素，连接第一端的视频信号线驱动器，检查信号线放置在第二端附近并且包括第三和第四端，第三端位于主表面的边缘，以及模拟开关，连接在第二端和第四端之间。

9. 发明申请

US20050007307A1 Active matrix type display apparatus 有权
标题翻译：有源矩阵型显示装置
公开(公告)号：US20050007307A1
公开(公告)日：2005-01-13
申请号：US10846550
申请日：2004-05-17
申请人： Yoshiro Aoki
发明人： Yoshiro Aoki
IPC分类号： G09G3/30 , G09G3/32 , G09G3/20
CPC分类号： G09G3/3233 , G09G3/325 , G09G3/3266 , G09G2300/0417 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2310/0251 , G09G2310/0262 , G09G2320/0223 , G09G2320/043
摘要： Buffer circuits are provided between outputs of a scanning line driver circuit and scanning lines. The buffer circuits each are configured to make rise or fall time of scanning signals at output sides of the buffer circuits substantially the same as or longer than those of the scanning signals at end terminals of the scanning lines when the scanning signals supplied to the scanning lines are rectangular in waveform.
摘要翻译：在扫描线驱动电路的输出和扫描线之间提供缓冲电路。各个缓冲电路被配置为当提供给扫描线的扫描信号时，缓冲电路的输出侧的扫描信号的上升或下降时间基本上等于或长于扫描线的端部的扫描信号的扫描信号的上升或下降时间是波形的矩形。

10. 发明授权

US06788281B2 Circuit panel and flat-panel display device 有权
标题翻译：电路板和平板显示设备
公开(公告)号：US06788281B2
公开(公告)日：2004-09-07
申请号：US09866912
申请日：2001-05-30
申请人： Kotaro Ando , Yoshiro Aoki
发明人： Kotaro Ando , Yoshiro Aoki
IPC分类号： G09G336
CPC分类号： G09G3/3677
摘要： A circuit panel includes an array substrate in which a scanning line is formed as a capacitive load and first and second scanning line drivers connected to the scanning line in order to commonly drive the scanning line. Each of the first and second scanning line drivers includes first and second switching circuits connected in series between first and second power terminals to selectively output one of the potentials of the first and second power source terminals as a control signal, and an output buffer for setting the potential of the scanning line in accordance with the control signal. The driving abilities of the first and second switching circuits are uneven.
摘要翻译：电路面板包括阵列基板，其中扫描线形成为电容性负载，第一和第二扫描线驱动器连接到扫描线以共同驱动扫描线。第一和第二扫描线驱动器中的每一个包括串联连接在第一和第二电源端子之间的第一和第二开关电路，以选择性地输出第一和第二电源端子的电位之一作为控制信号，以及用于设置的输出缓冲器根据控制信号的扫描线的电位。第一和第二开关电路的驱动能力不均匀。

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