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1. 发明申请

US20060188235A1 Recording apparatus 有权
标题翻译：记录装置
公开(公告)号：US20060188235A1
公开(公告)日：2006-08-24
申请号：US11344342
申请日：2006-02-01
申请人： Tomomi Umei , Yoshiteru Mino , Yasunori Yamamoto
发明人： Tomomi Umei , Yoshiteru Mino , Yasunori Yamamoto
IPC分类号： H04N7/26
CPC分类号： H04N19/40 , H04N19/12 , H04N19/139 , H04N19/15 , H04N19/154 , H04N19/156 , H04N19/159 , H04N19/162 , H04N19/46
摘要： The recording apparatus of the present invention: stores therein one or more recorded data pieces, each of which is created by encoding a video data piece, and one or more encoding information sets, each of which is information extracted when a different one of the video data pieces is encoded and represents characteristics of the video data piece; selects a recorded data piece based on the stored encoding information sets; creates a re-encoded data piece by re-encoding the selected recorded data piece using a predetermined encoding method; extracts a corresponding re-encoding information set in a course of creating the re-encoded data piece; and stores (a) the re-encoded data piece which replaces the selected recorded data piece and (b) the re-encoding information set which replaces an encoding information set corresponding to the selected recorded data piece.
摘要翻译：本发明的记录装置在其中存储一个或多个记录的数据，每个记录的数据是通过对视频数据段进行编码而创建的，以及一个或多个编码信息集合，每个编码信息集合是当视频的不同的一个时提取的信息数据片段被编码并表示视频数据片段的特征; 基于存储的编码信息集选择记录的数据片; 通过使用预定的编码方法对所选择的记录数据重新编码来创建重新编码的数据片段; 在创建重新编码的数据段的过程中提取对应的重新编码信息集; 并存储（a）替换所选择的记录数据的重新编码数据段，和（b）替换对应于所选记录数据段的编码信息集的重新编码信息集。

2. 发明授权

US07869688B2 Recording apparatus 有权
标题翻译：记录装置
公开(公告)号：US07869688B2
公开(公告)日：2011-01-11
申请号：US11344342
申请日：2006-02-01
申请人： Tomomi Umei , Yoshiteru Mino , Yasunori Yamamoto
发明人： Tomomi Umei , Yoshiteru Mino , Yasunori Yamamoto
IPC分类号： H04N5/91
CPC分类号： H04N19/40 , H04N19/12 , H04N19/139 , H04N19/15 , H04N19/154 , H04N19/156 , H04N19/159 , H04N19/162 , H04N19/46
摘要： The recording apparatus of the present invention: stores therein one or more recorded data pieces, each of which is created by encoding a video data piece, and one or more encoding information sets, each of which is information extracted when a different one of the video data pieces is encoded and represents characteristics of the video data piece; selects a recorded data piece based on the stored encoding information sets; creates a re-encoded data piece by re-encoding the selected recorded data piece using a predetermined encoding method; extracts a corresponding re-encoding information set in a course of creating the re-encoded data piece; and stores (a) the re-encoded data piece which replaces the selected recorded data piece and (b) the re-encoding information set which replaces an encoding information set corresponding to the selected recorded data piece.
摘要翻译：本发明的记录装置在其中存储一个或多个记录的数据，每个记录的数据是通过对视频数据段进行编码而创建的，以及一个或多个编码信息集合，每个编码信息集合是当视频的不同的一个时提取的信息数据片段被编码并表示视频数据片段的特征; 基于存储的编码信息集选择记录的数据片; 通过使用预定的编码方法对所选择的记录数据重新编码来创建重新编码的数据片段; 在创建重新编码的数据段的过程中提取对应的重新编码信息集; 并存储（a）替换所选择的记录数据的重新编码数据段，和（b）替换对应于所选记录数据段的编码信息集的重新编码信息集。

3. 发明授权

US07925928B2 Information processing apparatus for performing a system boot by using programs stored in a non-volatile storage device 有权
标题翻译：信息处理装置，用于通过使用存储在非易失性存储装置中的程序执行系统引导
公开(公告)号：US07925928B2
公开(公告)日：2011-04-12
申请号：US11984008
申请日：2007-11-13
申请人： Yasunori Yamamoto , Keizo Sumida , Yoshiteru Mino
发明人： Yasunori Yamamoto , Keizo Sumida , Yoshiteru Mino
IPC分类号： G06F11/00
CPC分类号： G06F11/1417 , G06F11/1004
摘要： After power activation, a transferer 14 detects a bootstrap program 111 having a first error check code 114 assigned thereto and being stored in a first storage device 11, subjects the bootstrap program 111 to an error detection/correction process, and transfers the bootstrap program 111 to the second storage device 12. If the transfer is properly completed, by executing the bootstrap program 111 on the second storage device 12, the CPU 10 performs an error detection/correction process for a main program 112 having a second error check code 115 assigned thereto, and transfers the main program 112 to a third storage device 13, after which the CPU's control branches out to the main program 112 on the third storage device 13. As a result, system boot can be performed without employing a NOR type flash memory.
摘要翻译：在电源激活之后，传送器14检测具有分配给其的第一错误检查码114并被存储在第一存储装置11中的自举程序111，使自举程序111进行错误检测/校正处理，并且传送引导程序111 如果传送正确完成，则通过在第二存储装置12上执行自举程序111，CPU 10对分配了第二错误检查代码115的主程序112执行错误检测/校正处理并且将主程序112传送到第三存储装置13，之后CPU的控制分支到第三存储装置13上的主程序112.结果，可以执行系统引导而不使用NOR型闪存。

4. 发明申请

US20050144430A1 Information processing apparatus and a ROM image generation apparatus for the apparatus 有权
标题翻译：信息处理装置和该装置的ROM图像生成装置
公开(公告)号：US20050144430A1
公开(公告)日：2005-06-30
申请号：US11019054
申请日：2004-12-22
申请人： Yasunori Yamamoto , Keizo Sumida , Yoshiteru Mino
发明人： Yasunori Yamamoto , Keizo Sumida , Yoshiteru Mino
IPC分类号： G06F11/10 , G06F9/06 , G06F9/24 , G06F9/445 , G06F12/16
CPC分类号： G06F11/1417 , G06F11/1004
摘要： After power activation, a transferer 14 detects a bootstrap program 111 having a first error check code 114 assigned thereto and being stored in a first storage device 11, subjects the bootstrap program 111 to an error detection/correction process, and transfers the bootstrap program 111 to the second storage device 12. If the transfer is properly completed, by executing the bootstrap program 111 on the second storage device 12, the CPU 10 performs an error detection/correction process for a main program 112 having a second error check code 115 assigned thereto, and transfers the main program 112 to a third storage device 13, after which the CPU's control branches out to the main program 112 on the third storage device 13. As a result, system boot can be performed without employing a NOR type flash memory.
摘要翻译：在电源激活之后，传送器14检测具有分配给其的第一错误检查码114并被存储在第一存储装置11中的自举程序111，使自举程序111进行错误检测/校正处理，并且传送引导程序111 到第二存储装置12。如果传送正确完成，则通过在第二存储装置12上执行引导程序111，CPU10对分配有第二错误检查代码115的主程序112执行错误检测/校正处理，并且传送主程序 112到第三存储装置13，之后CPU的控制分支到第三存储装置13上的主程序112。因此，可以在不使用NOR型闪存的情况下执行系统引导。

5. 发明申请

US20060224841A1 Information processing device and information processing method 有权
公开(公告)号：US20060224841A1
公开(公告)日：2006-10-05
申请号：US11388972
申请日：2006-03-27
申请人： Junichi Terai , Yasunori Yamamoto , Keizo Sumida , Yoshiteru Mino , Yoshinori Tokimoto
发明人： Junichi Terai , Yasunori Yamamoto , Keizo Sumida , Yoshiteru Mino , Yoshinori Tokimoto
IPC分类号： G06F13/00
CPC分类号： G06F9/4403
摘要： An information processing device is provided in which a valid initial program is transferred to a RAM while avoiding a invalid block which is present in a low reliable storage device, such as a NAND-type flash memory or the like. A management information storing section 29 stores management information 30 indicating a position of a invalid block in a first storage device 31. When an information processing device 1 is powered on, a transfer determination section 20 is controlled to read a BSP 26 from a valid block of a first storage device 11 based on the management information 30, and transfer the BSP 26 to a second storage device 32. Thereby, it is possible to avoid reading of a invalid block present in the first storage device 31.

6. 发明授权

US07543137B2 Information processing device and information processing method 有权
标题翻译：信息处理装置及信息处理方法
公开(公告)号：US07543137B2
公开(公告)日：2009-06-02
申请号：US11388972
申请日：2006-03-27
申请人： Junichi Terai , Yasunori Yamamoto , Keizo Sumida , Yoshiteru Mino , Yoshinori Tokimoto
发明人： Junichi Terai , Yasunori Yamamoto , Keizo Sumida , Yoshiteru Mino , Yoshinori Tokimoto
IPC分类号： G06F9/00 , G06F9/24 , G06F13/00
CPC分类号： G06F9/4403
摘要： An information processing device is provided in which a valid initial program is transferred to a RAM while avoiding a invalid block which is present in a low reliable storage device, such as a NAND-type flash memory or the like. A management information storing section 29 stores management information 30 indicating a position of a invalid block in a first storage device 31. When an information processing device 1 is powered on, a transfer determination section 20 is controlled to read a BSP 26 from a valid block of a first storage device 11 based on the management information 30, and transfer the BSP 26 to a second storage device 32. Thereby, it is possible to avoid reading of a invalid block present in the first storage device 31.
摘要翻译：提供一种信息处理装置，其中有效的初始程序被传送到RAM，同时避免存在于诸如NAND型闪存等的低可靠性存储装置中的无效块。管理信息存储部分29将指示无效块的位置的管理信息30存储在第一存储装置31中。当信息处理装置1通电时，传送确定部分20被控制以从有效块读取BSP 26 基于管理信息30的第一存储装置11，并将BSP 26传送到第二存储装置32.由此，可以避免读取第一存储装置31中存在的无效块。

7. 发明申请

US20080082860A1 Information processing apparatus for performing a system boot by using programs stored in a non-volatile storage device 有权
标题翻译：信息处理装置，用于通过使用存储在非易失性存储装置中的程序执行系统引导
公开(公告)号：US20080082860A1
公开(公告)日：2008-04-03
申请号：US11984008
申请日：2007-11-13
申请人： Yasunori Yamamoto , Keizo Sumida , Yoshiteru Mino
发明人： Yasunori Yamamoto , Keizo Sumida , Yoshiteru Mino
IPC分类号： G06F11/16
CPC分类号： G06F11/1417 , G06F11/1004
摘要： After power activation, a transferer 14 detects a bootstrap program 111 having a first error check code 114 assigned thereto and being stored in a first storage device 11, subjects the bootstrap program 111 to an error detection/correction process, and transfers the bootstrap program 111 to the second storage device 12. If the transfer is properly completed, by executing the bootstrap program 111 on the second storage device 12, the CPU 10 performs an error detection/correction process for a main program 112 having a second error check code 115 assigned thereto, and transfers the main program 112 to a third storage device 13, after which the CPU's control branches out to the main program 112 on the third storage device 13. As a result, system boot can be performed without employing a NOR type flash memory.
摘要翻译：在电源激活之后，传送器14检测具有分配给其的第一错误检查码114并被存储在第一存储装置11中的自举程序111，使自举程序111进行错误检测/校正处理，并且传送引导程序111 到第二存储装置12。如果传送正确完成，则通过在第二存储装置12上执行引导程序111，CPU10对分配有第二错误检查代码115的主程序112执行错误检测/校正处理，并且传送主程序 112到第三存储装置13，之后CPU的控制分支到第三存储装置13上的主程序112。因此，可以在不使用NOR型闪存的情况下执行系统引导。

8. 发明授权

US07308567B2 Information processing apparatus for performing a system boot by using programs stored in a non-voltile storage device 有权
标题翻译：信息处理装置，用于通过使用存储在非电压存储装置中的程序执行系统引导
公开(公告)号：US07308567B2
公开(公告)日：2007-12-11
申请号：US11019054
申请日：2004-12-22
申请人： Yasunori Yamamoto , Keizo Sumida , Yoshiteru Mino
发明人： Yasunori Yamamoto , Keizo Sumida , Yoshiteru Mino
IPC分类号： G06F9/445 , G06F15/177 , G06F9/24
CPC分类号： G06F11/1417 , G06F11/1004
摘要： After power activation, a transferer 14 detects a bootstrap program 111 having a first error check code 114 assigned thereto and being stored in a first storage device 11, subjects the bootstrap program 111 to an error detection/correction process, and transfers the bootstrap program 111 to the second storage device 12. If the transfer is properly completed, by executing the bootstrap program 111 on the second storage device 12, the CPU 10 performs an error detection/correction process for a main program 112 having a second error check code 115 assigned thereto, and transfers the main program 112 to a third storage device 13, after which the CPU's control branches out to the main program 112 on the third storage device 13. As a result, system boot can be performed without employing a NOR type flash memory.
摘要翻译：在电源激活之后，传送器14检测具有分配给其的第一错误检查码114并被存储在第一存储装置11中的自举程序111，使自举程序111进行错误检测/校正处理，并且传送引导程序111 到第二存储装置12。如果传送正确完成，则通过在第二存储装置12上执行引导程序111，CPU10对分配有第二错误检查代码115的主程序112执行错误检测/校正处理，并且传送主程序 112到第三存储装置13，之后CPU的控制分支到第三存储装置13上的主程序112。因此，可以在不使用NOR型闪存的情况下执行系统引导。

9. 发明申请

US20050135402A1 Data transfer apparatus 审中-公开
标题翻译：数据传输装置
公开(公告)号：US20050135402A1
公开(公告)日：2005-06-23
申请号：US10998136
申请日：2004-11-29
申请人： Kenichi Kawaguchi , Yoshiteru Mino
发明人： Kenichi Kawaguchi , Yoshiteru Mino
IPC分类号： G06T1/60 , G06F13/38 , H04J3/26 , H04N5/00 , H04N21/458
CPC分类号： H04N21/4583
摘要： A buffer is provided between an image processor and image I/O unit and a shared memory to be accessed by those units in common, and the buffer is controlled so as to be used only for a specific access, and data transmission to the shared memory is also controlled. With respect to a single transmission request from the image processor and a burst transmission request from the image I/O unit, a selector is controlled such that the single transmission data is retained in the buffer and that the burst transmission to the shared memory is executed.
摘要翻译：在图像处理器和图像I / O单元之间提供缓冲器和由这些单元共享的共享存储器，并且缓冲器被控制以仅被用于特定访问，并且数据传输到共享存储器也受到控制。对于来自图像处理器的单个传输请求和来自图像I / O单元的突发传输请求，控制选择器使得单个传输数据保留在缓冲器中，并且执行到共享存储器的突发传输。

10. 发明授权

US06789140B2 Data processor and data transfer method 失效
标题翻译：数据处理器和数据传输方式
公开(公告)号：US06789140B2
公开(公告)日：2004-09-07
申请号：US10214304
申请日：2002-08-08
申请人： Atsushi Kotani , Yoshiteru Mino
发明人： Atsushi Kotani , Yoshiteru Mino
IPC分类号： G06F1300
CPC分类号： G06F9/3877
摘要： The data processor for processing operation data stored in a memory connected to an external bus in the order of operations includes: an interface section for holding a parameter required for transfer of the operation data; an operation section receiving the operation data from the interface section for performing predetermined processing; and an operation memory for storing the operation data transferred. The interface section sequentially transfers the operation data from the memory connected to the external bus to the operation memory using the parameter, and sequentially transfers the operation data from the operation memory to the operation section.
摘要翻译：用于处理按照操作顺序存储在连接到外部总线的存储器中的操作数据的数据处理器包括：用于保存传送操作数据所需的参数的接口部分; 从所述接口部接收所述操作数据以进行预定处理的操作部; 以及用于存储传送的操作数据的操作存储器。接口部分使用该参数将操作数据从连接到外部总线的存储器顺序传送到操作存储器，并将操作数据从操作存储器顺序地传送到操作部分。

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