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1. 发明申请

US20050110169A1 Semiconductor device and method of making the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20050110169A1
公开(公告)日：2005-05-26
申请号：US11019617
申请日：2004-12-23
申请人： Tomohisa Yagi , Nobuhiro Imaizumi , Yasuhiro Usui , Kenji Fukuzono
发明人： Tomohisa Yagi , Nobuhiro Imaizumi , Yasuhiro Usui , Kenji Fukuzono
IPC分类号： H01L21/60 , H01L21/56 , H01L23/12 , H01L23/498 , H01L23/495
CPC分类号： H01L23/49816 , H01L21/563 , H01L24/29 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/83102 , H01L2224/92125 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01075 , H01L2924/01082 , H01L2924/09701 , H01L2924/15311 , H01L2924/15787 , H01L2924/351 , H01L2924/00 , H01L2924/3512
摘要： According to a method of making a semiconductor device, a semiconductor chip is bonded to a substrate via bumps by flip-chip bonding. Then, a sealing adhesive composition is loaded between the semiconductor chip and the substrate to provide an adhesive sealing. The sealing adhesive composition, which is capable of hardening in two stages, contains at least a first main resin ingredient, a second main resin ingredient and a hardening agent. Then, the adhesive sealing is heated for primary hardening. Then, the substrate is placed on a mother board with a solder material interposed between the substrate and the mother board. Finally, the adhesive sealing is heated for secondary hardening while the solder material is reflowed for bonding the substrate to the mother board.
摘要翻译：根据制造半导体器件的方法，通过倒装芯片接合，半导体芯片通过凸块接合到基板。然后，在半导体芯片和基板之间加载密封粘合剂组合物以提供粘合剂密封。能够两阶段硬化的密封粘合剂组合物至少含有第一主要树脂成分，第二主要树脂成分和硬化剂。然后，加热粘合剂密封件进行一次硬化。然后，将基板放置在母板上，其中焊料材料插入在基板和母板之间。最后，将粘合剂密封加热以进行二次硬化，同时将焊料回流焊接到母板上。

2. 发明授权

US06869822B2 Method of making a semiconductor device with adhesive sealing subjected to two-fold hardening 有权
标题翻译：制造具有双重硬化的粘合剂密封的半导体器件的方法
公开(公告)号：US06869822B2
公开(公告)日：2005-03-22
申请号：US10105287
申请日：2002-03-26
申请人： Tomohisa Yagi , Nobuhiro Imaizumi , Yasuhiro Usui , Kenji Fukuzono
发明人： Tomohisa Yagi , Nobuhiro Imaizumi , Yasuhiro Usui , Kenji Fukuzono
IPC分类号： H01L21/60 , H01L21/56 , H01L23/12 , H01L23/498 , H01L21/44
CPC分类号： H01L23/49816 , H01L21/563 , H01L24/29 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/83102 , H01L2224/92125 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01075 , H01L2924/01082 , H01L2924/09701 , H01L2924/15311 , H01L2924/15787 , H01L2924/351 , H01L2924/00 , H01L2924/3512
摘要： According to a method of making a semiconductor device, a semiconductor chip is bonded to a substrate via bumps by flip-chip bonding. Then, a sealing adhesive composition is loaded between the semiconductor chip and the substrate to provide an adhesive sealing. The sealing adhesive composition, which is capable of hardening in two stages, contains at least a first main resin ingredient, a second main resin ingredient and a hardening agent. Then, the adhesive sealing is heated for primary hardening. Then, the substrate is placed on a mother board with a solder material interposed between the substrate and the mother board. Finally, the adhesive sealing is heated for secondary hardening while the solder material is reflowed for bonding the substrate to the mother board.
摘要翻译：根据制造半导体器件的方法，通过倒装芯片接合，半导体芯片通过凸块接合到基板。然后，将密封粘合剂组合物装载在半导体芯片和基板之间以提供粘合剂密封。能够两阶段硬化的密封粘合剂组合物至少含有第一主要树脂成分，第二主要树脂成分和硬化剂。然后，加热粘合剂密封件进行一次硬化。然后，将基板放置在母板上，其中焊料材料插入在基板和母板之间。最后，将粘合剂密封加热以进行二次硬化，同时将焊料回流焊接到母板上。

3. 发明申请

US20060063303A1 Packaging method, packaging structure and package substrate for electronic parts 失效
标题翻译：包装方法，包装结构和电子零件封装基板
公开(公告)号：US20060063303A1
公开(公告)日：2006-03-23
申请号：US11265107
申请日：2005-11-03
申请人： Masateru Koide , Misao Umematsu , Takashi Kanda , Yasuhiro Usui , Kenji Fukuzono
发明人： Masateru Koide , Misao Umematsu , Takashi Kanda , Yasuhiro Usui , Kenji Fukuzono
IPC分类号： H01L21/50 , H01L21/48
CPC分类号： H01L23/642 , H01L21/563 , H01L23/3128 , H01L23/4006 , H01L23/49833 , H01L23/50 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/83102 , H01L2224/92125 , H01L2924/00014 , H01L2924/01078 , H01L2924/15311 , H01L2924/19106 , H01L2924/3511 , H05K1/0231 , H05K1/141 , H05K1/182 , H05K3/3436 , H05K2201/049 , H05K2201/09072 , H05K2201/1053 , H05K2201/10734 , H05K2201/10977 , H01L2924/00015 , H01L2924/00 , H01L2224/0401
摘要： A packaging method, a packaging structure and a package is substrate capable of restraining a warp of a thin film substrate, increasing a product yield, and building up a sufficient cooling capacity in the case of mounting an LSI having a high exothermic quantity. A package substrate 1 of the invention is such that an opening 11 is formed in a first substrate 12, a thin film substrate (a second substrate) 13 is laminated on the first substrate 12, the opening 11 is covered with the thin film substrate 13. Next, a capacitor (a first electronic part) 14 is inserted into the opening 11 and bonded to the thin film substrate, a resin 15 fills an interior of the opening 11 to a fixed or larger thickness and is hardened, the thin film substrate 13 and the capacitor 14 are thereby sustained by the resin 15, an LSI 16 (a second electronic part) that should be connected to the capacitor 14 is bonded to a surface, on an exposed side, of the thin film substrate 13, and the capacitor 14 is connected to the LSI 16.
摘要翻译：包装方法，包装结构和包装是能够抑制薄膜基板翘曲的基板，提高产品收率，并且在安装具有高放热量的LSI的情况下建立足够的冷却能力的基板。本发明的封装基板1使得在第一基板12中形成开口11，在第一基板12上层叠薄膜基板（第二基板）13，开口11被薄膜基板13覆盖。接下来，将电容器（第一电子部件）14插入到开口11中并且结合到薄膜基板上，树脂15将开口11的内部填充到固定或更大的厚度并被硬化，薄膜基板13 并且电容器14由树脂15维持，应该连接到电容器14的LSI 16（第二电子部件）被接合到薄膜基板13的暴露侧的表面上，并且电容器 14连接到LSI 16。

4. 发明授权

US07291901B2 Packaging method, packaging structure and package substrate for electronic parts 失效
标题翻译：包装方法，包装结构和电子零件封装基板
公开(公告)号：US07291901B2
公开(公告)日：2007-11-06
申请号：US10803879
申请日：2004-03-19
申请人： Masateru Koide , Misao Umematsu , Takashi Kanda , Yasuhiro Usui , Kenji Fukuzono
发明人： Masateru Koide , Misao Umematsu , Takashi Kanda , Yasuhiro Usui , Kenji Fukuzono
IPC分类号： H01L23/02 , H01L23/48
CPC分类号： H01L23/642 , H01L21/563 , H01L23/3128 , H01L23/4006 , H01L23/49833 , H01L23/50 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/83102 , H01L2224/92125 , H01L2924/00014 , H01L2924/01078 , H01L2924/15311 , H01L2924/19106 , H01L2924/3511 , H05K1/0231 , H05K1/141 , H05K1/182 , H05K3/3436 , H05K2201/049 , H05K2201/09072 , H05K2201/1053 , H05K2201/10734 , H05K2201/10977 , H01L2924/00015 , H01L2924/00 , H01L2224/0401
摘要： A packaging method, a packaging structure and a package is substrate capable of restraining a warp of a thin film substrate, increasing a product yield, and building up a sufficient cooling capacity in the case of mounting an LSI having a high exothermic quantity. A package substrate 1 of the invention is such that an opening 11 is formed in a first substrate 12, a thin film substrate (a second substrate) 13 is laminated on the first substrate 12, the opening 11 is covered with the thin film substrate 13. Next, a capacitor (a first electronic part) 14 is inserted into the opening 11 and bonded to the thin film substrate, a resin 15 fills an interior of the opening 11 to a fixed or larger thickness and is hardened, the thin film substrate 13 and the capacitor 14 are thereby sustained by the resin 15, an LSI 16 (a second electronic part) that should be connected to the capacitor 14 is bonded to a surface, on an exposed side, of the thin film substrate 13, and the capacitor 14 is connected to the LSI 16.
摘要翻译：包装方法，包装结构和包装是能够抑制薄膜基板翘曲的基板，提高产品收率，并且在安装具有高放热量的LSI的情况下建立足够的冷却能力的基板。本发明的封装基板1使得在第一基板12中形成开口11，在第一基板12上层叠薄膜基板（第二基板）13，开口11被薄膜基板13覆盖。接下来，将电容器（第一电子部件）14插入到开口11中并且结合到薄膜基板上，树脂15将开口11的内部填充到固定或更大的厚度并被硬化，薄膜基板13 并且电容器14由树脂15维持，应该连接到电容器14的LSI 16（第二电子部件）被接合到薄膜基板13的暴露侧的表面上，并且电容器 14连接到LSI 16。

5. 发明授权

US07268002B2 Packaging method, packaging structure and package substrate for electronic parts 失效
公开(公告)号：US07268002B2
公开(公告)日：2007-09-11
申请号：US11265107
申请日：2005-11-03
申请人： Masateru Koide , Misao Umematsu , Takashi Kanda , Yasuhiro Usui , Kenji Fukuzono
发明人： Masateru Koide , Misao Umematsu , Takashi Kanda , Yasuhiro Usui , Kenji Fukuzono
IPC分类号： H01L21/66 , H01L21/44
CPC分类号： H01L23/642 , H01L21/563 , H01L23/3128 , H01L23/4006 , H01L23/49833 , H01L23/50 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/83102 , H01L2224/92125 , H01L2924/00014 , H01L2924/01078 , H01L2924/15311 , H01L2924/19106 , H01L2924/3511 , H05K1/0231 , H05K1/141 , H05K1/182 , H05K3/3436 , H05K2201/049 , H05K2201/09072 , H05K2201/1053 , H05K2201/10734 , H05K2201/10977 , H01L2924/00015 , H01L2924/00 , H01L2224/0401
摘要： A packaging method, a packaging structure and a package is substrate capable of restraining a warp of a thin film substrate, increasing a product yield, and building up a sufficient cooling capacity in the case of mounting an LSI having a high exothermic quantity. A package substrate 1 of the invention is such that an opening 11 is formed in a first substrate 12, a thin film substrate (a second substrate) 13 is laminated on the first substrate 12, the opening 11 is covered with the thin film substrate 13. Next, a capacitor (a first electronic part) 14 is inserted into the opening 11 and bonded to the thin film substrate, a resin 15 fills an interior of the opening 11 to a fixed or larger thickness and is hardened, the thin film substrate 13 and the capacitor 14 are thereby sustained by the resin 15, an LSI 16 (a second electronic part) that should be connected to the capacitor 14 is bonded to a surface, on an exposed side, of the thin film substrate 13, and the capacitor 14 is connected to the LSI 16.

6. 发明申请

US20060215810A1 Fluorescent X-ray analyzer, fluorescent X-ray analysis method, and fluorescent X-ray analysis program 审中-公开
标题翻译：荧光X射线分析仪，荧光X射线分析法和荧光X射线分析程序
公开(公告)号：US20060215810A1
公开(公告)日：2006-09-28
申请号：US11192140
申请日：2005-07-29
申请人： Yasuhiro Usui
发明人： Yasuhiro Usui
IPC分类号： G01N23/223 , G01T1/36
CPC分类号： G01N23/223 , G01N2223/076
摘要： The present invention has been made to obtain a fluorescent X-ray analyzer and the like capable of easily performing analysis of a sample including materials in the form of a multiple layer in the depth direction of the sample at low cost without a need of a skilled technique and time. A fluorescent X-ray analysis method according to the present invention that performs analysis of materials in a sample including different materials in the form of a multiple layer analyzes the materials by irradiating the sample with an X-ray to detect an fluorescent X-ray; estimates a processing amount for the sample based on a result of the analysis; and applies processing to the sample based on the processing amount estimated in the processing amount estimation step.
摘要翻译：本发明是为了获得荧光X射线分析仪等，能够容易地以低成本在样品深度方向上进行包含多层形式的材料的样品的分析，而不需要熟练的技术和时间。根据本发明的荧光X射线分析方法，其进行包含多层形式的不同材料的样品中的材料的分析，通过用X射线照射样品来检测材料，以检测荧光X射线; 基于分析结果估计样品的处理量; 并且基于在处理量估计步骤中估计的处理量对样本进行处理。

7. 发明授权

US6057168A Method for forming bumps using dummy wafer 失效
标题翻译：使用伪晶片形成凸块的方法
公开(公告)号：US6057168A
公开(公告)日：2000-05-02
申请号：US237897
申请日：1999-01-27
申请人： Kiyotaka Seyama , Hideki Ota , Yasuhiro Usui , Kazuaki Satoh
发明人： Kiyotaka Seyama , Hideki Ota , Yasuhiro Usui , Kazuaki Satoh
IPC分类号： H01L21/60 , H01L21/44
CPC分类号： H01L24/11 , H01L2224/11003 , H01L2224/11334 , H01L2224/13099 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01042 , H01L2924/01078 , H01L2924/014 , H01L2924/09701
摘要： A method for forming bumps including the steps of forming bumps on a dummy wafer. The dummy wafer is diced into dummy chips and the bumps formed on the dummy chips are inspected. Thus only good bumps are transferred to a real chip on which circuit patterns are formed.
摘要翻译：一种用于形成凸块的方法，包括在虚设晶片上形成凸块的步骤。将伪晶片切成虚拟芯片，并检查在虚拟芯片上形成的凸块。因此，只有良好的凸块被转移到形成电路图案的实际芯片上。

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