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    • 2. 发明授权
    • Asynchronous serial data apparatus for transferring data between one transmitter and a plurality of shift registers, avoiding skew during transmission
    • 用于在一个发射机和多个移位寄存器之间传送数据的异步串行数据装置,避免传输期间的偏斜
    • US07519742B2
    • 2009-04-14
    • US11368495
    • 2006-03-07
    • Tomohisa TakaiRyo Fukuda
    • Tomohisa TakaiRyo Fukuda
    • G06F3/00
    • G06F13/4282
    • A semiconductor integrated circuit apparatus, comprising a data transmitter circuit, and a plurality of data receiver circuits each having a data converter circuit which restores each of bits of identification number data and transfer data from a shift register of the data transmitter circuit to 2-bit complementary data transmitted via first and second transmission lines, a reception control circuit which, when a transfer completion signal has been received via a third transmission line, compares an allocated identification number with the restored identification number data, and a shift register provided in association with the reception control circuit, wherein each reception control circuit feeds transfer data transmitted from the data transmitter circuit corresponding to the identification number data to the associated shift register in accordance with a result of comparison between the identification number data and the allocated identification number.
    • 一种半导体集成电路装置,包括数据发送器电路和多个数据接收器电路,每个数据接收器电路具有数据转换器电路,其恢复识别号码数据的每一位并将数据从数据发送器电路的移位寄存器传送到2位 通过第一和第二传输线传输的补充数据;接收控制电路,当经由第三传输线接收到传送完成信号时,将分配的识别号与恢复的标识号数据进行比较,以及移位寄存器 接收控制电路,其中每个接收控制电路根据识别号码数据和所分配的识别号码之间的比较结果,将对应于识别号码数据的数据发送器电路发送的传送数据提供给相关联的移位寄存器。
    • 3. 发明授权
    • Semiconductor device for transferring first data to a setting/resetting circuit block
    • 用于将第一数据传送到设置/复位电路块的半导体器件
    • US07433978B2
    • 2008-10-07
    • US11066250
    • 2005-02-28
    • Tomohisa TakaiRyo Fukuda
    • Tomohisa TakaiRyo Fukuda
    • G06F3/00
    • G11C29/028G11C7/20G11C16/20G11C29/802G11C2029/4402
    • A semiconductor device transfers first data to a circuit block. The semiconductor device is provided with a storage circuit configured to store the first data, a shift register configured to set the first data, a transfer circuit configured to transfer the first data from the shift register to the circuit block, a first input terminal configured to receive a first signal indicating the end of a transfer operation, a resetting signal-generating circuit configured to generate a resetting signal for resetting the shift register based on the first signal, a setting signal-generating circuit configured to generate a setting signal for setting the first data in the shift register again after the shift register is reset, and an output circuit configured to externally output the first data that has been set again.
    • 半导体器件将第一数据传送到电路块。 所述半导体装置具备:存储电路,被配置为存储所述第一数据,移位寄存器,被配置为设置所述第一数据;传送电路,被配置为将所述第一数据从所述移位寄存器传送到所述电路块;第一输入端, 接收指示传送操作结束的第一信号;复位信号发生电路,被配置为基于所述第一信号产生用于复位所述移位寄存器的复位信号;设置信号发生电路,被配置为产生用于设置所述移位寄存器的设置信号, 在移位寄存器复位之后,移位寄存器中的第一数据再次被配置为从外部输出再次被设置的第一数据。
    • 4. 发明授权
    • Asynchronous serial data apparatus for transferring data between one transmitter and a plurality of shift registers, avoiding skew during transmission
    • 用于在一个发射机和多个移位寄存器之间传送数据的异步串行数据装置,避免传输期间的偏斜
    • US07958279B2
    • 2011-06-07
    • US12405953
    • 2009-03-17
    • Tomohisa TakaiRyo Fukuda
    • Tomohisa TakaiRyo Fukuda
    • G06F13/00G06F13/12
    • G06F13/4282
    • A semiconductor integrated circuit apparatus, comprising a data transmitter circuit, and a plurality of data receiver circuits each having a data converter circuit which restores each of bits of identification number data and transfer data from a shift register of the data transmitter circuit to 2-bit complementary data transmitted via first and second transmission lines, a reception control circuit which, when a transfer completion signal has been received via a third transmission line, compares an allocated identification number with the restored identification number data, and a shift register provided in association with the reception control circuit, wherein each reception control circuit feeds transfer data transmitted from the data transmitter circuit corresponding to the identification number data to the associated shift register in accordance with a result of comparison between the identification number data and the allocated identification number.
    • 一种半导体集成电路装置,包括数据发送器电路和多个数据接收器电路,每个数据接收器电路具有数据转换器电路,其恢复识别号码数据的每一位并将数据从数据发送器电路的移位寄存器传送到2位 通过第一和第二传输线传输的补充数据;接收控制电路,当经由第三传输线接收到传送完成信号时,将分配的识别号与恢复的标识号数据进行比较,以及移位寄存器 接收控制电路,其中每个接收控制电路根据识别号码数据和所分配的识别号码之间的比较结果,将对应于识别号码数据的数据发送器电路发送的传送数据提供给相关联的移位寄存器。
    • 5. 发明申请
    • ASYNCHRONOUS SERIAL DATA APPARATUS FOR TRANSFERRING DATA BETWEEN ONE TRANSMITTER AND A PLURALITY OF SHIFT REGISTERS, AVOIDING SKEW DURING TRANSMISSION
    • 用于在一台发射机和多台移动寄存器之间传输数据的异步串行数据设备,传输期间避开千兆位
    • US20090183020A1
    • 2009-07-16
    • US12405953
    • 2009-03-17
    • Tomohisa TakaiRyo Fukuda
    • Tomohisa TakaiRyo Fukuda
    • G06F1/08
    • G06F13/4282
    • A semiconductor integrated circuit apparatus, comprising a data transmitter circuit, and a plurality of data receiver circuits each having a data converter circuit which restores each of bits of identification number data and transfer data from a shift register of the data transmitter circuit to 2-bit complementary data transmitted via first and second transmission lines, a reception control circuit which, when a transfer completion signal has been received via a third transmission line, compares an allocated identification number with the restored identification number data, and a shift register provided in association with the reception control circuit, wherein each reception control circuit feeds transfer data transmitted from the data transmitter circuit corresponding to the identification number data to the associated shift register in accordance with a result of comparison between the identification number data and the allocated identification number.
    • 一种半导体集成电路装置,包括数据发送器电路和多个数据接收器电路,每个数据接收器电路具有数据转换器电路,其恢复识别号码数据的每一位并将数据从数据发送器电路的移位寄存器传送到2位 通过第一和第二传输线传输的补充数据;接收控制电路,当经由第三传输线接收到传送完成信号时,将分配的识别号与恢复的标识号数据进行比较,以及移位寄存器 接收控制电路,其中每个接收控制电路根据识别号码数据和所分配的识别号码之间的比较结果,将对应于识别号码数据的数据发送器电路发送的传送数据提供给相关联的移位寄存器。
    • 6. 发明申请
    • Semiconductor device
    • 半导体器件
    • US20060048027A1
    • 2006-03-02
    • US11066250
    • 2005-02-28
    • Tomohisa TakaiRyo Fukuda
    • Tomohisa TakaiRyo Fukuda
    • G01R31/28
    • G11C29/028G11C7/20G11C16/20G11C29/802G11C2029/4402
    • A semiconductor device transfers first data to a circuit block. The semiconductor device is provided with a storage circuit configured to store the first data, a shift register configured to set the first data, a transfer circuit configured to transfer the first data from the shift register to the circuit block, a first input terminal configured to receive a first signal indicating the end of a transfer operation, a resetting signal-generating circuit configured to generate a resetting signal for resetting the shift register based on the first signal, a setting signal-generating circuit configured to generate a setting signal for setting the first data in the shift register again after the shift register is reset, and an output circuit configured to externally output the first data that has been set again.
    • 半导体器件将第一数据传送到电路块。 所述半导体装置具备:存储电路,被配置为存储所述第一数据,移位寄存器,被配置为设置所述第一数据;传送电路,被配置为将所述第一数据从所述移位寄存器传送到所述电路块;第一输入端, 接收指示传送操作结束的第一信号;复位信号发生电路,被配置为基于所述第一信号产生用于复位所述移位寄存器的复位信号;设置信号发生电路,被配置为产生用于设置所述移位寄存器的设置信号, 在移位寄存器复位之后,移位寄存器中的第一数据再次被配置为从外部输出再次被设置的第一数据。
    • 7. 发明申请
    • Semiconductor memory device with redundancy function
    • 具有冗余功能的半导体存储器件
    • US20060274586A1
    • 2006-12-07
    • US11503295
    • 2006-08-14
    • Tomohisa TakaiRyo Haga
    • Tomohisa TakaiRyo Haga
    • G11C29/00
    • G11C29/802G11C29/812
    • A fuse and fuse latch includes first and second fuse and fuse latches each serving as a redundancy information storage circuit. Fuse elements and a fuse latch are provided in each of the first and second fuse and fuse latches. The first and second fuse and fuse latches each output latched data as serial data to a fuse data transfer control circuit. The fuse data transfer control circuit serving as a redundancy information creation circuit is configured of a counter and a data transfer control circuit. The data transfer control circuit combines data output from the first and second fuse and fuse latches, thereby to create new data.
    • 保险丝和保险丝锁存器包括第一和第二保险丝和熔丝锁存器,每个用作冗余信息存储电路。 保险丝元件和保险丝锁存器设置在第一和第二保险丝和熔丝锁存器的每一个中。 第一和第二熔丝和熔丝将每个输出的锁存数据作为串行数据输出到熔丝数据传输控制电路。 作为冗余信息生成电路的熔丝数据传送控制电路由计数器和数据传送控制电路构成。 数据传输控制电路组合从第一和第二熔丝和熔丝锁存器输出的数据,从而创建新的数据。