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1. 发明申请

WO2005101916A1 PARALLEL PULSE CODE MODULATION SYSTEM AND METHOD 审中-公开
标题翻译：并行脉冲码调制系统及方法
公开(公告)号：WO2005101916A1
公开(公告)日：2005-10-27
申请号：PCT/CA2004/000578
申请日：2004-04-19
申请人： TIR SYSTEMS LTD. , ASHDOWN, Ian , DAU, Alvaro
发明人： ASHDOWN, Ian , DAU, Alvaro
IPC分类号： H05B37/02
CPC分类号： H05B37/029 , H05B37/0254
摘要： The present invention provides a parallel pulse code modulation system enabling the independent control of a plurality of groups of one or more electronic devices. The system comprises a memory unit for receiving control data, from an external source, wherein this memory unit is configured to enable writing of the control data thereto and reading of the control data therefrom. The system further comprises a multiplexer connected to the memory unit for receiving the control data from the memory unit and organizing the control data into a serial data stream comprising groups of data. A shift register connected to the multiplexer receives the serial data stream from the multiplexer and translates each group of data into a parallel data stream output. Each parallel data stream output represents control parameters for a particular group of one or more electronic devices. A latch connected to the shift register and to the plurality of groups of one or more electronic devices, receives each parallel data stream output and sends a particular parallel data stream output to a corresponding group of one or more electronic devices, thereby providing independent control of the plurality of groups of one or more electronic devices. A logic sequencer integrated into the system provides sequencing and timing signals to the memory unit, the multiplexer, the shift register and the latch, thereby controlling actions and timing thereof.
摘要翻译：本发明提供了一种并行脉码调制系统，其能够独立控制一组或多个电子设备的多组。该系统包括用于从外部源接收控制数据的存储器单元，其中该存储器单元被配置为使得能够向其写入控制数据并从其读取控制数据。该系统还包括连接到存储器单元的多路复用器，用于从存储器单元接收控制数据，并将控制数据组织成包括数据组的串行数据流。连接到多路复用器的移位寄存器从多路复用器接收串行数据流，并将每组数据转换成并行数据流输出。每个并行数据流输出表示一个或多个电子设备的特定组的控制参数。连接到移位寄存器和一组或多个电子设备的多个组的锁存器接收每个并行数据流输出，并将特定的并行数据流输出发送到一个或多个电子设备的相应组，从而提供对多个组的一个或多个电子设备。集成到系统中的逻辑定序器向存储器单元，多路复用器，移位寄存器和锁存器提供排序和定时信号，由此控制其动作和定时。

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