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1. 发明授权

US06839013B1 Integrated circuit with a high resolution analog to digital convertor, a microcontroller and high density memory and an emulator for an integrated circuit 有权
标题翻译：具有高分辨率模数转换器，微控制器和高密度存储器以及集成电路仿真器的集成电路
公开(公告)号：US06839013B1
公开(公告)日：2005-01-04
申请号：US09639197
申请日：2000-08-15
申请人： Timothy J. Cummins , Eamonn Joseph Byrne , Dara Joseph Brannick , Patrick Michael Mitchell
发明人： Timothy J. Cummins , Eamonn Joseph Byrne , Dara Joseph Brannick , Patrick Michael Mitchell
IPC分类号： G06F11/36 , H03M1/12
CPC分类号： G06F11/3656
摘要： An emulator couplable to an integrated circuit, the integrated circuit including a micro controller, a DMA controller, memory means and an ADC and the emulator being operable to read a block of data stored in a plurality of memory locations of the memory means and graphically to display a representation of at least a portion of the block of data. An integrated circuit including an ADC and reprogrammable non-volatile memory means, the ADC being arranged to read calibration values from the non-volatile memory means. An integrated circuit including a microcontroller, a DAC selected from a group consisting of a string DAC and a current source DAC and an operational amplifier coupled to the DAC output. An integrated circuit includes analog and digital circuitry, and has only two polysilicon layers on a C-MOS substrate.
摘要翻译：一种可耦合到集成电路的仿真器，所述集成电路包括微控制器，DMA控制器，存储器装置和ADC，并且所述仿真器可操作以读取存储在所述存储器装置的多个存储器位置中的数据块，并且以图形方式映射到显示数据块的至少一部分的表示。一种包括ADC和可再编程非易失性存储器装置的集成电路，所述ADC被布置为从非易失性存储装置读取校准值。包括微控制器，从串联DAC和电流源DAC组成的组中选择的DAC的集成电路和耦合到DAC输出的运算放大器。集成电路包括模拟和数字电路，并且在C-MOS衬底上仅具有两个多晶硅层。

2. 发明授权

US06289300B1 Integrated circuit with embedded emulator and emulation system for use with such an integrated circuit 失效
标题翻译：具有嵌入式仿真器和仿真系统的集成电路，与这种集成电路一起使用
公开(公告)号：US06289300B1
公开(公告)日：2001-09-11
申请号：US09019943
申请日：1998-02-06
申请人： Dara Joseph Brannick , Patrick Michael Mitchell , Timothy J. Cummins , Brian John O'Mara
发明人： Dara Joseph Brannick , Patrick Michael Mitchell , Timothy J. Cummins , Brian John O'Mara
IPC分类号： G06F9455
CPC分类号： G06F11/3656 , G06F9/3005 , G06F9/30189
摘要： A data processor is provided with an embedded debugger. The debugging function is provided by the execution of a debugging program which is stored in reserved, non-volatile memory which is internal to the data processor. During the debug mode, the data processor allows the internal registers used during execution of a user program to be examined. Debug operation can be initiated via debug instruction which replaces an existing instruction in the user code, the replaced instruction being held in a special purpose register such that it can be executed on return from the debug mode. Single step operation of the data processor can be performed in debug mode and data and instructions can be exchanged with the data processor in debug mode, optionally via a single pin so as not to sacrifice any user resources.
摘要翻译：数据处理器提供有一个嵌入式调试器。通过执行调试程序提供调试功能，调试程序存储在数据处理器内部的保留的非易失性存储器中。在调试模式期间，数据处理器允许检查用户程序执行期间使用的内部寄存器。可以通过代替用户代码中的现有指令的调试指令启动调试操作，将替换的指令保存在专用寄存器中，使得可以在从调试模式返回时执行调试指令。可以在调试模式下执行数据处理器的单步操作，并且可以可选地通过单个引脚与数据处理器以调试模式交换数据和指令，从而不牺牲任何用户资源。

3. 发明授权

US06701395B1 Analog-to-digital converter that preseeds memory with channel identifier data and makes conversions at fixed rate with direct memory access 失效
标题翻译：模数转换器通过信道标识符数据预设存储器，并以直接存储器访问使固定速率进行转换
公开(公告)号：US06701395B1
公开(公告)日：2004-03-02
申请号：US09019946
申请日：1998-02-06
申请人： Eamonn Joseph Byrne , Patrick Michael Mitchell
发明人： Eamonn Joseph Byrne , Patrick Michael Mitchell
IPC分类号： G06F300
CPC分类号： G06F3/05 , H03M1/46
摘要： An integrated circuit including a DMA controller, an ADC having a plurality of conversion channels and address and data ports for connection to external memory means, the DMA controller being arranged to read a channel id from the memory means using the address and data port which channel id is representative of one of the said conversion channels, to pass the read channel id to the ADC, to cause the ADC to perform an analog-to-digital-conversion on the conversion channel represented by the channel id, to receive the conversion result from the ADC and to write the conversion result back to the memory means using the address and data ports. Also, an integrated circuit including a microcontroller having an output port, an address valid output line, a latch coupled to the output port, and a latch control fine coupled to the latch control of the latch the microcontroller being operable to present a first range of address bits at its output port, to activate the latch control line to cause the latch to latch the first range of bits, to present a second range of address bits at its output port and to activate the address valid line to indicate that the combination of the first and second ranges present on the latch outputs and the output port respectively, are valid.
摘要翻译：一种包括DMA控制器，具有多个转换通道的ADC以及用于连接到外部存储器装置的地址和数据端口的集成电路，DMA控制器被配置为使用地址和数据端口从存储器装置中读取通道ID，通道ID代表所述转换通道之一，将读通道ID传递给ADC，以使ADC在由通道id表示的转换通道上执行模数转换，以接收转换由ADC产生，并使用地址和数据端口将转换结果写回存储器。此外，包括具有输出端口，地址有效输出线，耦合到输出端口的锁存器和耦合到锁存器的锁存器控制的锁存器控制线的微控制器的集成电路，微控制器可操作以呈现第一范围在其输出端口处的地址位的激活，以激活锁存器控制线以使锁存器锁存第一范围的位，以在其输出端口处呈现第二范围的地址位，并激活地址有效行以指示组合分别存在于锁存器输出端和输出端口上的第一和第二范围的有效值。

4. 发明授权

US06230119B1 Integrated circuit with embedded emulator and emulation system for use with such an integrated circuit 失效
标题翻译：具有嵌入式仿真器和仿真系统的集成电路，与这种集成电路一起使用
公开(公告)号：US06230119B1
公开(公告)日：2001-05-08
申请号：US09019789
申请日：1998-02-06
申请人： Patrick Michael Mitchell
发明人： Patrick Michael Mitchell
IPC分类号： G06F9455
CPC分类号： G06F11/3656 , G06F11/261
摘要： A data processor is provided in which an embedded emulator communicates with a control emulation system using a serial communications link involving one pin of the data processor package.
摘要翻译：提供了一种数据处理器，其中嵌入式仿真器使用涉及数据处理器封装的一个引脚的串行通信链路与控制仿真系统进行通信。

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